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* usb: mv_udc: Make use of struct ehci_ctrlMarek Vasut2013-07-29-21/+26
| | | | | | | | | | | | | | | | | | | | The usb_lowlevel_init() call already fills and passes back struct ehci_ctrl , which readily contains correctly determined address of the port register block address computed from values from controller configuration registers. Leverage this and make use of this value as this makes the code mode universal, but also gets us rid of the CONFIG_USB_REG_BASE configuration option. Moreover, this patch cleans up the usb_gadget_register_driver() call a little by correcting the error handling. Note the usb_lowlevel_init() and mvudc_probe() are now called in reversed order, but this has no impact on the code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: ehci: Split out struct ehci_ctrl definitionMarek Vasut2013-07-29-10/+14
| | | | | | | | | | | | Move the struct ehci_ctrl defition from ehci-hcd.c into ehci.h so it can be re-used by drivers. In particular, the mv_udc driver can benefit from this move. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Clean up the EP initializationMarek Vasut2013-07-29-13/+27
| | | | | | | | | | | | | | | Move the constant values that are programmed into mv_ep.ep into separate static const structure so they can be memcpy()'d when the initialization happens. Moveover, we only every init NUM_ENDPOINTS, not 2 * NUM_ENDPOINTS, so fix this bug as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Move endpoint array into driver dataMarek Vasut2013-07-29-32/+33
| | | | | | | | | | | | | The endpoints are operated on a per-controller basis, move the endpoint array into controller's private data. Also shuffle the struct mv_ep structure definition just above the definition of the struct mv_drv so they're well grouped together. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Clean up mv_udc.hMarek Vasut2013-07-29-37/+23
| | | | | | | | | | | | Do a coding-style cleanup of this file and throw away useless defined values. These values were likely a result of a copy-paste job. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Unbreak the mv_udc driverMarek Vasut2013-07-29-2/+9
| | | | | | | | | | | | The mv_udc driver is broken for a while and doesn't even compile. This patch fixes the issues and gets the driver into working state again. This driver was tested on Freescale i.MX233/i.MX28 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* powerpc/ppc4xx: Convert new gdsys files to SPDX license tagsTom Rini2013-07-26-85/+5
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxTom Rini2013-07-26-171/+1040
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| * powerpc/ppc4xx: Remove CONFIG_SYS_FLASH_PROTECTION from gdsys boardsDirk Eibach2013-07-25-10/+5
| | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_FLASH_PROTECTION was active on most gdsys boards by default, while hardware flash protection was not implemented. Hardware support was added recently and we get into trouble because backward compatibility is broken (u-boot can't unprotect the protected flash after a downgrade). So we decided to disable hardware flash protection for all our boards. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
| * powerpc/ppc4xx: Consider gdsys FPGA OSD sizeDirk Eibach2013-07-25-16/+18
| | | | | | | | | | | | | | | | OSD size was constant 32x16 characters. Now the size is set as announced by the FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
| * powerpc/ppc4xx: Support gdsys multichannel iocon hardwareDirk Eibach2013-07-25-53/+510
| | | | | | | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
| * powerpc/ppc4xx: Add fpgad command for dumping gdsys fpga registersDirk Eibach2013-07-25-0/+101
| | | | | | | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
| * powerpc/ppc4xx: Add gdsys mclink interfaceDirk Eibach2013-07-25-0/+184
| | | | | | | | | | | | | | mclink is a serial interface for communication between gdsys FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
| * powerpc/ppc4xx: Use generic accessor functions for gdsys FPGADirk Eibach2013-07-25-99/+229
| | | | | | | | | | | | | | | | | | | | A set of accessor functions was added to be able to access not only memory mapped FPGA in a generic way. Thanks to Wolfgang Denk for getting this sorted properly. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flashTom Rini2013-07-26-1/+1
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| * cfi_flash: use buffer length in unmap_physmem()Kuo-Jung Su2013-07-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the flash_detect_legacy() of drivers/mtd/cfi_flash.c feed unmap_physmem() with MAP_NOCACHE as 2nd parameter, the do_spi_flash_read_write() of common/cmd_sf.c feed unmap_physmem() with the length of the mapped buffer as 2nd parameter. It's apparently a bug, and I personally think the 2nd parameter should be the length of the mapped buffer. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Albert Aribaud <albert.u.boot@aribaud.net> CC: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2013-07-25-43/+384
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| * | nds32: Enable FPU if the version of CPU supportedken kuo2013-07-25-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some version of Andes core support FPU coprocessor, if this is the case, and toolchain support FPU instruction set, we should enable it at low level initialization time. Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * | nds32: Update <asm/io.h> and <asm/setup.h> with SPDX license identifiersTom Rini2013-07-25-6/+2
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * | nds32: Convert Makefiles to use COBJS-y styleken kuo2013-07-25-21/+24
| | | | | | | | | | | | | | | Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * | nds32: ag101/ag102: Fix setting lastdec and now valuesAxel Lin2013-07-24-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The timer3 counter unit for lastdesc and now values are inconsistent in current code. The unit of "readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2)" is second. However, CONFIG_SYS_HZ is defined as 1000 in board config file. This means the accuracy of "lastdec" and "now" should be in millisecond, thus fix the equation to set lastdec and now variables accordingly. Signed-off-by: Axel Lin <axel.lin@ingics.com>
| * | nds32: Enable the function of passing parameters to Linuxken kuo2013-07-24-0/+207
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a header file, setup.h, which copy from Linux source code, this file contain structures are used to pass initialisation parameters to Linux. Enable this function on adp-ag101/adp-ag101p target Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * | nds32: Enable SDIO and EXT2 command support for Andes boardken kuo2013-07-24-0/+4
| | | | | | | | | | | | | | | Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * | nds32: Enable two banks of SDRAM on Andes boardken kuo2013-07-24-5/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | The original adp-ag101/adp-ag101p initialize only one bank(64MB) by default at boot time, but it is not enough for some application, so increasing to two banks(128M). Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * | nds32: adp-ag102: use 'faraday/ftpci100.h' for pci_ftpci_initGabor Juhos2013-07-24-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to improper external function declaration, building U-Boot for the adp-ag102 board shows this warning: adp-ag102.c: In function 'pci_init_board': adp-ag102.c:95: warning: function declaration isn't a prototype Include the 'faraday/ftpci100.h' header which provides the proper declaration and remove the local declaration to get rid of the warning. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
| * | pci: move pci_ftpci100.h to include/faraday/ftpci100.hGabor Juhos2013-07-24-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though the header files is used only by the pci_ftpci100 driver, it contains declaration for a function which is used by external code. Move the header file to a common location which lets external code use it. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
| * | pci: add prototype for pci_ftpci_init() functionGabor Juhos2013-07-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pci_ftpci_init() function is implemented in 'drivers/pci/pci_ftpci100.c' however it is always called by external code. Add function declaration into ftpci100.h to make it visible for external code. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
| * | block: constify sect_buf argument of ide_write_dataGabor Juhos2013-07-24-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a const keyword to the sect_buf argument of ide_write_data to fix the following warning: cmd_ide.c: In function '__ide_output_data': cmd_ide.c:548: warning: passing argument 2 of 'ide_write_data' discards qualifiers from pointer target type /devel/u-boot.git/include/ide.h:76: note: expected 'ulong *' but argument is of type 'const ulong *' Also modify the driver-model documentation to match with the new prototype. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
| * | mmc: ftsdc010_mci: fix build error if CONFIG_FTSDC010_SDIO is not definedGabor Juhos2013-07-24-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FTSDC010_DCR_FIFO_RST symbol is conditionally defined in <faraday/ftsdc010.h> and it is available available when CONFIG_FTSDC010_SDIO is enabled. However the actual driver code unconditionally uses the FTSDC010_DCR_FIFO_RST constant and this causes build error if CONFIG_FTSDC010_SDIO is not enabled. The following error happens when compiling for the adp-ag101 board: ftsdc010_mci.c: In function 'ftsdc010_request': ftsdc010_mci.c:178: error: 'FTSDC010_DCR_FIFO_RST' undeclared (first use in this function) ftsdc010_mci.c:178: error: (Each undeclared identifier is reported only once ftsdc010_mci.c:178: error: for each function it appears in.) The patch ensures that the FTSDC010_DCR_FIFO_RST symbol gets used only if CONFIG_FTSDC010_SDIO is defined. Compile tested only. Cc: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Reviewed-by: Kuo-Jung Su <dantesu@faraday-tech.com>
| * | nds32: introduce macros for bit manipulationGabor Juhos2013-07-24-0/+37
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot does not compile for the adp-ag101 boards since commit f6c3b34697bf8bf05cb4e81c2fd3cadb9a98daea (mmc: update Faraday FTSDC010 for rw performance) The driver assumes that the bit manipulation macros are provided by all architectures. This is not the case for nds32 and it causes a build error like this: ftsdc010_mci.c: In function 'ftsdc010_clkset': ftsdc010_mci.c:118: warning: implicit declaration of function 'setbits_le32' ftsdc010_mci.c:123: warning: implicit declaration of function 'clrbits_le32' drivers/mmc/libmmc.o: In function `ftsdc010_request': /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:234: undefined reference to `setbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:243: undefined reference to `clrbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:234: undefined reference to `clrbits_le32' drivers/mmc/libmmc.o: In function `ftsdc010_clkset': /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:118: undefined reference to `clrbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:118: undefined reference to `clrbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:121: undefined reference to `setbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:123: undefined reference to `setbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:123: undefined reference to `setbits_le32' The patch adds bit manipulation macros for the nds32 architecture to avoid the errors. The macros are copied from the ARM implementation. Compile tested only. Cc: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
* | qemu-malta: Update for SPDX license identifiersTom Rini2013-07-25-44/+7
| | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2013-07-25-50/+1108
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflict over SPDX changes means that one change was effectively dropped as it was fixing typos in a removed hunk of text. Conflicts: arch/mips/cpu/mips64/start.S Signed-off-by: Tom Rini <trini@ti.com>
| * | MIPS: mips32/cache.S: use v1 register for indirect function callsGabor Juhos2013-07-24-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/cache.S: store cache line size in t8 registerGabor Juhos2013-07-24-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/cache.S: save return address in t9 registerGabor Juhos2013-07-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: xburst/start.S: rework relocation info checkGabor Juhos2013-07-24-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Make it similar to the code in mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: xburst/start.S: use t8 register for dynamic relocationGabor Juhos2013-07-24-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: xburst/start.S: save gd in s0 registerGabor Juhos2013-07-24-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: xburst/start.S: save relocation offset in s1 registerGabor Juhos2013-07-24-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: xburst/start.S: save relocation address in s2 registerGabor Juhos2013-07-24-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/start.S: rework relocation info checkGabor Juhos2013-07-24-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Make it similar to the code in mips64/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/start.S: use t8 register for dynamic relocationGabor Juhos2013-07-24-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips64/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/cache.S: remove superfluous register assignmentGabor Juhos2013-07-24-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The t4 register already holds the cache line size, and the value of the register is not changed in mips_init_icache. Get the cache line size value from t4 for mips_init_dcache as well and remove the superfluous assignment of t5 register. Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
| * | MIPS: remove obsolete TODO itemsGabor Juhos2013-07-24-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | The MIPS code uses centralized u-boot.lds script already, and dynamic relocation is supported as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips64/interrupt.c: remove superfluous includeGabor Juhos2013-07-24-1/+0
| | | | | | | | | | | | | | | | | | | | | Nothing is used from asm/mipsregs.h. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/time.c: fix checkpatch errors/warningsGabor Juhos2013-07-24-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Checking mips32/time.c with checkpatch.pl shows this: arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required total: 1 errors, 1 warnings, 0 checks, 85 lines checked Fix the code to make checkpatch.pl happy. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: qemu-malta: bring up ethernetGabor Juhos2013-07-24-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qemu emulates a PCNET PCI card for the Malta CoreLV board. Enable the pcnet driver and add board specific ethernet initialization function to bring it up. Also enable the CONFIG_CMD_NET and CONFIG_CMD_PING options. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: qemu-malta: add PCI supportGabor Juhos2013-07-24-0/+216
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qemu emulates the Galileo GT64120 System Controller which provides a CPU bus to PCI bus bridge. The patch adds driver for this bridge and enables PCI support for the emulated Malta board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: qemu-malta: setup GT64120 registers as done by YAMONGabor Juhos2013-07-24-1/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the GT64120 register base to 0x1be00000 and setup PCI BAR registers as done by the original YAMON bootloader. This is needed for running Linux kernel. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: qemu-malta: enable flash supportGabor Juhos2013-07-24-2/+9
| | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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