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* common, menu: use abortboot for menu timeoutJason Hobbs2011-10-17-14/+47
| | | | Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
* Add generic, reusable menu codeJason Hobbs2011-10-17-0/+543
| | | | | | | This will be used first by the pxe code, but is intended to be generic and reusable for other jobs in U-boot. Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
* DM9000:Add a byte swap macro for dm9000 io operation.Jason Jin2011-10-17-1/+9
| | | | | | | | | | | | | commit a45dde2293c816138e53c26eca6fd0322583f9a6 changed the dm9000 direct register access to standard IO. This should work on the ColdFire platform as there are corresponding macros for the LE devices. But the hardware settings on some ColdFire boards had swapped the byte order which make the original macros such as out_le16 cannot work. To avoid changing the common io access code on ColdFire platform, the DM9000_BYTE_SWAPPED define was added to make the dm9000 use __raw* IO access on some ColdFire boards. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
* kw_gpio: fix error in kw_gpio_direction_inputHolger Brunck2011-10-17-1/+1
| | | | | | | | | The function kw_gpio_is_valid returns zero on success, so adapt the error check accordingly. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Dieter Kiermaier <dk-arm-linux@gmx.de>
* Blackfin: bfin_spi: fix build error when DEBUG is definedMike Frysinger2011-10-17-1/+1
| | | | | | The new debug() changes pointed out debug code that rotted a little. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: define CONFIG_SYS_CACHELINE_SIZEMike Frysinger2011-10-17-0/+74
| | | | | | | | Common U-Boot API wants this define, so import asm/cache.h from Linux to provide suitable defines. Acked-by: Anton Staaf <robotboy@chromium.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* video: Moving mx3fb.c to CONFIG_VIDEOHelmut Raiger2011-10-17-209/+297
| | | | | | | | | | | | | | | | | | | | | | | | | mx3fb.c was based on CONFIG_LCD and is moved by this patch to CONFIG_VIDEO, which has greater freedom in selecting videomodes even at runtime. This renders the accumulating list of display defines (CONFIG_DISPLAY_VBEST..., CONFIG_DISPLAY_C057...) obsolete as these may be setup through env variables: uboot> setenv mydisplay 'video=ctfb:x:240,y:320,depth:16,mode:0,pclk:185925, le:9,ri:17,up:7,lo:10,hs:1,vs:1,sync:100663296,vmode:0' uboot> setenv videomode ${mydisplay} This commit also fixes the board config files for qong and imx31_phycore boards as needed. The videomode settings of previously supported displays are added to CONFIG_EXTRA_ENV_SETTINGS now. CONFIG_SYS_MALLOC_LEN for imx31_phycore board is increased to make the frame buffer allocation working with the changed driver. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* mx31: make HSP clock for mx3fb driver availableHelmut Raiger2011-10-17-13/+42
| | | | | | | | | | | | This additionally updates mx31/generic.c by - replacing __REG() macro accesses with readl() and writel() - providing macros for PDR0 and PLL bit accesses Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* MX5: Make IPU display output and pixel format configurableMarek Vasut2011-10-17-8/+18
| | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Stefano Babic <sbabic@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* VIDEO: MX5: export pix formatStefano Babic2011-10-17-45/+77
| | | | | | | | | | | Pixel format defines must be available for boards to set up the right display. Move them and export in a new file. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Anatolij Gustschin <agust@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* VIDEO: MX5: Switch MX5 to CONFIG_VIDEOStefano Babic2011-10-17-95/+62
| | | | | | | | | | | | | | | | | The framebuffer driver for MX5 is based on CONFIG_LCD. In the current implementation, there is a serious bug because the required memory is allocated before relocation, but the driver knows only later which is the resolution of the display. The patch switches the driver to CONFIG_VIDEO and the memory is allocated by the driver itself. We also need to switch the vision2 board code and config file in the same commit so that this commit will be bisectable. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* video: update the Freescale DIU driver to use linux/fb.hTimur Tabi2011-10-17-49/+5
| | | | | | | | Update the Freescale DIU video driver (fsl_diu_fb.c) to use linux/fb.h. Some data structures from this header file were just copied into fsl_diu_fb.c. Signed-off-by: Timur Tabi <timur@freescale.com>
* powerpc: cpm2 boards: update fcc register logicMike Frysinger2011-10-17-69/+69
| | | | | | | | | | | In the recent dropping of !NET_MULTI code (commit e2a53458a7ab37523304), I misread the logic in include/net.h. Some of it was used by NET_MULTI code as glue between the multi/non-multi worlds for cpm2 boards. Rather than restore the block of code, push the logic to the board config headers where it all belongs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* zlib: handle overflow while calculating available stream input sizeAnatolij Gustschin2011-10-17-0/+8
| | | | | | | | | | | | | | | | | | | | | If compressed data is located in sectors at the end of the flash and it's offset + input stream size > 0xFFFFFFFF, the uncompressing time is very long, since processing of the stream is done bytewise (and not blockwise) due to overflow in inflate_fast() while calculation and checking for enough input available. Check for this overflow condition and limit the available stream input size to the actually max. possible input size. This fixes the problem. The issue is easily reproduceable by placing a gziped bitmap in flash, e.g. at FFF80000, and running 'bmp' commands like 'bmp info FFF80000' or 'bmp display FFF80000'. The uncompressing can take up to 3 sec. whereas it should normaly take a fraction of a second. If the 'splashimage' environment variable points to this address, the booting time also increases significantly. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* serial_exit: punt unused prototypeMike Frysinger2011-10-15-1/+0
| | | | | | | No code defines or calls this, so drop the prototype. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Simon Glass <sjg@chromium.org>
* punt unused clean/distclean targetsMike Frysinger2011-10-15-2321/+0
| | | | | | | | | | The top level Makefile does not do any recursion into subdirs when cleaning, so these clean/distclean targets in random arch/board dirs never get used. Punt them all. MAKEALL didn't report any errors related to this that I could see. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* common: fix missing function pointer relocation in fixup_cmdtable()Daniel Schwierzeck2011-10-15-0/+6
| | | | | | | | | | | The command auto-completion does not work on architectures relying on CONFIG_NEEDS_MANUAL_RELOC like MIPS. Cause is the missing function pointer fixup for cmd_tbl_t::complete function in fixup_cmdtable(). This patch adds the missing pointer fixup in case of CONFIG_AUTO_COMPLETE is defined. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* mpc5200: digsy_mtc: fix detection of Coral-PAAnatolij Gustschin2011-10-15-0/+1
| | | | | | | | | A delay of approximately 250 ms after PCI bus reset in pci_mpc5xxx_init() is needed to recognize the Coral-PA controller on the graphic extention board. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* pci: move pcidelay code to new location just before PCI bus scanAnatolij Gustschin2011-10-15-13/+17
| | | | | | | | | | | | | | | | | | | | PCI cards might need some time after reset to respond. On some boards (mpc5200 or mpc8260 based) the PCI bus reset is deasserted at pci_init_board() time, so we currently can not use available "pcidelay" option for waiting before PCI bus scan since this waiting takes place before calling pci_init_board(). By moving the pcidelay code to the new location using of the "pcidelay" option is possible on mpc5200 or mpc8260 based boards, too. Since pci_hose_scan() could be called multiple times, restrict the function to wait only during its first call and to ignore pcidelay for any further call (as pointed out by Matthias). Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Matthias Fuchs <matthias.fuchs@esd.eu> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu> Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* net: axi_ethernet: Add driver to u-bootMichal Simek2011-10-15-0/+667
| | | | | | | | | | Add axi_ethernet driver for little-endian Microblaze. RX/TX BDs and rxframe buffer are shared among all axi_ethernet MACs. Only one MAC can work in one time. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Mike Frysinger <vapier@gentoo.org>
* net: emaclite: Fix coding styleMichal Simek2011-10-15-30/+27
| | | | | | Coding style should follow linux coding style. Signed-off-by: Michal Simek <monstr@monstr.eu>
* net: emaclite: Use PKTSIZE directlyMichal Simek2011-10-15-6/+4
| | | | | | Do not setup additional ENET_MAX_MTU macro. Signed-off-by: Michal Simek <monstr@monstr.eu>
* net: emaclite: Setup RX/TX ping pong for every instanceMichal Simek2011-10-15-55/+68
| | | | | | | Setup RX/TX ping-pong buffer for every emaclite IP separately. The next patch move initialization directly to board code. Signed-off-by: Michal Simek <monstr@monstr.eu>
* Merge branch 'master' of git://git.denx.de/u-boot-fdtWolfgang Denk2011-10-15-11/+21
|\ | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-fdt: powerpc/85xx: use fdt_create_phandle() to create the Fman firmware phandles fdt: update fdt_alloc_phandle to use fdt_get_phandle fdt: check for fdt errors in fdt_create_phandle fdt: Add a do_fixup_by_path_string() function
| * powerpc/85xx: use fdt_create_phandle() to create the Fman firmware phandlesTimur Tabi2011-10-15-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | Function fdt_create_phandle() conveniently creates new phandle properties using both "linux,phandle" and "phandle", so it should be used by all code that wants to create a phandle. The Fman firmware code, which embeds an Fman firmware into the device tree, was creating the phandle properties manually. Instead, change it to use fdt_create_phandle(). Signed-off-by: Timur Tabi <timur@freescale.com>
| * fdt: update fdt_alloc_phandle to use fdt_get_phandleTimur Tabi2011-10-15-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree compiler, dtc, can use "phandle" and/or "linux,phandle" properties to specify the phandle for any node. By default, it uses both, but "linux,phandle" is deprecated. One day, we'd like to stop using "linux,phandle", but U-boot needs to support both properties equally first. fdt_alloc_phandle() generates a unique phandle, but it was only checking the "linux,phandle" properties. Instead, we use fdt_get_phandle(), which checks both properties automatically. This ensures that we support dtbs that only use "phandle". The side-effect is that fdt_alloc_phandle() now takes twice as long, since it has to check for two properties instead of one in each node that it searches. Signed-off-by: Timur Tabi <timur@freescale.com>
| * fdt: check for fdt errors in fdt_create_phandleTimur Tabi2011-10-15-3/+10
| | | | | | | | | | | | | | | | | | fdt_create_phandle() was ignoring errors from fdt_set_phandle(). If an error occurs, print an error message and return 0, which is an invalid phandle. We also need to change the return type for fdt_create_phandle() to indicate that it cannot return an error code. Signed-off-by: Timur Tabi <timur@freescale.com>
| * fdt: Add a do_fixup_by_path_string() functionChunhe Lan2011-10-15-0/+7
| | | | | | | | | | | | | | | | The do_fixup_by_path_string() will set the specified node's property to the value contained in "status". It would just be an inline wrapper for do_fixup_by_path() that calls strlen on the argument. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
* | powerpc/85xx: Drop CONFIG_VIDEO on P1_P2_RDB-PC boards to reduce sizeKumar Gala2011-10-13-16/+0
| | | | | | | | | | | | | | | | | | With older compilers (gcc-4.2.x) we run into issues that resulting image is too large. We can save a bunch of space by removing the video support. In general video support on these boards is a nice to have since it requires a PCIe add-on card. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | phylib: wait for TN2020 to achieve SERDES lane alignment at startupTimur Tabi2011-10-13-0/+33
| | | | | | | | | | | | | | | | | | | | Before the Teranetics TN2020 PHY can be used, the SERDES lanes need to be aligned, so wait for lane alignment before completing the startup sequence. Note that this process can take up to three seconds. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/p3060: remove all references to RCW bits EC1_EXT, EC2_EXT, and EC3Timur Tabi2011-10-13-47/+0
| | | | | | | | | | | | | | | | The EC1_EXT, EC2_EXT, and EC3 bits in the RCW don't officially exist on the P3060 and should always be set to zero. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/mpc8548cds: Add 36-bit supportchenhui zhao2011-10-13-0/+57
| | | | | | | | | | Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/mpc8548cds: Code cleanup and refactoringchenhui zhao2011-10-13-97/+75
| | | | | | | | | | | | | | | | | | | | | | | | - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/p3041: fixup portal config infoHaiying Wang2011-10-13-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | P3041 has 10 qman portals, we need to configure all of them: * As there are only 4 physical cores sdest can only be 0 to 3 * We assign dqrr & frame data LIODNs for all portals so if they are utilized the proper mapping tables can be setup uniquely (PAMU stashing) * We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN assignments are tuned around an assumption of at most 5 partitions. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/p2041: fixup portal config infoHaiying Wang2011-10-13-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | P2041 has 10 qman portals, we need to configure all of them: * As there are only 4 physical cores sdest can only be 0 to 3 * We assign dqrr & frame data LIODNs for all portals so if they are utilized the proper mapping tables can be setup uniquely (PAMU stashing) * We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN assignments are tuned around an assumption of at most 5 partitions. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/p5020: fixup portal config infoHaiying Wang2011-10-13-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | P5020 has 10 qman portals, we need to configure all of them: * As there are only 2 physical cores sdest can only be 0 or 1 * We assign dqrr & frame data LIODNs for all portals so if they are utilized the proper mapping tables can be setup uniquely (PAMU stashing) * We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN assignments are tuned around an assumption of at most 5 partitions. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Added secure boot option for P2041RDB boardsKuldip Giroh2011-10-13-0/+1
|/ | | | | Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2011-10-12-1/+2804
|\ | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mips: MIPS: Jz4740: Add qi_lb60 board support MIPS: Jz4740: Add NAND driver MIPS: Ingenic XBurst Jz4740 processor support
| * MIPS: Jz4740: Add qi_lb60 board supportXiangfu Liu2011-10-12-1/+460
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device from Qi hardware: http://en.qi-hardware.com/wiki/Ben_NanoNote http://en.qi-hardware.com/wiki/Main_Page http://en.wikipedia.org/wiki/Qi_hardware This Jz4740-based clamshell device does not use NOR flash to boot. The initial bring-up assumes that U-Boot is directly loaded into SDRAM using USB boot tool, and starts from 0x80100000. About USB boot tool ------------------- Jz4740 is one of the XBurst processors with USB boot functionality supported. The CPU can boot from a small ROM in the LSI, initialize CPU and USB module, then wait for USB commands from the USB host. We can send 8 KB binary data to the CPU cache using USB boot tool. USB boot tool is available to the public at Ingenic website. Also there is an alternative Debian package named xburst-tools. Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
| * MIPS: Jz4740: Add NAND driverXiangfu Liu2011-10-12-0/+262
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Jz4740 NAND flash controller can support: * MLC NAND as well as SLC NAND * all 8-bit/16-bit NAND flash devices * HAMMING and RS hardware ECC * automatic boot up from NAND flash devices nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60. We'll bring up boot-from-NAND support in nand_spl/ in the future. Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
| * MIPS: Ingenic XBurst Jz4740 processor supportXiangfu Liu2011-10-10-0/+2082
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Jz4740 is a multimedia application processor targeting for mobile devices like e-Dictionary, eBook, portable media player (PMP) and GPS navigator. Jz4740 is powered by Ingenic 360 MHz XBurst CPU core (JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture provides high integration, high performance and low power consumption. JzRISC incorporated in Jz4740 is the advanced and power-efficient 32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K D-Cache, and can operate at speeds up to 400 MHz. On-chip modules such as LCD controller, embedded audio codec, multi- channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich suite of peripherals for multimedia application. NAND controller (SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are also available. For more info about Ingenic XBurst Jz4740: http://en.ingenic.cn/eng/ http://www.linux-mips.org/wiki/Ingenic This patch introduces XBurst CPU support in U-Boot. It's compatible with MIPS32, but requires a bit different cache maintenance, timer routines, and boot mechanism using USB boot tool, so XBurst support can go into a separate new home, cpu/xburst/. Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2011-10-12-9/+13
|\ \ | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-ppc4xx: ppc4xx: Change DDR2 CL from 4 to 5 for intip ppc4xx: Improve lm63 pwm on dlvision-10g ppc4xx: Do not stop booting on any keypress on intip
| * | ppc4xx: Change DDR2 CL from 4 to 5 for intipDirk Eibach2011-10-12-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | Some intip boards don't seem to run stable with CL4, datasheets suggest that CL5 is the safe value. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Improve lm63 pwm on dlvision-10gDirk Eibach2011-10-12-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Fan PWM lookuptable was modified to start at 46 degrees celsius instead of 40 degrees celsius. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Do not stop booting on any keypress on intipDirk Eibach2011-10-12-2/+6
| |/ | | | | | | | | | | | | | | Use CONFIG_AUTOBOOT_KEYED on intip so that booting can only be stopped with well defined keypresses. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-ubiWolfgang Denk2011-10-12-8/+10
|\ \ | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-ubi: UBI: init eba tables before wl when attaching a device ubifs bad superblock bug
| * | UBI: init eba tables before wl when attaching a deviceHolger Brunck2011-10-12-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes that u-boot gets stuck when a bitflip was detected during "ubi part <ubi_device>". If a bitflip was detected UBI tries to copy the PEB to a different place. This needs that the eba table are initialized, but this was done after the wear levelling worker detects the bitflip. So changes the initialisation of these two tasks in u-boot. This is a u-boot specific patch and not needed in the linux layer, because due to commit 1b1f9a9d00447d UBI: Ensure that "background thread" operations are really executed we schedule these tasks in place and not as in linux after the inital task which schedule this new task is finished. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ubifs bad superblock bugLars Poeschel2011-10-12-2/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes an issue when ubifs reads a bad superblock. Later it tries to free memory, that was not allocated, which freezes u-boot. This is fixed by looking for a non null pointer before free. The message I got before u-boot freezes: UBI: max/mean erase counter: 53/32 UBIFS: mounted UBI device 0, volume 1, name "rootfs" UBIFS: mounted read-only UBIFS: file system size: 49140 bytes (50319360 KiB, 0 MiB, 49140 LEBs) UBIFS: journal size: 49 bytes (6838272 KiB, 0 MiB, 6678 LEBs) UBIFS: media format: w4/r0 (latest is w4/r0) UBIFS: default compressor: LZO UBIFS: reserved for root: 0 bytes (0 KiB) UBIFS error (pid 0): ubifs_read_node: bad node type (255 but expected 9) UBIFS error (pid 0): ubifs_read_node: bad node at LEB 330:13104 UBIFS error (pid 0): ubifs_iget: failed to read inode 1, error -22 Error reading superblock on volume 'ubi:rootfs'! Signed-off-by: Lars Poeschel <larsi@wh2.tu-dresden.de> Cc: Kyungmin Park <kmpark@infradead.org> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2011-10-12-13/+13
|\ \ | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nand-flash: NAND: davinci: choose correct 1-bit h/w ECC reg
| * | NAND: davinci: choose correct 1-bit h/w ECC regLaurence Withers2011-10-10-13/+13
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In nand_davinci_readecc(), select the correct NANDF<n>ECC register based on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC. This allows 1-bit hardware ECC to work with chip select other than CS2. Note this now matches the usage in nand_davinci_enable_hwecc(), which already had the correct handling, and allows refactoring to a single function encapsulating the register read. Without this fix, writing NAND pages to a chip not wired to CS2 would result in in the ECC calculation always returning FFFFFF for each 512-byte segment, and reading back a correctly written page (one with ECC intact) would always fail. With this fix, the ECC is written and verified correctly. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
generated by cgit v1.1 at 2024-11-20 07:53:53 +0000