| Commit message (Collapse) | Author | Age | Lines |
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The actual memory size is 256MB not 512MB, otherwise it has a wrap
problem in memory and will cause memtester failed.
Signed-off-by: Ye.Li <B37916@freescale.com>
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enable bank interleave feature to improve the performance
downloaded from
http://compass.freescale.net/livelink/livelink?func=ll&objId=234609508&objAction=browse&viewType=1
Before:
$ /opt/fsl-samples/g2d/g2d_test
Width 1920, Height 1088, Format RGBA, Bpp 32
---------------- g2d blit performance ----------------
g2d blit time 15566us, 64fps, 134Mpixel/s ........
g2d blending time 20672us, 48fps, 101Mpixel/s ........
g2d blend-dim time 13616us, 73fps, 153Mpixel/s ........
---------------- g2d clear performance ----------------
g2d clear time 8433us, 118fps, 247Mpixel/s ........
---------------- g2d rotation performance ----------------
90 rotation time 15366us, 65fps, 135Mpixel/s ........
180 rotation time 15374us, 65fps, 135Mpixel/s ........
270 rotation time 15373us, 65fps, 135Mpixel/s ........
g2d flip-h time 15373us, 65fps, 135Mpixel/s ........
g2d flip-v time 15372us, 65fps, 135Mpixel/s ........
...
After:
$ /opt/fsl-samples/g2d/g2d_test
Width 1920, Height 1088, Format RGBA, Bpp 32
---------------- g2d blit performance ----------------
g2d blit time 2810us, 355fps, 743Mpixel/s ........
g2d blending time 4025us, 248fps, 518Mpixel/s ........
g2d blend-dim time 2740us, 364fps, 762Mpixel/s ........
---------------- g2d clear performance ----------------
g2d clear time 1846us, 541fps, 1131Mpixel/s ........
---------------- g2d rotation performance ----------------
90 rotation time 5234us, 191fps, 399Mpixel/s ........
180 rotation time 3176us, 314fps, 657Mpixel/s ........
270 rotation time 5248us, 190fps, 398Mpixel/s ........
g2d flip-h time 2765us, 361fps, 755Mpixel/s ........
g2d flip-v time 3179us, 314fps, 657Mpixel/s ........
...
Signed-off-by: Robby Cai <r63905@freescale.com>
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Add android and sata defconfig file.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Since the mx6ul 9x9 evk has different DDR size with 14x14 evk, change
to use the half of PHYS_SDRAM_SIZE for mtest end.
Signed-off-by: Ye.Li <B37916@freescale.com>
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The DDR initialization in plugin needs to update conformably with DCD.
Signed-off-by: Ye.Li <B37916@freescale.com>
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This piece of code is for mx7, we should not use
do_mx6_showclocks.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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MMDC auto power saving timer can NOT be too small,
as enter/exit auto self-refresh mode too frequently
may introduce too many latency for MMDC access,
set it to 0x10, same as previous value on i.MX6.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Add i.MX6QP SabreSD board support.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Need to check fuse bit 25 of bank 0 word 4 before initialize bee.
The bit: 0 means bee enabled, 1 means bee disabled.
If disabled, continuing initialize bee will cause system hang, so
need to check this bit before initialize bee.
Add macro to enable BEE in header file, default disabled.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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We meet reset failure on mx6ul 9x9 evk. The internal reset logic between MMDC and
functional modules seems relate with the issue.
Turn off the LCDIF to stop DDR access before reset to avoid this possible internal
reset problem.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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The lpddr2 memsize of mx6ul_9x9_evk is 256MB, not 512M, so
the CS0_END should be 0x47, but not 0x4F.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Disable PFuze3000 low power mode during standby mode, otherwise,
if the power consumption exceed the threshold, PFuze will reboot.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Add new build target: mx6ul_9x9_evk_qspi1_config
Signed-off-by: Ye.Li <B37916@freescale.com>
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Updated items:
memory set 0x307a0000 32 0x03040001 --> memory set 0x307a0000 32 0x01040001
This is just enable when LPDDR4 is enabled .
memory set 0x307a0064 32 0x0040005e --> memory set 0x307a0064 32 0x00400046
T_RFC_MIN this should be: RU(260ns*528Mhz)/2=69 (0x45)
memory set 0x307a00d0 32 0x00020001 --> memory set 0x307a00d0 32 0x00020083
PRE_CKE_X1024 be (500us*528Mhz/2)/1024 = 129, or 0x81
memory set 0x307a00d4 32 0x00010000 --> memory set 0x307a00d4 32 0x00690000
DRAM_RSTN_X1024 (200us*528Mhz)/1024=104, or 0x68
memory set 0x307a00e4 32 0x00090004 --> memory set 0x307a00e4 32 0x00100004
DEV_ZQINIT_X32 . Should be 16 clocks
memory set 0x307a0100 32 0x0908120a --> memory set 0x307a0100 32 0x09081109
T_FAW=(40ns*528Mhz)/2)=11
memory set 0x307a0104 32 0x0002020e --> memory set 0x307a0104 32 0x0007020d
tXPDLL=24ns*528Mhz=13clocks
File:
MX7D_EVK_DDR3_1GB_32bit.ds
Test result:
3 boards pass 2 days stress test.
Signed-off-by: Ye.Li <B37916@freescale.com>
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i.MX6UL-9x9-EVK board has PFUZE3000, so enable LDO
bypass support for this board.
Signed-off-by: Anson Huang <b20788@freescale.com>
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CONFIG_FASTBOOT is not used, since we have CONFIG_FSL_FASTBOOT and
CONFIG_CMD_FASTBOOT for fastboot. "drivers/fastboot" can be discarded.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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In current design, if any peripheral was assigned to both A7 and M4,
it will receive ipg_stop or ipg_wait when any of the 2 platforms
enter low power mode. We will have a risk that, if A7 enter wait,
M4 enter stop, peripheral will have chance to get ipg_stop and ipg_wait
asserted same time.
There are 26 peripherals impacted by this IC issue:
SIM2(sim2/emvsim2)
SIM1(sim1/emvsim1)
UART1/UART2/UART3/UART4/UART5/UART6/UART7
SAI1/SAI2/SAI3
WDOG1/WDOG2/WDOG3/WDOG4
GPT1/GPT2/GPT3/GPT4
PWM1/PWM2/PWM3/PWM4
ENET1/ENET2
Software Workaround:
The solution is set M4 to a different domain with A core.
So the peripherals are not shared by them. This way requires
the uboot implemented the RDC driver and set the 26 IPs above to domain 0 only.
CM4 image will set the M4 to domain 1 only.
This patch enables the CONFIG_MXC_RDC for mx7d SABRESD board and ARM2 boards, and
setup the 26 IP resources to domain 0.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add the peripherals/masters definitions and registers base addresses
for mx7d RDC. Enable the RDC driver by setting CONFIG_MXC_RDC.
Signed-off-by: Ye.Li <B37916@freescale.com>
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When dcd_len is 0 the Write Data command that the set_dcd_rst_v2() routine
generates is empty. This causes HAB to complain that the command is invalid.
--------- HAB Event 1 -----------------
event data:
0xdb 0x00 0x0c 0x41 0x33 0x06 0xc0 0x00
0xcc 0x00 0x04 0x04
To fix this set the DCD pointer in the IVT to NULL in this case. The DCD header
itself is still needed for detect_imximage_version() to determine the image
version.
Conflicts:
tools/imximage.c
cherry-picked from
http://git.denx.de/?p=u-boot/u-boot-imx.git;a=commitdiff;h=873bf926bfbb0a667158261813115fa6819661b7
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Stefano Babic <sbabic@denx.de>
(cherry picked from commit 873bf926bfbb0a667158261813115fa6819661b7)
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This mx7d 19x19 lpddr2 arm2 board is based on 19x19 lpddr3 arm2 board
with DDR changed to 512M LPDDR2. We added DDR script for LPDDR2 and
a new u-boot build target: mx7d_19x19_lpddr2_arm2_config
LPDDR2 script source: lpddr2_0_1.ds
Signed-off-by: Ye.Li <B37916@freescale.com>
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Since the i.MX6ul 9x9 evk board only has 256MB LPDDR2, while the
CMA size used in kernel configuration is 320MB, so we have to set
another value for the 9x9 evk board.
This patch sets the cma=96M bootargs to in uboot. So the kernel will
overwrite to use the new value.
Signed-off-by: Ye.Li <B37916@freescale.com>
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The i.mx6ul 9x9 EVK shares the same base board with 6ul 14x14 EVK
with two main changes on CPU board:
1. Change to use pfuze 3000.
2. Use 256MB LPDDR2 memory.
This patch uses a macro CONFIG_6UL_9X9_LPDDR2 to distinguish the changes above,
basing on 14x14 EVK board level codes.
The new build target for the 9x9 EVK: mx6ul_9x9_evk_config
Signed-off-by: Ye.Li <B37916@freescale.com>
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we change it to other values(sabresd dq and auto 6qp 0812 daily build)
Correct the bootargs which is printed.
It should be newbootargs rather than bootimage's bootargs.
Signed-off-by: zhang sanshan <b51434@freescale.com>
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In LPSR mode, wdog will be reset when resume, need
to disable wdog powerdown timer to avoid system
reset after timeout setting of 16 seconds.
Signed-off-by: Anson Huang <b20788@freescale.com>
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As we need to support LPSR mode resume and due to hardware
design requirement, DCD can NOT put DRAM exit from retention
mode, so only plug in mode can do that to support LPSR mode,
so enabled plug in mode by default for imx7d 12x12-lpddr3-arm2
board.
Signed-off-by: Anson Huang <b20788@freescale.com>
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For imx7d 12x12-lpddr3-arm2 board, when system enters LPSR
mode and waked up, ARM core will be reset and uboot needs to be
executed first, the LPSR register contains a resume entery,
if this entry is non-zero, then it means it is a resume from
LPSR mode, uboot plug in code needs to make DRAM exit from
retention mode then jump to the entry directly, otherwise,
it is a cold boot, normal boot process will be performed.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Since setup_waveform_file in different boards code have same implementation,
move setup_waveform_file to board common code. Also rename it to
board_setup_waveform_file
This patch also fix a bug when using flush_cache. We should pass
'waveform_buf' to flush_cache, but not a string named 'addr'.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Support draw image on E-ink screen.
1. The image format should be PGM-P5 raw data format.
2. The image should be named epdc_logo.pgm.
3. If no epdc_logo.pgm found in the first partition(FAT), will choose
to draw black border on the screen.
4. Default configuration is to draw image at pos (0,0). If 'splashpos'
env is set, will choose the pos from 'splashpos'.
5. The image size should not be bigger than screen total pixel size.
6. Implement board_setup_logo_file in board/freescale/common/epdc_setup.c
7. Introudce function prototype for board_setup_logo_file.
Note: i.MX7D EPDC supports advanced mode and standard mode. Since current
PXP in uboot for i.MX7D not ready, only support standard mode now.
advanced and standard mode needs waveform firmware's support.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Datasheet Rev-B defines standby voltage as 1V for i.MX7D, we add
25mV for board level IR drop.
Signed-off-by: Anson Huang <b20788@freescale.com>
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There is narrow window that PRE driver is ready but GPU driver probe later,
and the later GPU driver turn on PU may cause 'PRE hang' issue. To simplify
thing, do not turn off PU in u-boot.
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 6b0787b726e2ff32210d742d93ecd3f4bb2ae402)
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As the HDMI splash screen feature is not well supported,
we should not set it to be the default display. In case,
users leave the 'panel' uboot environment variable empty
and connect the board with a HDMI monitor, the HDMI detect
funtion will work and enable the HDMI splash screen. So,
this patch disables HDMI detect function so that users
may only explicitly set the 'panel' variable to be 'HDMI'
to use HDMI splash screen.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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The bootargs is not set correctly.
The final bootargs consist of uboot's bootargs and bootimg's bootargs.
This patch set bootimg's bootargs as final bootargs if uboot's bootargs is not set.
And take uboot's bootargs as final bootargs if uboot's bootargs is set.
Signed-off-by: zhang sanshan <b51434@freescale.com>
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'fastboot reboot-bootloader' is took as 'fastboot reboot' in V2015.04.
The length of fastboot command is decided by the length of cmd_dispatch_info's cmd.
So need put reboot-bootloader in front of reboot.
Signed-off-by: zhang sanshan <b51434@freescale.com>
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This pin is missed to change in patch:
"MLK-11230 imx6: USB: Modify OTG ID pin pad setting to pull up"
Should set it to pull down at default.
Signed-off-by: Ye.Li <B37916@freescale.com>
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The SW1AB on PMIC is used for ARM_SOC_IN supply, set the standby voltage to
0.975V to save power when system is in DSM mode.
Signed-off-by: Bai Ping <b51503@freescale.com>
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For USB boot, eg, mfgtool programming case, some laptops/pcs
may not work properly if the board do not disconnect until
linux kernel usb driver initialization process, finishes the
ROM code connection at u-boot can fix this problem, and this
was the original work flow when mfgtool flow was introduced at
u-boot.
Tested-by: Spring Zhang <b17931@freescale.com>
Tested-by: Zhang Sanshan <b51434@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add disconnect_from_pc API which is used to disconnect the connection
with PC which is established at rom code.
Tested-by: Spring Zhang <b17931@freescale.com>
Tested-by: Zhang Sanshan <b51434@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add disconnect_from_pc API which is used to disconnect the connection
with PC which is established at rom code.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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To CD/VSELECT/RST, should use same pad settings with USDHC_PAD_CTRL,
because default NO_PAD_CTRL's settings is 100K Pull-Down. But, we need
pull-up for CD/VSELECT/RST.
Also some board provides external pull-down/up, we'd better use internal
pull-up for these pad settings.
To mx7d_12x12_lpddr3_arm2:
If no card plugged in, "mmc dev 1" will show "Card did not respond to
voltage select". After apply this patch, it will show "MMC: no card present".
To mx7dsabresd:
Alougth without this patch, if no card plugged in sd1, still correct msg
"MMC: no card present", anyway we'd better use pull-up.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Enable fastboot command "fastboot flash data"
Custom may need to update data partition in fastboot mode.
This patch enable flash data partition in emmc\sd.
Signed-off-by: Zhang Sanshan <b51434@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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enable fastboot command: "fastboot reboot-bootloader"
After type this command, the board will reboot to bootloader mode.
Set ANDROID_FASTBOOT_BOOT flag in SNVS_LPGPR before reboot.
Signed-off-by: Zhang Sanshan <b51434@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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1. Replace the UDC driver with community's USB gadget d_dnl driver.
2. Integrate the FSL SD/SATA/NAND flash operations, since the GPT and
EFI partitions are not support by i.MX.
3. Add FDT support to community's android image.
4. Change the booti command to boota, due to the booti has been used for
ARM64 image boot.
5. Modify boota implementation to load ramdisk and fdt to their loading
addresses specified in boot.img header, while bootm won't do it for
android image.
6. Modify the android image HAB implementation. Authenticate the boot.img
on the "load_addr" for both SD and NAND.
7. Enable new configuration CONFIG_FSL_FASTBOOT for Freescale's fastboot
with relevant header file "fsl_fastboot.h". While disabling the
configuration, the community fastboot is used.
8. Use community's way to combine cmdline in boot.img and u-boot environment,
not overwrite the cmdline in boot.img
Signed-off-by: Ye.Li <B37916@freescale.com>
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Update ddr script to version 1.07:
1. Change MDCCR from default value to 0x24912492,
it will improve DDR duty cycle
2. The MMDC reorder bypass option, which has better DRAM performance
URL:
http://compass.freescale.net/livelink/livelink?func=ll&objId=234335046&objAction=browse&viewType=1
Test Results:
3 boards passed 48 hours memtester stress test.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Set the ID pin pad to pull up not the pull down at default, otherwise
we can't enter the device mode, but always detect as host.
After this change we have to use portA cable to play as host,
and use portB cable for device.
Signed-off-by: Ye.Li <B37916@freescale.com>
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1. Add weimnor boot defconfig
2. move CONFIG_FSL_USDHC and CONFIG_VIDEO to board header
3. Add CONFIG_SYS_FLASH_PROTECTION for mx6ul 14x14 lpddr2 arm2
4. correct CONFIG_SYS_FLASH_SECT_SIZE and CONFIG_SYS_MAX_FLASH_SECT
5. Add comments for setup_eimnor, since ENET2_RXER pin conflicts
with ENET2. Also eimnor support will disable SD1/SD2, need ENET
to boot kernel and nfs using enet. So setup_eimnor should be
invoked after setup_fec
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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The current pad DSE for QSPI is 60ohm. Per hardware team measurement,
this setting cause too strong drive to clock and data signals. Need
to change the DSE to 120ohm for better signal quality.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Remove epdc qos settings from plugin.S, since set_epdc_qos does same thing.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add missed Kconfig files for mx7d_12x12_ddr3_arm2 board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Fix build warning:
common/lcd.c: In function 'lcd_clear':
common/lcd.c:166:6: warning: variable 'bg_color' set but not used [-Wunused-but-set-variable]
int bg_color;
^
common/lcd.c: In function 'lcd_setmem':
common/lcd.c:296:2: warning: format '%d' expects argument of type 'int', but argument 2 has type 'u_long' [-Wformat=]
debug("LCD panel info: %d x %d, %d bit/pix\n", panel_info.vl_col,
^
common/lcd.c:296:2: warning: format '%d' expects argument of type 'int', but argument 3 has type 'u_long' [-Wformat=]
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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We should divide the 1000MHz ENET PLL clock by 10 in order to achieve
100MHz, so fix the divider accordingly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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