summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-01-27-16/+95
|\
| * 85xx: Add support for 'cpu disable' commandKumar Gala2010-01-26-2/+26
| | | | | | | | | | | | Support disabling of a core via user command 'cpu disable'. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 86xx: Add support for 'cpu disable' commandKumar Gala2010-01-26-17/+34
| | | | | | | | | | | | Support disabling of a core via user command 'cpu disable'. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * Add support to disable cpu's in multicore processorsKumar Gala2010-01-26-1/+39
| | | | | | | | | | | | | | | | | | | | | | Add a disable sub-command to the cpu command that allows for disabling cores in multicore processors. This can be useful for systems that are using multicore chips but aren't utilizing all the cores as a way to reduce power and possibly improve performance. Also updated an added missing copyright. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Fix compiler warning in imximage.c due to getline prototypeKumar Gala2010-01-27-0/+3
|/ | | | | | | imximage.c: In function 'imximage_parse_cfg_file': imximage.c:142: warning: implicit declaration of function 'getline' Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-01-26-5/+2
|\
| * 83xx, kmeter1: fix compile errorHeiko Schocher2010-01-26-5/+2
| | | | | | | | | | | | | | | | | | - delete double MTDIDS_DEFAULT and MTDPARTS_DEFAULT defines in board config file. - add mising CONFIG_KM_UBI_PARTITION_NAME define Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-01-26-12/+50
|\ \
| * | 85xx/p1_p2_rdb: enable hwconfigVivek Mahajan2010-01-25-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | qe: fixup the snum for MPC8569 Rev2.0Liu Yu2010-01-25-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | Since 1.0 and 2.0 use different snum table, we fixup the snum value according to SPRN_SVR. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | Fix the local bus divider mappingDave Liu2010-01-25-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | The real clock divider is 4 times of the bits LCRR[CLKDIV], according the latest RevF RM. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | ppc/85xx: Add ATM config for MPC8569MDSLiu Yu2010-01-25-1/+8
| | | | | | | | | | | | | | | Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | ppc/85xx: Add PIB/ATM support for MPC8569mdsLiu Yu2010-01-25-1/+8
| | | | | | | | | | | | | | | Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | fsl_esdhc: fix wrong clock maskLi Yang2010-01-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Fix typo in SYSCTL_CLOCK_MASK, which caused residual in high bits of SDCLKFS. Signed-off-by: Jin Qing <B24347@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | Revert "ppc/p4080: Fix reporting of PME & FM clock frequencies"Kumar Gala2010-01-25-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit bc20f9a9527afe8ae406a74f74765d4323f04922. The original code was correct. I clearly need glasses or a brown paper bag. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | ppc/p4080: Fix mask width of RCW fields MEM_PLL_RAT, SYS_PLL_RATJames Yang2010-01-25-2/+2
| |/ | | | | | | | | | | | | | | The masks for MEM_PLL_RAT and SYS_PLL_RAT should have been 5-bits instead of 4. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | add ability to handle compressed images to imxtractWolfgang Wegner2010-01-26-7/+85
| | | | | | | | | | | | | | | | imxtract currently can not handle compressed images. This patch adds handling for bzip2 and zip compression. In both cases, a destination address has to be specified for extraction. Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
* | ppc: remove -ffixed-r14 gcc option.Joakim Tjernlund2010-01-26-12/+12
| | | | | | | | | | | | This is no loger needed, free up r14 for general usage. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* | ppc: Update README about the new GOT ptr.Joakim Tjernlund2010-01-26-1/+3
| | | | | | | | | | | | | | | | r14 is no longer used as non volatile GOT ptr. Instead the volatile r12 is used so be sure to do GET_GOT in asm code when you need to access global data. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* | ppc: Use r12 instead of r14 as GOT pointer.Joakim Tjernlund2010-01-26-65/+79
| | | | | | | | | | | | | | | | r14 is not supposed to be clobbered by functions. Switch to r12 and call GET_GOT when needed. This will allow u-boot to loose the -ffixed-r14 gcc option. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* | ppc: Loose GOT access in IRQJoakim Tjernlund2010-01-26-407/+108
|/ | | | | | | | Using the GOT in IRQ handlers requires r14 to be -ffixed-r14. Avoid this by relocatate transfer_to_handler too. This will allow to free up r14 later on. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* jffs2: fix hangs/crashs when not using CONFIG_JFFS2_PART_SIZEMike Frysinger2010-01-26-2/+2
| | | | | | | | | | Commit b5b004ad8a0ac6f98bd5708ec8b22fbddd1c1042 caused the sector_size to be calculated incorrectly when the part size was not hardcoded. This is because the new code relied on part->size but tried to do the calculation before it was initialized properly, and it did not take into consideration the magic SIZE_REMAINING define. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* getline: split out for darwin systemsMike Frysinger2010-01-26-99/+111
| | | | | | | At least on OS X 10.5 and older, getline does not exist. So split out the function from the mingw code so that we can pull it in for Darwin systems. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* tools: give explicit libfdt pathsMike Frysinger2010-01-26-1/+1
| | | | | | | | | The current libfdt object rules hard depend implicitly on the .depend file being correct. If it isn't, then it is unable to properly compile the objects. Give it a full path like all the other implicit rules here so it will always work in face of .depend issues. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* gzip/zlib: make features optionalMike Frysinger2010-01-26-2/+7
| | | | | | | | If you really want to slim down U-Boot and you would rather use a higher compression scheme (like LZMA), it'd be nice to disable gzip/zlib since these code bases take up a significant amount of space. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* mkimage: Add Freescale imx Boot Image support (imximage)Stefano Babic2010-01-25-0/+628
| | | | | | | | | | | | This patch adds support for "imximage" (MX Boot Image) to the mkimage utility. The imximage is used on the Freescales's MX.25, MX.35 and MX.51 processors. Further details under doc/README.imximage. This patch was tested on a Freescale mx51evk board. Signed-off-by: Stefano Babic <sbabic@denx.de>
* mpc5xxx: Support CPU internal watchdog.Detlev Zundel2010-01-25-2/+37
| | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
* mpc512x: Add display of reset status registerDetlev Zundel2010-01-24-5/+7
| | | | | | | | Content of the RSR is put into gd early so we can output it together with the CPU info. The clearing of gd in board_init_f is redundant for this architecture as it is done in cpu_init_f so we remove it. Signed-off-by: Detlev Zundel <dzu@denx.de>
* Merge branch 'master-sync' of git://git.denx.de/u-boot-armWolfgang Denk2010-01-23-41/+5447
|\
| * at91: Enable slow master clock on meesc boardDaniel Gorsulowski2010-01-23-0/+27
| | | | | | | | | | | | | | | | Normally the processor clock has a divisor of 2. In some cases this this needs to be set to 4. Check the user has set environment mdiv to 4 to change the divisor. Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
| * SPEAr : Support added for SPEAr320 boardVipin KUMAR2010-01-23-1/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | SPEAr320 SoC support contains basic spear320 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver - emi driver(cfi support) Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Support added for SPEAr310 boardVipin KUMAR2010-01-23-1/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | SPEAr310 SoC support contains basic spear310 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver - emi driver(cfi support) Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : emi controller initialization for CFI driver supportVipin KUMAR2010-01-23-0/+113
| | | | | | | | | | | | | | | | | | SPEAr310 and SPEAr320 SoCs contain an EMI controller to interface Paraller NOR flashes. This patch adds the support for this IP The standard CFI driver is used to interface with NOR flashes Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Support added for SPEAr300 boardVipin KUMAR2010-01-23-0/+194
| | | | | | | | | | | | | | | | | | | | | | | | SPEAr300 SoC support contains basic spear300 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Support for HW mac id read/write from i2c memVipin KUMAR2010-01-23-1/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the support to read and write mac id from i2c memory. For reading: if (env contains ethaddr) pick env ethaddr else pick ethaddr from i2c memory For writing: chip_config ethaddr XX:XX:XX:XX:XX:XX writes the mac id in i2c memory Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Support added for SPEAr600 boardVipin KUMAR2010-01-23-0/+928
| | | | | | | | | | | | | | | | | | | | | | | | SPEAr600 SoC support contains basic spear600 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : usbd driver support for SPEAr SoCsVipin KUMAR2010-01-23-0/+1231
| | | | | | | | | | | | | | | | | | | | | | | | | | SPEAr SoCs contain a synopsys usb device controller. USB Device IP can work in 2 modes - DMA mode - Slave mode The driver adds support only for slave mode operation of usb device IP. This driver is used along with standard USBTTY driver to obtain a tty interface over USB on the host Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : nand driver support for SPEAr SoCsVipin KUMAR2010-01-23-0/+182
| | | | | | | | | | | | | | | | SPEAr SoCs contain an FSMC controller which can be used to interface with a range of memories eg. NAND, SRAM, NOR. Currently, this driver supports interfacing FSMC with NAND memories Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : smi driver support for SPEAr SoCsVipin KUMAR2010-01-23-0/+639
| | | | | | | | | | | | | | | | SPEAr SoCs contain a serial memory interface controller. This controller is used to interface with spi based memories. This patch adds the driver for this IP. Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : i2c driver support added for SPEAr SoCsVipin KUMAR2010-01-23-0/+478
| | | | | | | | | | | | | | SPEAr SoCs contain a synopsys i2c controller. This patch adds the driver for this IP. Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Adding basic SPEAr architecture support.Vipin KUMAR2010-01-23-0/+578
| | | | | | | | | | | | | | | | | | | | SPEAr Architecture support added. It contains the support for following SPEAr blocks - Timer - System controller - Misc registers Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Adding README.spear in docVipin KUMAR2010-01-23-0/+48
| | | | | | | | | | | | | | README.spear contains information about SPEAr architecture and build options etc Signed-off-by: Vipin <vipin.kumar@st.com>
| * ARM Update mach-typesTom Rix2010-01-23-0/+351
| | | | | | | | | | | | | | | | | | | | Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 2045124ffd1a5e46d157349016a2c50f19c8c91d Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| * Kirkwood: Makefile cleanup- fixed ordering (cosmetic change)Prafulla Wadaskar2010-01-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | As per coding guidlines, it is good to maintain proper ordering in the makefiles. This was missed during initial coding, corrected here. This was discovered during orion5x code review Thanks to Albert Aribaud for this. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * Kirkwood: Upgated licencing for files imported from linux source to GPLv2 or ↵Prafulla Wadaskar2010-01-23-14/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | later These are few files directly imported from Linux kernel source. Those are not modifyed at all ar per strategy. These files contains source with GPLv2 only whereas u-boot expects GPLv2 or latter These files are updated for the same from prior permission from original writes Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * s5pc1xx: update cache routinesMinkyu Kang2010-01-23-23/+130
| | | | | | | | | | | | | | | | | | | | Because of v7_flush_dcache_all is moved to omap3/cache.S and s5pc110 needs cache routines, update s5pc1xx cache routines. l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S and invalidate_dcache is modified for SoC specific. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * samsung: fix DMC1_MEM_CFG for s3c64xxSeunghyeon Rhee2010-01-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MSB of DMC1_MEM_CFG can be set to '1' for separate CKE control for S3C6400. In the configuration of SMDK6400, however, two 16-bit mDDR (SAMSUNG K4X51163) chips are used in parallel to form 32-bit memory bus and there is no need to control CKE for each chip separately. AFAIK, CKE1 is not at all connected. Only CKE0 is used. Futhermore, it should be '0' always for S3C6410. When tested with a board which has a S3C6410 and the same memory configuration, a side effect is observed that u-boot command "reset" doesn't work leading to system hang. Leaving the bit clear is safe in most cases. Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | ppc4xx: Kilauea: Add CPLD version detection and EBC reconfigurationStefan Roese2010-01-23-5/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A newer CPLD version on the 405EX evaluation board requires a different EBC controller setup for the CPLD register access. This patch adds a CPLD version detection for Kilauea and code to reconfigure the EBC controller (chip select 2) for the old CPLD if no new version is found. Additionally the CPLD version is printed upon bootup: Board: Kilauea - AMCC PPC405EX Evaluation Board (CPLD rev. 0) Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Cc: Zhang Bao Quan <bqzhang@udtech.com.cn>
* | ppc4xx: Fix sending type 1 PCI transactionsFelix Radensky2010-01-23-1/+2
|/ | | | | | | | | | The list of 4xx SoCs that should send type 1 PCI transactions is not defined correctly. As a result PCI-PCI bridges and devices behind them are not identified. The following 4xx variants should send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
* mpc512x: Use in/out accessors for all registersDetlev Zundel2010-01-21-18/+19
| | | | | | | This is not only a cosmetic change as it fixes the real bug of board reset not working with the ELDK 4.2 toolchain. Signed-off-by: Detlev Zundel <dzu@denx.de>
generated by cgit v1.1 at 2024-09-20 00:35:22 +0000