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* powerpc/85xx: enable some P1/P2 boards mtdparts for nor flashYangbo Lu2014-11-14-0/+75
| | | | | | | | | | Enable these boards mtdparts for nor flash: p1020rdb-pd, p1021rdb-pc, p1022ds, p1025twr, and p2020rdb-pc. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Scott Wood <scottwood@freescale.com>
* keymile/powerpc: move to the architecture-generic board systemValentin Longchamp2014-11-14-0/+9
| | | | | | | | | | | This converts all the Keymile powerpc boards to the generic board initialization. This includes the 3 Keymile powerpc subsystems: km82xx, km83xx, and kmp204x. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/mpc83xx: Zero boot_flags arg for calling board_init_f()Valentin Longchamp2014-11-14-0/+1
| | | | | | | | | | | | | The argument boot_flags of board_init_f() is not used at all in the powerpc specific board.c init sequence. Now with the generic init sequence, this boot_flags arg is used by board_init_f(). This patch sets the r3 register that is used to pass the boot_flags argument from the start.S board_init_f() call to 0 prior to the function call to avoid unknown content to end up in gd->flags. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/BSC9131RDB: Enable creation of dynamic partitions for NANDAshish Kumar2014-11-14-0/+28
| | | | | | | | | | * fdt_fixup_mtdparts is called from ft_board_setup * Run "mtdparts default" to create NAND partition on uboot * Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/BSC9132QDS: Enable creation of dynamic partition for NAND and NORAshish Kumar2014-11-14-0/+33
| | | | | | | | | | * fdt_fixup_mtdparts is called from ft_board_setup * run "mtdparts default" to create NAND, NOR partition on uboot * Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/mpc85xx: Use IFC accessor functionPrabhakar Kushwaha2014-11-14-4/+4
| | | | | | | | | | IFC registers can be of type Little Endian or big Endian depending upon Freescale SoC. Here SoC defines the register type of IFC IP. So use IFC acessor functions instead of in_be32(). Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* t104xrdb: Add Errata A_007662, A_008007 workaround in pbi.cfgPriyanka Jain2014-11-14-0/+10
| | | | | | | | | | | | | | | | | -A_007662 states that for x1 link width, PCIe2 controller trains in Gen1 speed while configured for Gen2 speed. Workaround:Set the width to x1 and speed to Gen2 by writing to CCSR registers in PBI phase -A_008007 states that PVR register may show random value. Workaround: Reset PVR register using DCSR space in PBI phase Add PBI based software workaround for A_007662 and A_008007 in t104x_pbi.cfg. This is required for SPL-based bootloaders like NAND-boot, SD-boot, SPI-boot Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/t4rdb: Add support of CPLDChunhe Lan2014-11-14-0/+229
| | | | | | | | | | | This support of CPLD includes - Files and register definitions - Command to switch alternate bank - Command to switch default bank Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* 85xx/b4:Correct USB DR controller liodn entryramneek mehresh2014-11-14-1/+1
| | | | | | | | | | | | | LIODN entry for B4860/B4420 mentions USB controller as "mph" insread of "dr". This results in PAMU not permitting bus transactions for USB DR controller on B4860 resulting in USB function failure. Replacing "fsl-usb2-mph" with "fsl-usb2-dr" allows USB DR controller bus transactions Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Reviewed-by: Sethi Varun-B16395 <Varun.Sethi@freescale.com> Reviewed-by: Sun Yusong-R58495 <yorksun@freescale.com>
* sbc8548: enable and test CONFIG_SYS_GENERIC_BOARDPaul Gortmaker2014-11-14-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested on the following baseline (note "dirty" since I enabled ALT_BOOT in the config in order to use the alternate boot bank.) Everything seems to work fine with no additional changes. The banner warning message is now gone. --- U-Boot 2014.10-rc1-00075-ge49f14af1349-dirty (Aug 14 2014 - 10:26:15) CPU: 8548E, Version: 2.1, (0x80390021) Core: e500, Version: 2.2, (0x80210022) Clock Configuration: CPU0:990 MHz, CCB:396 MHz, DDR:198 MHz (396 MT/s data rate), LBC:99 MHz L1: D-cache 32 KiB enabled I-cache 32 KiB enabled I2C: ready DRAM: Detected UDIMM SDRAM: 128 MiB 256 MiB (DDR2, 64-bit, CL=3, ECC off) Flash: 72 MiB L2: 512 KiB enabled *** Warning - bad CRC, using default environment PCI: Host, 64 bit, 66 MHz, sync, arbiter 00:01.0 - 8086:1026 - Network controller PCI1: Bus 00 - 00 PCIe1: Root Complex, x1 gen1, regs @ 0xe000a000 02:00.0 - 1148:9e00 - Network controller PCIe1: Bus 01 - 02 In: serial Out: serial Err: serial Net: eTSEC0 [PRIME], eTSEC1 Hit any key to stop autoboot: 0 => ver U-Boot 2014.10-rc1-00075-ge49f14af1349-dirty (Aug 14 2014 - 10:26:15) powerpc-linux-gcc (GCC) 4.5.2 GNU ld (GNU Binutils) 2.21 => --- Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver/net/fm/memac_phy: set NEG bit for external MDIOsShaohui Xie2014-11-14-1/+5
| | | | | | | | | | NEG bit default is '1' for external MDIOs as per FMAN-v3 RM, but on some platforms, e.g. T2080QDS, this bit is '0', which leads to MDIO failure on XAUI PHY, so set this bit definitely to align with the RM. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Fman/mEMAC: mEMAC fix for 10G MAC and PHYShaohui Xie2014-11-14-3/+12
| | | | | | | | | | | | 1. use Payload length check disable when enable MAC; 2. add XGMII support for setting MAC interface mode; 3. only enable auto negotiation for Non-XGMII mode; 4. return 0xffff if clause 22 is used to read 10G phy_id; Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-By: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* mpc85xx/kmp204x: raise u-boot size to 768KBValentin Longchamp2014-11-14-2/+2
| | | | | | | | | | | | | | Until now this defined to be 512KB and the total binary size actually was on the edge of this limit. Most of the powerpc boards have thus moved to 768KB. Since on the current kmp204x boards there is 1MB reserved for u-boot on the SPI boot flash, there is no problem to set the limit to 768KB as well to be on line with the other powerpc boards and to eventually configure in some additional features (and binary size) to u-boot. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2014-11-13-226/+1883
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| * sunxi: gmac: Update bananapi fixup to the new CONFIG_TARGET_<BOARD> structureZoltan HERPAI2014-11-13-1/+1
| | | | | | | | | | | | | | | | The magic bit toucher needs to be updated to reflect the new board Kconfig structure Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sun6i: ehci: Add sun6i ehci supportHans de Goede2014-11-13-16/+61
| | | | | | | | | | | | | | | | Add support for the 2 ehci controllers found on the sun6i (A31) soc. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Marek Vasut <marex@denx.de>
| * sunxi: ehci: Add proper Kconfig options to select the usb Vbus gpio-sHans de Goede2014-11-13-30/+51
| | | | | | | | | | | | | | | | | | Add proper Kconfig options to select the usb Vbus gpio-s, besides moving to Kconfig being the right thing to do, an added advantage of this is that it allows for boards without Vbus gpio-s. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun6i: Add Mele M9 boardHans de Goede2014-11-13-0/+20
| | | | | | | | | | Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun6i: Enable SPLHans de Goede2014-11-13-4/+6
| | | | | | | | | | | | | | Enable the SPL now that we've all the necessary bits in place. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun6i: Poke magic sram controller register to avoid cache issuesHans de Goede2014-11-13-0/+5
| | | | | | | | | | | | | | | | Without this the cache will only work in write-through mode, and as soon as it is put in write-back mode things break. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun6i: Add dram initialization codeHans de Goede2014-11-13-3/+804
| | | | | | | | | | | | | | | | | | | | | | | | Add full support for dram initialization, using a fixed clock and autodetection of the memory organization (numbers of channels, bus-width, etc.). This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 SDK, extended with extra initialization sequences and the autodetect algorithm from boot0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun4i: Rename dram files to dram_sun4i.xHans de Goede2014-11-13-168/+187
| | | | | | | | | | | | | | In preparation for adding sun6i dram support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun6i: Add cpucfg register definitionsHans de Goede2014-11-13-3/+71
| | | | | | | | | | | | | | Not used atm, for future use (e.g. PSCI). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun6i: Add clock functions needed for SPL / DRAM initHans de Goede2014-11-13-1/+106
| | | | | | | | | | | | | | | | | | | | Add clock_init_safe and clockset_pll5 functions, as these are needed for SPL support resp. DRAM init (which is needed for SPL too). Also add some extra clock register constant defines. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun6i: Add basic axp221 driverOliver Schinagl2014-11-13-0/+310
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A31 uses the AXP221 pmic for various voltages. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> -- Changes in v2: -Rebase Changes in v3: -Add support for all dldo and aldo-s -Add Kconfig option to select building AXP221 and to select voltage of dldo and aldo-s Changes in v4: -Add axp221_setbits helper function -Use symbolic names for enabled bits in CTRL1 - CTRL3 registers
| * sun6i: Add new p2wi controller driverOliver Schinagl2014-11-13-0/+261
| | | | | | | | | | | | | | | | | | | | | | The A31 uses a new push-pull two wire interface, which features higher transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8 bytes each time, this driver will only see very little use and thus is limited to single byte transmission only. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-11-13-143/+16
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| * | ARM: remove unused CPU directoryMasahiro Yamada2014-11-13-132/+0
| | | | | | | | | | | | | | | | | | | | | There is no board with CPU "arm_intcm". Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * | km_arm: convert the km_arm boards to the generic board supportValentin Longchamp2014-11-12-0/+2
| | | | | | | | | | | | | | | | | | | | | This implies that all the km_kirkwood boards and their variants now are using the generic board init sequence. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
| * | malloc: Output region when debuggingThierry Reding2014-11-12-0/+3
| | | | | | | | | | | | | | | | | | | | | When DEBUG is set, output memory region used for malloc(). Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | ARM: cache-cp15: Use more accurate typesThierry Reding2014-11-12-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | size_t is the canonical type to represent variables that contain a size. Use it instead of signed integer. Physical addresses can be larger than 32-bit, so use a more appropriate type for them as well. phys_addr_t is a type that is 32-bit on systems that use 32-bit addresses and 64-bit if the system is 64-bit or uses a form of physical address extension to use a larger address space on 32-bit systems. Using these types the same API can be implemented on a wider range of systems. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | ARM: cache_v7: Various minor cleanupsThierry Reding2014-11-12-7/+7
| |/ | | | | | | | | | | | | | | | | | | | | Remove two gratuituous blank lines, uses u32 (instead of int) as the type for values that will be written to a register, moves the beginning of the variable declaration section to a separate line (rather than the one with the opening brace) and keeps the function signature on a single line where possible. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | arm: mx6: Fix missing Kconfig option for NovenaMarek Vasut2014-11-13-1/+2
| | | | | | | | | | | | | | | | | | | | | | Add two missing Kconfig options for Novena and drop the SPL from the Novena config. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Sean Cross <xobs@kosagi.com> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | zynq: zybo: Move CONFIG_DEFAULT_DEVICE_TREE to defconfigMichal Simek2014-11-13-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a MIME GnuPG-signed message. If you see this text, it means that your E-mail or Usenet software does not support MIME signed messages. The Internet standard for MIME PGP messages, RFC 2015, was published in 1996. To open this message correctly you will need to install E-mail or Usenet software that supports modern Internet standards. Move CONFIG_DEFAULT_DEVICE_TREE from board config directly to defconfig. This patch removes compilation warning: include/configs/zynq_zybo.h:24:0: warning: "CONFIG_DEFAULT_DEVICE_TREE" redefined [enabled by default] #define CONFIG_DEFAULT_DEVICE_TREE zynq-zybo Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-11-13-3/+71
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| * | kconfig: zynq: Add ZYBO boardPeter Crosthwaite2014-11-11-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a defconfig and Kconfigury for the Digilent ZYBO board. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | configs: zynq: Add config support for ZYBOTinghui Wang2014-11-11-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds config support needed for ZYBO target and has been tested on Rev. B ZYBO hardware. Signed-off-by: Tinghui Wang <steven.wang@digilentinc.com> [PC changes: * Dropped boards.cfg change (rebase conflict) * Dropped custom u-boot env * Added DTS * Misc forward-porting changes ] Signed-off-by: Peter Crosthwiate <crosthwaite.peter@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm: dts: zynq: Add digilent ZYBO board dtsPeter Crosthwaite2014-11-11-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | It's a Zynq board similar in design to the currently supported ones. 512MB of RAM and UART1 is used. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | zynq: Use GPLed files for SPLSoren Brinkmann2014-11-11-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The latest Xilinx tools generate ps7_init files that are explicitly available under GPL. Change the makefile to allow drop in of those files for building the SPL. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Reviewed-and-tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | kconfig: arm: move "armv8" define to arch/arm/KconfigMasahiro Yamada2014-11-13-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs) collected the default values of CONFIG_SYS_CPU into arch/arm/Kconfig. This commit moves "armv8" to there for consistency. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Georges Savoundararadj <savoundg@gmail.com>
* | | kconfig: arm: select CPU_V7 for some new boardsMasahiro Yamada2014-11-13-25/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds "select CPU_V7" for some new boards that were not covered by commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs). Redundant "SYS_CPU" defines and "string" directives should be removed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Georges Savoundararadj <savoundg@gmail.com>
* | | kbuild: Make scripts executableMasahiro Yamada2014-11-12-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Makefiles call the respective interpreter explicitly, but this makes it easier to use the scripts manually. (This commit follows commit 06ed5c2bfaca of Linux Kernel) Signed-off-by: Michal Marek <mmarek@suse.cz> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | powerpc: remove orphaned boards mcc200 and prs200Nikita Kiryanov2014-11-12-1600/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mcc200 and prs200 are old and have no maintainer. Remove the boards. This also removes the mcc200 specific 1bpp BMP support from common/lcd.c Cc: Wolfgang Denk <wd@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2014-11-11-1/+1042
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| * | | arm: socfpga: Add socfpga_spim_enable() to reset_manager.cStefan Roese2014-11-07-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. As the SPI master controller is held in reset by the current Preloader implementation. So we need to release the reset for the driver to communicate with the controller. This function is called from arch_early_init_r() if the SPI driver is enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
| * | | arm: socfpga: Add DW master SPI clock to clock_manager.cStefan Roese2014-11-07-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
| * | | arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates targetStefan Roese2014-11-07-0/+963
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch includes the latest DT sources for socfpga from the current Linux kernel. And enables CONFIG_OF_CONTROL for the new build target "socfpga_socrates" (the EBV SoCrates board) to make use of this new DT support. Until this patch, the only SoCFPGA U-Boot target in mainline is "socfpga_cyclone5". This build target is not (yet) changed to support DT. So nothing changes for this target. Even though the long-term goal should be to move all SoCFPGA targets over to DT. One of the reasons to enable DT support in SoCFPGA is, that I need to support multiple different SPI controllers for this platform. This is the QSPI Cadence controller and the Designware SPI master controller. Both are implemented in the SoCFPGA. And enabling both controllers is only possible by using the new driver model (DM). The DM SPI code only supports DT based probing. So it was easier to move SoCFPGA to DT than to add the (deprecated) platform-data based probing to the DM SPI suport. Note that the image with the dtb embedded is u-boot-dtb.img. This needs to be used now for those DT enabled boards instead of u-boot.img. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Pavel Machek <pavel@denx.de> Cc: Simon Glass <sjg@chromium.org>
| * | | socfpga_cyclone5.h: fix kernel console argument in default environmentAnatolij Gustschin2014-11-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With fresh environment the kernel gets wrong console argument and boots without console output. Fix it. Reported-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Marek Vasut <marex@denx.de>
| * | | arm: socfpga: Add example config entry for EPCS/EPCQ SPIMarek Vasut2014-10-31-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add example config file entry for the Altera SPI controller. This SPI controller can also, under special conditions, be used to operate the EPCS/EPCQ SPI NOR. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | arm: socfpga: Add I2C support to SoCFPGAStefan Roese2014-10-30-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds I2C support for the SoCFPGA. Using the designware I2C controller driver. It supports all 4 I2C busses on the SoCFPGA. The designware I2C driver has now been converted to the CONFIG_SYS_I2C framework. So lets enable it on SoCFPGA. Tested on SoCrates. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de>
generated by cgit v1.1 at 2024-11-07 16:59:55 +0000