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| | * | power: Rename CONFIG_PMIC_... to CONFIG_POWER_...Simon Glass2014-05-28-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit be3b51aa did this mostly, but several have been added since. Do the job again. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | exynos: Drop old smdk5250.c fileSimon Glass2014-05-28-367/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is not used by any boards now. Drop it to avoid confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | exynos: dts: Correct EC interrupt GPIOSimon Glass2014-05-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the GPIO numbering series has been applied, we can use the correct GPIO for the EC interrupt. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | ARM: exynos5420: removed undefined gpio structureJaehoon Chung2014-05-16-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It's removed the exynos5_gpio_part1. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | mmc: s5p_sdhci: add the s5p_sdhci_core_init functionJaehoon Chung2014-05-16-25/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To reuse the code, added the s5p_sdhci_core_init function. Before applied this patch, didn't use the 8-bit mode at exynos baord. Because it didn't set "MMC_MODE_8BIT". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | ARM: exynos4: enable the dwmmc configurationJaehoon Chung2014-05-16-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | mmc: exynos_dw_mmc: enable the DDR modeJaehoon Chung2014-05-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the ddr mode capability by default. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | ARM: dts: exnyos: enable dw-mmc controllerJaehoon Chung2014-05-16-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabled the dw-mmc controller. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | mmc: dw_mmc: support the DDR modeJaehoon Chung2014-05-16-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support the DDR mode at dw-mmc controller Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | mmc: support the DDR mode for eMMCJaehoon Chung2014-05-16-3/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | mmc: remove the unnecessary define and fix the wrong bit controlJaehoon Chung2014-05-16-13/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Lukasz Majeski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | mmc: exynos_dw_mmc: restore the property into hostJaehoon Chung2014-05-16-73/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Restore the platdata(property of dt) into host struct. Then data's information is maintained and reused anywhere. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMCJaehoon Chung2014-05-16-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | ARM: exynos: clock: modify the set_mmc_clk for exynos4Jaehoon Chung2014-05-16-5/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modified the mmc_set_clock for eynos4. The goal of this patch is that fsys-div register should be reset. And retore the div-value, not using the value of lowlevel_init. (For using SDMMC4, this patch is needs) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | ARM: exynos: board: change the mmc/sd init sequenceJaehoon Chung2014-05-16-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Exynos4 can be used the dwmmc controller for eMMC. Then it needs to check dwmmc_init() at first. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | board: trats2: Enable device tree on Trats2Beomho Seo2014-05-16-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add dwmmc emmc controller node on exynos4 and exynos4412 device tree. Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Piotr Wilczek <p.wilczek@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Piotr Wilczek <p.wilczek@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | arm: exynos: clock: Remove exynos4x12_set_mmc_clk functionBeomho Seo2014-05-16-28/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | exynos4x12_set_mmc_clk function have been removed. Because, exynos4x12_clock and exynos4_clock return same div_fsys* value. Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Piotr Wilczek <p.wilczek@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Piotr Wilczek <p.wilczek@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | arm: exynos: pinmux: add sdmmc4 gpio configratuionBeomho Seo2014-05-16-6/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For use dwmmc controller at exynos4, add SDMMC4 gpio configuration. Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Piotr Wilczek <p.wilczek@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Piotr Wilczek <p.wilczek@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | arm: goni: enable USB Mass StorageMateusz Zalega2014-05-16-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | UMS-related defines were added to Samsung Goni config header. Signed-off-by: Mateusz Zalega <m.zalega@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | arm: goni: enable GPT commandMateusz Zalega2014-05-16-0/+5
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Mateusz Zalega <m.zalega@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | arm: goni: dfu: Add support for DFU to Goni targetMateusz Zalega2014-05-16-11/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Proper adjustment for supporting DFU at GONI target has been made. The s5p_goni.h file has been updated. Moreover the code for low level USB initialization has been added to GONI board code. The malloc pool has been enlarged in order to support larger buffer sizes needed by DFU implementation. Signed-off-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mateusz Zalega <m.zalega@samsung.com> Tested-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com> Tested-by: Mateusz Zalega <m.zalega@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | arm: goni: Update configuration for Goni targetMateusz Zalega2014-05-16-26/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Configuration file for GONI has been updated to support FAT file system, new mmc partitioning scheme and read linux kernel from eMMC instead of OneNAND. Signed-off-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mateusz Zalega <m.zalega@samsung.com> Tested-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com> Tested-by: Mateusz Zalega <m.zalega@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-06-05-69/+683
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| * | | | driver/ddr/fsl: Fix printing unspecified module info for DDR4York Sun2014-06-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The offset of module information is at 128, different from DDR3. Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | powerpc/mpc85xx: Add workaround to enable TDM on T1040Sandeep Singh2014-06-05-1/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a workaround for 32 bit hardware limitation of TDM. T1040 has 36 bit physical addressing, TDM DMAC register are 32 bit wide but need to store address of CCSR space which lies beyond 32 bit address range. This workaround creats a LAW to enable access of TDM DMA to CCSR by mapping CCSR to overlap with DDR. A hole of 16M is created in memory using device tree. This workaround law is set only if "tdm" is defined in hwconfig. Also disable POST tests and add LIODN for TDM Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | powerpc/B4420: Fixed incomplete handling for 0x9d serdes2poonam aggrwal2014-06-05-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Crossbars and IDT were not getting configured for Serdes2 protocol 0x9d for B4420. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | powerpc/serdes: Add the workaround for erratum A-007186Shaveta Leekha2014-06-05-2/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SerDes PLL is calibrated at reset. When the junction temperature delta from the time the PLL is calibrated exceeds +56C/-66C, jitter may increase and can cause PLL to unlock. This workaround overwrite the SerDes registers with new values, to calibrate SerDes registers. These values are known to work fine for all temperature ranges. This workaround is valid for B4, T4 and T2 platforms, so added in their config. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com> [York Sun: replaced typedef ccsr_sfp_regs_t with struct ccsr_sfp_regs] Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | powerpc/mpc85xx: Add workaround for DDR erratum A004508York Sun2014-06-05-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the DDR controller is initialized below a junction temperature of 0°C and then operated above a junction temperature of 65°C, the DDR controller may cause receive data errors, resulting ECC errors and/or corrupted data. This erratum applies to the following SoCs and their variants: MPC8536, MPC8569, MPC8572, P1010, P1020, P1021, P1022, P1023, P2020. Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | powerpc/t2080: add serdes2 protocol 0x27Shengzhou Liu2014-06-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new serdes2 protocol 0x27. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | powerpc/espi: remove 80us delay to improve transfer performanceHou Zhiqiang2014-06-05-32/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace 80 mircoseconds delay with polling flag ESPI_EV_TXE. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | powerpc/t4rdb: Add alternate serdes protocols to align with A-007186Chunhe Lan2014-06-05-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A-007186: SerDes PLL is calibrated at reset. It is possible for jitter to increase and cause the PLL to unlock when the temperature delta from the time the PLL is calibrated exceeds +56C/-66C when using X VDD of 1.35 V (or +70C/-80C when using XnVDD of 1.5 V). No issues are seen with LC VCO. The protocols only using Ring VCOs are impacted. Workaround: For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring VCO, this need to use alternate serdes protocols. Alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | board/t2080qds: some update for ddrShengzhou Liu2014-06-05-16/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add support for 2nd DIMM slot. - make it work with DIMM which is less than 2GB. Verified with two 2GB UDIMM MT9JSF25672AZ-2G1K1 in two DIMM slots. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | powerpc/t4qds: Add alternate serdes protocols to align with A-007186Shaohui Xie2014-06-05-2/+221
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A-007186: SerDes PLL is calibrated at reset. It is possible for jitter to increase and cause the PLL to unlock when the temperature delta from the time the PLL is calibrated exceeds +56C/-66C when using X VDD of 1.35 V (or +70C/-80C when using XnVDD of 1.5 V). No issues are seen with LC VCO. Only the protocols using Ring VCOs are impacted. Workaround: For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring VCO, this need to use alternate serdes protocols. The alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | board/t208x: update t2080qds/t2080rdb for errata A-007186Shengzhou Liu2014-06-05-12/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As errata A-007186, we need to use the alternate serdes protocol instead of those impacted protocols. - add support for serdes protocols: 0x1b, 0x50, 0x5e, 0x64, 0x6a, 0xd2, 0x67, 0x70. - update t2080_rcw.cfg to adapt to new rcw_66_15 for t2080qds and t2080rdb. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | | fs: fatwrite: use map_sysmem before use file_fat_writeWu, Josh2014-06-05-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the map_sysmem, then the fatwrite command can support sandbox. Following command will show how to use it: => sb bind 0 sd.img => fatls host 0 => fatwrite host 0 $memaddr filename $filesize Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | | tools: refactor HOSTLOADLIBES_* optionsMasahiro Yamada2014-06-05-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tools mkimage, dumpimage, fit_info, fit_check_sign always have the common libraries to be linked, so HOSTLOADLIBES_* can be consolidated a little bit. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | | nand_spl: remove nand_spl infrastructureMasahiro Yamada2014-06-05-458/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the common infrastructure of nand_spl and clean-up the code inside ifdef(CONFIG_NAND_U_BOOT)..endif. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | nand_spl: remove simpc8313 supportMasahiro Yamada2014-06-05-1131/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Also update README.scrapyard. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | nand_spl: remove MPC8315ERDB_NAND supportMasahiro Yamada2014-06-05-141/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | nand_spl: remove MPC8536DS supportMasahiro Yamada2014-06-05-186/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | nand_spl: remove MPC8569MDS_NAND supportMasahiro Yamada2014-06-05-181/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | nand_spl: remove MPC8572DS_NAND supportMasahiro Yamada2014-06-05-189/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | nand_spl: remove P1023RDS_NAND supportMasahiro Yamada2014-06-05-236/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | kbuild: move cmd_mkimage to scripts/Makefile.libMasahiro Yamada2014-06-05-17/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because cmd_mkimage is used in various subdirectories, it seems reasonable to define it in scripts/Makefile.lib. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | kbuild: use cmd_shipped instead of cmd_copyMasahiro Yamada2014-06-05-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already have cmd_shipped in scripts/Makefile.lib. Use it rather than defining a new command cmd_copy. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | boards.cfg: move many unmaintained boards to OrphanMasahiro Yamada2014-06-05-42/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Emails to the following addresses have been bouncing. Albin Tonnerre <albin.tonnerre@free-electrons.com> Anton Shurpin <shurpin.aa@niistt.ru> Brent Kandetzki <brentk@teleco.com> Dan Malek <dan@embeddedalley.com> Frank Panno <fpanno@delphintech.com> Gary Jennejohn <garyj@denx.de> Hayden Fraser <Hayden.Fraser@freescale.com> Eric Millbrandt <emillbrandt@dekaresearch.com> Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Kumar Gala <kumar.gala@freescale.com> Joe D'Abbraccio <ljd015@freescale.com> John Zhan <zhanz@sinovee.com> Keith Outwater <Keith_Outwater@mvis.com> Julien May <julien.may@miromico.ch> Kári Davíðsson <kd@flaga.is> Kyle Moffett <Kyle.D.Moffett@boeing.com> Leo Sartre <lsartre@adeneo-embedded.com> Mike Dunn <mikedunn@newsguy.com> Dave Ellis <DGE@sixnetio.com> Chan-Taek Park <c-park@ti.com> Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com> I am Ccing the current working addresses for some of them. If you want to get back an Orphan board to Active, please update your email address. Please do it only if you still have a real hardware to test on. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albin Tonnerre <albin.tonnerre@gmail.com> Cc: Anton Shurpin <anton.shurpin@gmail.com> Cc: Brent Kandetzki <brent.kandetzki@stw-technic.com> Cc: Dan Malek <dan.malek@konsulko.com> Cc: Gary Jennejohn <gljennjohn@googlemail.com> Cc: Haavard Skinnemoen <haavard.skinnemoen@gmail.com> ? Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Mike Dunn <mikedunn@newsguy.com> CC: Jerry Van Baren <vanbaren@cideas.com>
* | | | | Prevent a buffer overflow in mkimage when signing with SHA256Michael van der Westhuizen2014-06-05-12/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to the FIT_MAX_HASH_LEN constant not having been updated to support SHA256 signatures one will always see a buffer overflow in fit_image_process_hash when signing images that use this larger hash. This is exposed by vboot_test.sh. Signed-off-by: Michael van der Westhuizen <michael@smart-africa.com> Acked-by: Simon Glass <sjg@chromium.org> [trini: Rework a bit so move the exportable parts of hash.h outside of !USE_HOSTCC and only need that as a new include to image.h] Signed-off-by: Tom Rini <trini@ti.com>
* | | | | mpc8313, signed fit: enable legacy image format on ids8313 boardHeiko Schocher2014-06-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable legacy image format with CONFIG_IMAGE_FORMAT_LEGACY on the ids8313 board, as it uses signed FIT images for booting Linux and need the legacy image format. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Michael Conrad <Michael.Conrad@ids.de> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | | | bootm: make use of legacy image format configurableHeiko Schocher2014-06-05-11/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | make the use of legacy image format configurable through the config define CONFIG_IMAGE_FORMAT_LEGACY. When relying on signed FIT images with required signature check the legacy image format should be disabled. Therefore introduce this new define and enable legacy image format if CONFIG_FIT_SIGNATURE is not set. If CONFIG_FIT_SIGNATURE is set disable per default the legacy image format. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Lars Steubesand <lars.steubesand@philips.com> Cc: Mike Pearce <mike@kaew.be> Cc: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: Simon Glass <sjg@chromium.org>
* | | | | FDT: Fix DTC repository referencesJon Loeliger2014-06-05-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Device Tree Compiler (DTC) used to have its master repository located on jdl.com. While it is still there, its official, new, shiny location is on kernel.org here: git://git.kernel.org/pub/scm/utils/dtc/dtc.git Update a few references to point there instead. Signed-off-by: Jon Loeliger <jdl@jdl.com> Acked-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-08-22 12:32:28 +0000