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* Tegra114: Dalmore: Add DT filesTom Warren2013-02-11-0/+18
| | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra114: Add common CPU (shared) filesTom Warren2013-02-11-4/+1291
| | | | | | These files are used by both SPL and main U-Boot. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra114: Add CPU (armv7) filesTom Warren2013-02-11-0/+59
| | | | | | | | These files are for code that runs on the CPU (A15) on T114 boards. At this time, there is no A15-specific code here. As T114-specific run-time code is added, it'll go here. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra114: Add AVP (arm720t) filesTom Warren2013-02-11-38/+403
| | | | | | | This provides SPL support for T114 boards - AVP early init, plus CPU (A15) init/jump to main U-Boot. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra114: Add arch-tegra114 include filesTom Warren2013-02-11-5/+1365
| | | | | | | | | | Common Tegra files are in arch-tegra, shared between T20/T30/T114. Tegra114-specific headers are in arch-tegra114. Note that some of these will be filled in as more T114 support is added (drivers, WB/LP0 support, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* tegra: cardhu: config: enable SPIAllen Martin2013-02-11-0/+11
| | | | | | | | Turn on SPI in cardhu config file Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: add SPI SLINK driverAllen Martin2013-02-11-1/+432
| | | | | | | | | | | | | | | | | | | | | | Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: add addresses of SPI SLINK controllersAllen Martin2013-02-11-0/+6
| | | | | | | | Add I/O addresses of SPI SLINK controllers 1-6 Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra30: fdt: add SPI SLINK nodesAllen Martin2013-02-11-0/+77
| | | | | | | | Add tegra30 SPI SLINK nodes to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra30: add SBC1 to periph id mapping tableAllen Martin2013-02-11-1/+1
| | | | | | | | SBC1 is SPI controller 1 on tegra30 Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: spi: add fdt support to tegra SPI SFLASH driverAllen Martin2013-02-11-2/+45
| | | | | | | | | Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra20: fdt: add SPI SFLASH nodeAllen Martin2013-02-11-0/+17
| | | | | | | Add node for tegra20 SPI SFLASH controller to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: don't hard-code LCD into default TEGRA_DEVICE_SETTINGSStephen Warren2013-02-11-2/+9
| | | | | | | | | Only add "lcd" into TEGRA_DEVICE_SETTINGS if CONFIG_VIDEO_TEGRA. Otherwise, "lcd" is meaningless. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: rename FUNCMUX_UART2_UARTBStephen Warren2013-02-11-4/+4
| | | | | | | | | FUNCMUX_ defines should be named after the pin groups they affect, not after the module they're muxing onto those pin groups. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra: Move common clock code to arch/arm/cpu/tegra-common/clock.cTom Warren2013-02-11-1188/+768
| | | | | | | | | This 'commonizes' much of the clock/pll code. SoC-dependent code and tables are left in arch/cpu/tegraXXX-common/clock.c Some T30 tables needed whitespace fixes due to checkpatch complaints. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra: T20: Remove unused 'SLOW' SoC ID and PLLX table entryTom Warren2013-02-11-8/+0
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: add back missing host1x nodeAllen Martin2013-02-11-0/+11
| | | | | | | | Add back host1x node to seaboard dts file. This got dropped during the tegra fdt sort. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* am33xx: Drop gpio0_7_pin_mux from phytec pcm051Tom Rini2013-02-07-5/+0
| | | | | | | | This mux is not currently used and appears to be a carry-over from the am335x evm code. Acked-by: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: igep00x0: fix a build warning on IGEP boardsJavier Martinez Canillas2013-02-07-1/+1
| | | | | | | | | | | | | commit b689cd5 OMAP3: use a single board file for IGEP devices introduced the following build warning: igep00x0.h:168:24: warning: backslash-newline at end of file [enabled by default] This patch fixes the issue. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
* AM335X: Set fdt_high for AM335X devices to enable booting with Device Treehvaibhav@ti.com2013-02-07-0/+1
| | | | | | | | | | | | | | For AM335X boards, such as the EVM and Bone Linux kernel fails to locate the device tree blob on boot. The reason being is that u-boot is copying the DT blob to the upper part of RAM when booting the kernel and the kernel is unable to access the blob. By setting the fdt_high variable to 0xffffffff (to prevent the copy) the kernel is able to locate the DT blob and boot. This patch is tested on BeagleBone platform. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tom Rini <trini@ti.com>
* Add DDR3 support for AM335x-EVM (Version 1.5A)Jeff Lance2013-02-07-0/+57
| | | | | | | | | | | | | | AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the DDR3 chip. [Hebbar Gururaja <gururaja.hebbar@ti.com>] - Resolve merge conflict while rebasing. File structure is changed in the mainline. So re-arrange the code accordingly. - Update commit message to reflect the DDR3 part number Signed-off-by: Jeff Lance <j-lance1@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
* am335x: display msg when reading MAC from efuseLars Poeschel2013-02-07-1/+1
| | | | | | | | When ethaddr is not set in environment the MAC address is read from efuse. The message was only printed in debug case, but this message could be of interest for the ordinary user, so printf it. Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
* pcm051: Add support for Phytec phyCORE-AM335xLars Poeschel2013-02-07-0/+801
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board is named pcm051 and has this hardware: SOC: TI AM3359 DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB ETH 1: LAN8710AI SPI-Flash: W25Q64BVSSIG RTC: RV-4162-C7 I2C-EEPROM: CAT32WC32 NAND: MT29F4G08_VFPGA63 PMIC: TPS65910A3 LCD Supported: UART 1 MMC/SD ETH 1 USB I2C SPI Not yet supported: NAND RTC LCD Signed-off-by: Lars Poeschel <poeschel@lemonage.de> [trini: Add #define CONFIG_PHY_ADDR 0 to config] Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: add a pulldown macro to pinmux configLars Poeschel2013-02-07-1/+2
| | | | Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
* omap4: allow the use of a plain text env file instead boot scriptsJavier Martinez Canillas2013-02-07-3/+14
| | | | | | | | | | | | | | | | | | | | | For production systems it is better to use script images since they are protected by checksums and carry valuable information like name and timestamp. Also, you can't validate the content passed to env import. But for development, it is easier to use the env import command and plain text files instead of script-images. Since both OMAP4 supported boards (Panda and TI SDP4430) are used primarily for development, this patch allows U-Boot to load env var from a text file in case that an boot.scr script-image is not present. The variable uenvcmd (if existent) will be executed (using run) after uEnv.txt was loaded. If uenvcmd doesn't exist the default boot sequence will be started. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Nishanth Menon <nm@ti.com>
* OMAP3: igep00x0: add boot status GPIO LEDJavier Martinez Canillas2013-02-07-0/+24
| | | | | | | | | | | | | This patch adds an GPIO LED boot status for IGEP boards. The GPIO LED used is the red LED0 while the Linux kernel uses the green LED0 as the boot status. By using different GPIO LEDs, the user can know in which step of the boot process the board currently is. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* OMAP3: use a single board file for IGEP devicesJavier Martinez Canillas2013-02-07-337/+51
| | | | | | | | | | | | | | | | | Even when the IGEPv2 board and the IGEP Computer-on-Module are different from a form factor point of view, they are very similar in the fact that share many components and how they are wired. So, it is possible (and better) to have a single board file for both devices and just use the CONFIG_MACH_TYPE to make a differentiation between each board when needed. This change avoids code duplication by removing 298 lines of code and makes future maintenance easier. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* ARM: highbank: use wfi macro instead of inline asmRob Herring2013-02-03-1/+2
| | | | | | | Older compilers don't recognize v7 wfi instruction, so use wfi macro to fix builds on old compilers. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* ARM: add wfi assembly macroRob Herring2013-02-03-0/+6
| | | | | | | Since wfi instruction is only available on ARMv7, add a conditional macro for it. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* arm: rmobile: kzm9g: Adjust ETM trace clockTetsuyuki Kobayashi2013-02-02-1/+1
| | | | | | | | Set ETM TRCLK down to 78MHz to get clear wave form. This patch makes difference only when you use ETM trace connecting JTAG debugger. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* arm: rmobile: kzm9g: Adjust SDRAM settingTetsuyuki Kobayashi2013-02-02-3/+14
| | | | | | | | | | After stress test, I found some of kzm9g board occures memory failure. This patch adust SDRAM setting. - Enlarge drivability on both SDRAM controller and SDRAM itself - Raise core voltage Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-02-02-973/+3418
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| * mx23evk: Add initial board supportOtavio Salvador2013-01-28-0/+441
| | | | | | | | | | | | | | | | | | | | The following features are supported: * 128 MB DDR1 SDRAM * DUART * SD/MMC Card Socket Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx23_olinuxino: Add default environmentOtavio Salvador2013-01-28-7/+70
| | | | | | | | | | | | This adds a default environment with support for MMC booting. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * mxs: mmc: mx23_olinuxino: Add MMC supportMarek Vasut2013-01-28-1/+42
| | | | | | | | | | | | | | | | | | Add support for the MMC attached to SSP1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mxs: mmc: Fix the MMC driver for MX23Marek Vasut2013-01-28-5/+22
| | | | | | | | | | | | | | | | | | | | The MX23 has different layout of DMA channels. Fix the MMC driver to support MX23. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mxs: mmc: Allow overriding default card detect implementationMarek Vasut2013-01-28-7/+19
| | | | | | | | | | | | | | | | | | | | Some MXS based boards do not implement the card-detect signal. Allow user to specify alternate card-detect implementation. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mxs: mmc: Fix MMC reset on iMX23Otavio Salvador2013-01-28-5/+11
| | | | | | | | | | | | | | | | | | | | This does the same reset mask as done in v3.7 Linux kernel code. The block is properly configured for MMC operation that way. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mxs: ssp: Add SSP registers map for MX23Marek Vasut2013-01-28-0/+36
| | | | | | | | | | | | | | | | | | | | The MX23 SSP register layout differs from MX28 in certain bits, adjust the register layout accordingly. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mxs: dma: Fix APBH DMA driver for MX23Marek Vasut2013-01-28-2/+129
| | | | | | | | | | | | | | | | | | | | | | The MX23 has less channels for the APBH DMA, sligtly different register layout and some bits in those registers are placed differently. Reflect this in the driver. This patch fixes MMC/DMA issue on MX23. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mx6qsabrelite: search mii phy address 4-7Troy Kisky2013-01-28-3/+21
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * net: fec_mxc: get phydev before fec_probeTroy Kisky2013-01-28-43/+83
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * net: fec_mxc: only call phy_connect in fec_probeTroy Kisky2013-01-28-21/+12
| | | | | | | | | | | | | | This allows us to create the phydev before calling fec_probe in later patch. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * net: fec_mxc: use fec_set_dev_name to set nameTroy Kisky2013-01-28-8/+8
| | | | | | | | | | | | | | This allows us to create the phydev before calling fec_probe in later patch. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * phy: add phy_find_by_mask/phy_connect_devTroy Kisky2013-01-28-50/+81
| | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to try a range of possible phy addresses to connect. Also, an ethernet device is not required to use phy_find_by_mask leading to better separation of mii vs ethernet, as suggested by Andy Fleming. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * net: fec_mxc: have fecmxc_initialize call fecmxc_initialize_multiTroy Kisky2013-01-28-16/+8
| | | | | | | | | | | | | | Having only one call to fec_probe will ease the changing of its parameters. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * net: fec_mxc: change fec_mii_setspeed parameterTroy Kisky2013-01-28-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Only the hardware ethernet registers are needed for this function, so don't pass the more general structure. I'm trying to separate MII and fec. This also fixes MX28 fec_mii_setspeed use on secondary ethernet port This was found by inspection of the code and should be checked on real hardware. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * net: fec_mxc: delete CONFIG_FEC_MXC_MULTITroy Kisky2013-01-28-4/+1
| | | | | | | | | | | | | | It is more logical to test for CONFIG_FEC_MXC_PHYADDR to determine whether to define the function fecmxc_initialize. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * doc/README.fec_mxc: add documentationTroy Kisky2013-01-28-0/+27
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * mxs: Use __weak annotation to simplify codeFabio Estevam2013-01-28-7/+4
| | | | | | | | | | | | | | Using the __weak annotation can make the code cleaner. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
generated by cgit v1.1 at 2024-11-09 15:21:53 +0000