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* net2big_v2: initialize LEDs at startupSimon Guinot2013-06-20-7/+96
| | | | | | | | This patch allows to configure the net2big_v2 LEDs at startup (through the GPIO extension bus). The front blue LED is enabled and the SATA rear LEDs are configured to blink in relation with the SATA activity. Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
* LaCie/common: add support for the CPLD GPIO busSimon Guinot2013-06-20-0/+74
| | | | | | | | | | | | This patch adds support for the CPLD GPIO bus found on some LaCie boards (as the 2Big/5Big Network v2 and the 2Big NAS). This parallel GPIO bus exposes two registers (address and data). Each of this register is made up of several dedicated GPIOs. An extra GPIO is used to notify the CPLD that the registers have been updated. Mostly this bus is used to configure the LEDs on LaCie boards. Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
* net2big_v2: initialize I2C fan at startupSimon Guinot2013-06-20-2/+66
| | | | | | | | This patch ensures minimal cooling for the net2big_v2 by automatically starting the I2C fan (GMT G762) at low speed (2800 RPM). Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-19-176/+164
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| * arm: omap4: panda: Fix checkpatch on panda fileDan Murphy2013-06-18-13/+13
| | | | | | | | | | | | | | | | Fix the checkpatch warning on the panda.c file for leading spaces. Fix the CHECK warnings on the panda.c file for parenthesis alignment. Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * arm: omap4: panda: Add reading of the board revisionDan Murphy2013-06-18-5/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Detect if we are running on a panda revision A1-A6, or an ES panda board. This can be done by reading the level of GPIOs and checking the processor revisions. This should result in: Panda 4430: GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5 GPIO171, GPIO101, GPIO182: 1 0 1 => A6 Panda ES: GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2 GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3 Set the board name appropriately for the board revision that is detected. Update the findfdt macro to load the a4 device tree binary. Signed-off-by: Dan Murphy <dmurphy@ti.com> [trini: %s/CONTROL_PADCONF_CORE/(*ctrl)->control_padconf_core_base/ and formatting for that] Signed-off-by: Tom Rini <trini@ti.com>
| * arm: dra7xx: Update the EXTRA_ENV_SETTINGSDan Murphy2013-06-18-1/+8
| | | | | | | | | | | | | | | | | | | | Update the EXTRA_ENV_SETTING for the dra7xx. The console needs to be set to ttyO0 and the findfdt needs to be updated to load the dra7xx-evm.dtb file. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * arm: omap5_uevm: Correct the console sys prompt for 5432Dan Murphy2013-06-18-1/+1
| | | | | | | | | | | | | | | | | | Correct the console sys prompt to display the correct processor and the corrent board Signed-off-by: Dan Murphy <dmurphy@ti.com> Reported-by: Lubomir Popov <lpopov@mm-sol.com> Reviewed-by: Tom Rini <trini@ti.com>
| * arm: omap: Add check for fdtfile in the findfdt macroDan Murphy2013-06-18-5/+12
| | | | | | | | | | | | | | | | | | In the omap4, omap5 and am335x common files add a check to ensure that the fdtfile is defined after the findfdt macro has run. If the file is not defined then warn the user that the dtb file is not defined. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * arm, am33xx: move uart soft reset code to common placeHeiko Schocher2013-06-18-85/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move uart soft reset code to common place and call this function from board code, instead of copy and paste this code for every board. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Tom Rini <trini@ti.com> [trini: Fix igep0033 build, remove 'regval' on pcm051] Signed-off-by: Tom Rini <trini@ti.com>
| * arm, am335x: make mpu pll config configurableHeiko Schocher2013-06-18-2/+8
| | | | | | | | | | | | | | | | upcoming support for siemens boards switches mpu pll clk in board code. So make this configurable. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
| * arm, am33xx: move rtc32k_enable() to common placeHeiko Schocher2013-06-18-64/+20
| | | | | | | | | | | | | | | | | | | | move rtc32k_enable() to common place so all am33xx boards can use it. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
* | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-19-471/+1360
|\ \ | |/ |/| | | | | Conflicts: spl/Makefile
| * MMC: DWMMC: Fix FIFO_DEPTH calculationRajeshwari Shinde2013-06-17-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current DWMMC driver used to give FIFO underrun/overrun error every 3rd time for mmc rescan command. In current code FIFO_DEPTH is getting calculated after reading the default FIFOTH register and extracting the RX_WMARK bits from it i.e (RX_WMARK = FIFO_DEPTH/2 -1). Instead of storing the correct value, we were recalculating the FIFO_DEPT each time which is not correct. Based on "[PATCH V9 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues" http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/160247 Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * power: exynos-tmu: use the mux_addr bit fields in tmu_control registerNaveen Krishna Chatradhi2013-06-13-1/+10
| | | | | | | | | | | | | | | | | | This patch implements the mux_addr bit fields defined in tmu_control register (used for debugging purpose) Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Reviewed-by: Vadim Bendebury <vbendeb@google.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * power: exynos-tmu: fix warnings and clean up codeNaveen Krishna Chatradhi2013-06-13-80/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does the folowing 1. change the data types for unsigned int variable to unsigned 2. change the tmu_base type to struct exynos5_tmu_reg * 3. Add timer functionality for get_cur_temp() 4. error handling in the get_tmu_fdt_values() 5. Add check for curr_temp reading 6. some cosmotic changes. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Reviewed-by: Vadim Bendebury <vbendeb@google.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partitionAmar2013-06-13-2/+107
| | | | | | | | | | | | | | This patch adds commands to access(open/close) and resize boot partitions on EMMC. Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * SMDK5250: Enable EMMC bootingAmar2013-06-13-13/+74
| | | | | | | | | | | | | | This patch adds support for EMMC booting on SMDK5250. Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * MMC: APIs to support resize of EMMC boot partitionAmar2013-06-13-0/+160
| | | | | | | | | | | | | | This patch adds APIs to access(open / close) and to resize boot partiton of EMMC. Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDTAmar2013-06-13-169/+493
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables and initialises DWMMC for SMDK5250. Supports both FDT and non-FDT. This patch creates a new file 'exynos5-dt.c' meant for FDT support. exynos5-dt.c: This file shall contain all code which supports FDT. Any addition of FDT support for any module needs to be added in this file. smdk5250.c: This file shall contain the code which supports non-FDT. version. Any addition of non-FDT support for any module needs to be added in this file. May be, the file smdk5250.c can be removed in near future when non-FDT is not required. The Makefile is updated to compile only one of the files exynos5-dt.c / smdk5250.c based on FDT configuration. NOTE: Please note that all additions corresponding to FDT need to be added into the file exynos5-dt.c. At same time if non-FDT support is required then add the corresponding updations into smdk5250.c. Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results.Amar2013-06-13-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This patch initialises the local variable 'shift' to zero. The uninitialised local variable 'shift' had garbage value and was resulting in unwnated results in the functions exynos5_get_mmc_clk() and exynos4_get_mmc_clk(). Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * EXYNOS5: DWMMC: Added FDT support for DWMMCAmar2013-06-13-17/+124
| | | | | | | | | | | | | | | | | | | | | | This patch adds FDT support for DWMMC, by reading the DWMMC node data from the device tree and initialising DWMMC channels as per data obtained from the node. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * DWMMC: Initialise dwmci and resolve EMMC read write issuesAmar2013-06-13-9/+12
| | | | | | | | | | | | | | | | | | | | | | | | This patch enumerates dwmci and set auto stop command during dwmci initialisation. EMMC read/write is not happening in current implementation due to improper fifo size computation. Hence modified the fifo size computation to resolve EMMC read write issues. Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * EXYNOS5: FDT: Add DWMMC device node dataAmar2013-06-13-0/+111
| | | | | | | | | | | | | | | | | | | | | | This patch adds DWMMC device node data for exynos5. This patch also adds binding file for DWMMC device node. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * FDT: Add compatible string for DWMMCAmar2013-06-13-0/+2
| | | | | | | | | | | | | | | | | | Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * arm:trats: change auto-booting to boot kernel with separate device tree blobArkadiusz Wlodarczyk2013-06-13-4/+13
| | | | | | | | | | | | | | | | Signed-off-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: Update origen and smdkv310 to use common tzpc_initInderpal Singh2013-06-04-125/+8
| | | | | | | | | | | | Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: update tzpc to make it common for exynos4 and exynos5Inderpal Singh2013-06-04-18/+31
| | | | | | | | | | | | | | | | | | | | This requires that cpu_is_exynos4/5 should be made available before tzpc_init. Hence this patch also makes necessary changes to have cpu_info in spl and invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: move tzpc_init to armv7/exynosInderpal Singh2013-06-04-30/+30
| | | | | | | | | | | | | | | | | | | | | | tzpc_init is common for all exynos5 boards, hence move it to armv7/exynos so that all other boards can use it. Also update the smdk5250 Makefile and config file. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: uart: s5p: enabling the uart tx/rx fifoAkshay Saraswat2013-05-21-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | This patch enables the uart tx/rx fifo. Now that fifo is enabled, the uart read/write functions are modfied to check the UFSTAT register for fifo status instead of UTRSTAT (as required with fifo's enabled). Tested by booting linux kernel. Before enabling tx/rx fifo "Uncompressing linux" message is garbled and after enabling it is proper. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos5: clock: Update the equation to calculate PLL output frequencyAkshay Saraswat2013-05-21-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the latest exynos5 user manual, the equation for calculating PLL output was changed to FOUT= MDIV x FIN/(PDIV x 2^SDIV) earlier it was FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1)) So updating the clock code accordingly. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * SMDK5250: Enable SPI Gigabyte device.Rajeshwari Shinde2013-05-20-0/+1
| | | | | | | | | | | | | | | | This patch enables gigabyte device for SMDK5250. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * SF: Add driver for Gigabyte device GD25LQ and GD25Q64BRajeshwari Shinde2013-05-20-0/+86
| | | | | | | | | | | | | | | | | | | | This patch adds driver for the gigabyte devices GD25LQ and GD25Q64B required for Snow Board. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | arm: pxa: config option for PXA270 turbo modeSergey Yanovich2013-06-12-1/+1
| | | | | | | | | | | | | | | | PXA270 CPU has turbo mode. The mode is 2.5 times faster than the default run mode. Activating the mode early significantly speeds up boot process. Signed-off-by: Sergey Yanovich <ynvich@gmail.com>
* | arm: pxa: Add support for ICP DAS LP-8x4xSergey Yanovich2013-06-12-0/+455
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LP-8x4x is a programmable automation controller by ICP DAS. It is shipped with outdated U-Boot v1.3.0 This patch adds enough supports to boot the board: - 128M of 128M SDRAM - 32M of 48M NOR Flash memory - 1 of 4 Serial consoles (PXA FFUART) - 2 of 2 Ethernet controllers (DM9000) Signed-off-by: Sergey Yanovich <ynvich@gmail.com> Series-to: u-boot Series-cc: marex
* | cosmetic: arm: fix comments in arch/arm/lib/crt0.SMasahiro Yamada2013-06-10-2/+2
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-10-3726/+1679
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| * | arm: da830: moved pinmux configurations to the arch treeVishwanathrao Badarkhe, Manish2013-06-10-132/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move pinmux configurations for the DA830 SoCs from board file to the arch tree so that it can be used for all da830 based devices. Also, avoids duplicate pinmuxing in case of NAND. Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
| * | ARM: DRA7: Add MaintainerLokesh Vutla2013-06-10-0/+4
| | | | | | | | | | | | | | | | | | Adding Maintainer for DRA7xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | OMAP5: Enable access to auxclk registersLubomir Popov2013-06-10-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | auxclk0 and auxclk1 are utilized on some OMAP5 boards. Define the infrastructure needed for accessing them without using magic numbers. Also remove unrelated TPS62361 defines from clocks.h Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
| * | ARM: OMAP: I2C: New read, write and probe functionsLubomir Popov2013-06-10-191/+299
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4 (4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older OMAPs and derivatives as well. The only anticipated exception would be the OMAP2420, which shall require driver modification. - Rewritten i2c_read to operate correctly with all types of chips (old function could not read consistent data from some I2C slaves). - Optimised i2c_write. - New i2c_probe, performs write access vs read. The old probe could hang the system under certain conditions (e.g. unconfigured pads). - The read/write/probe functions try to identify unconfigured bus. - Status functions now read irqstatus_raw as per TRM guidelines (except for OMAP243X and OMAP34XX). - Driver now supports up to I2C5 (OMAP5). Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Heiko Schocher <hs@denx.de>
| * | arm: Remove OMAP2420H4 and all omap24xx supportTom Rini2013-06-10-3104/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The omap2420H4 was the only mainline omap24xx board. Prior to being fixed by Jon Hunter in time for v2013.04 it had been functionally broken for a very long time. Remove this board as there's not been interest in it in U-Boot for quite a long time. Signed-off-by: Tom Rini <trini@ti.com>
| * | da830: add MMC supportVishwanathrao Badarkhe, Manish2013-06-10-2/+70
| | | | | | | | | | | | | | | | | | | | | Add MMC support for da830 boards in order to perform mmc operations(read,write and erase). Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
| * | ARM: OMAP5: Power: Add more functionality to Palmas driverLubomir Popov2013-06-10-19/+204
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some useful functions, and the corresponding definitions. Add support for powering on the dra7xx_evm SD/MMC LDO (courtesy Lokesh Vutla <lokeshvutla@ti.com>). Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | ARM: DRA7xx: EMIF: Change settings required for EVM boardSricharan R2013-06-10-31/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DRA7 EVM board has the below configuration. Adding the settings for the same here. 2Gb_1_35V_DDR3L part * 2 on EMIF1 2Gb_1_35V_DDR3L part * 4 on EMIF2 Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | ARM: DRA7xx: clocks: Update PLL valuesLokesh Vutla2013-06-10-46/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update PLL values. SYS_CLKSEL value for 20MHz is changed to 2. In other platforms SYS_CLKSEL value 2 represents reserved. But in sys_clk array ind 1 is used for 13Mhz. Since other platforms are not using 13Mhz, reusing index 1 for 20MHz. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * | ARM: DRA7xx: Update pinmux dataLokesh Vutla2013-06-10-16/+29
| | | | | | | | | | | | | | | | | | | | | Updating pinmux data as specified in the latest DM Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com>
| * | mmc: omap_hsmmc: Update pbias programmingBalaji T K2013-06-10-17/+14
| | | | | | | | | | | | | | | | | | | | | Update pbias programming sequence for OMAP5 ES2.0/DRA7 Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | ARM: DRA7xx: Correct SRAM END addressSricharan R2013-06-10-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | NON SECURE SRAM is 512KB in DRA7xx devices. So fixing it here. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | ARM: DRA7xx: Correct the SYS_CLK to 20MHZSricharan R2013-06-10-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sys_clk on the dra evm board is 20MHZ. Changing the configuration for the same. And also moving V_SCLK, V_OSCK defines to arch/clock.h for OMAP4+ boards. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
generated by cgit v1.1 at 2024-11-05 03:51:21 +0000