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* powerpc/p2040: Add various p2040 specific informationMingkai Hu2011-07-11-0/+133
| | | | | | | | | | | Add P2040 SoC specific information: * LIODN setup * Portal configuration * etc Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix compile errors if CONFIG_SYS_DPAA_QBMAN isn't setKumar Gala2011-07-11-13/+24
| | | | | | | | | | | Add ifdef protection for qp_info and liodn associated with Q/BMan. Also rearrange setting of _tbl_sz variables to utilize existing ifdef protection for things like FMAN. Also add protection around setup_portals() call in corenet_ds board code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* qoriq/p1_p2_rdb: Add Dual Role USB support macro for P1020RDBRamneek Mehresh2011-07-11-0/+1
| | | | | | | Add CONFIG_HAS_FSL_DR_USB macro for P1020RDB Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix compile errors if CONFIG_SYS_{BR,OR}0_PRELIM aren't setKumar Gala2011-07-11-0/+2
| | | | | | | | Add ifdef protection in LBC code to handle the case in which CONFIG_SYS_BR0_PRELIM and CONFIG_SYS_OR0_PRELIM arent defined for a build. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix compile errors if CONFIG_SYS_{B,Q}MAN_MEM_PHYS aren't setKumar Gala2011-07-11-0/+8
| | | | | | | | Add ifdef protection in LAW & TLB code to handle the case in which CONFIG_SYS_BMAN_MEM_PHYS or CONFIG_SYS_QMAN_MEM_PHYS arent defined for a build. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* MPC83XX: Fix PCI express clock setupBill Cook2011-07-06-2/+4
| | | | | | | | | | | | On a 8308 based board it was found that the PEX_GLK_RATIO register (programmed in arch/powerpc/cpu/mpc83xx/pcie.c) was getting set to 0, This was tracked to the fact that the pci express clock frequency was not being assigned to the pciexp1_clk entry in the global data structure in file arch/powerpc/cpu/mpc83xx/speed.c. Fix this and a similiar issue in 'do_clocks' command. Signed-off-by: Bill Cook <cook@isgchips.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* powerpc/83xx: remove empty board_early_init_f()Timur Tabi2011-07-06-13/+0
| | | | | | | Remove an empty board_early_init_f() from the MPC8323ERD and MPC360ERDK boards. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: Add support for MergerBox boardAndre Schwarz2011-07-06-0/+1504
| | | | | | | | Includes board config file, documentation, maintainer and boards.cfg entries, and board specific files in vendor dir. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC83xx: add config options for memory setup.Andre Schwarz2011-07-06-1/+18
| | | | | | | | | CPO value and driver strength settings are board specifc. Also allow SPD data fetch from any accessible I2C EEPROM. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC83xx: add define for global half-strength enable (HSE)Andre Schwarz2011-07-06-0/+1
| | | | | Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC837x: set i2c1_clkAndre Schwarz2011-07-06-0/+2
| | | | | | | | | Running on mpc837x without CONFIG_FSL_ESDHC leads to i2c1_clk not being set at all. It is bound to clock of encryption module. fix this. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* fsl_dma: fix support for 83xx DMA engineIra W. Snyder2011-07-06-0/+2
| | | | | | | | | | | | | Commit 359ec4931944adb885882deb9b781e4095eabc94 broke support for the Freescale DMA engine on the 83xx parts. This is due to using registers which do not exist on 83xx. Remove the attribute register accesses from the 83xx build. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Cc: York Sun <yorksun@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Add support for Network Space v2 and parentsSimon Guinot2011-07-04-0/+566
| | | | | | | | | | | This patch add support for the Network Space v2 board and parents, based on the Marvell Kirkwood 6281 SoC. This include Network Space (Max) v2 and Internet Space v2. Additional information is available at: http://lacie-nas.org/doku.php?id=network_space_v2 Signed-off-by: Simon Guinot <sguinot@lacie.com>
* arm/km: add support for portl2 boardValentin Longchamp2011-07-04-3/+89
| | | | | | | | | | | | | | | This adds support for the keymile Kirkwood BEC portl2 board. This board relies on the km_arm (km_kirkwood) BEC. The egiga driver is configured for a 100M full-duplex, A/N off connnection to the backplane. This board has always ethernet present, because it is connected to the marvell switch similar to mgcoge3un. The reset_phy functionality is also the same to mgcoge3un. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/km: replace suenx targets with km_kirkwoodHolger Brunck2011-07-04-60/+25
| | | | | | | | | | | | | | suen3 and suen8 were in first HW version quite different, but now they are from a u-boot point of view similar. So these two boards can use the same header file. Other keymile boards differ only in the usage of the PCI interface. Therefore a target km_kirkwood_pci was introduced. All targets use the same header file. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/km: ethernet support for mgcoge3unValentin Longchamp2011-07-04-1/+38
| | | | | | | | | | The phy is also configured with "RGMII clock transitions when data stable" and "Class A driver for the direct backplane connection". Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/km: use board KM_ENV_BUS for CONFIG_I2C_ENV_EEPROM_BUSValentin Longchamp2011-07-04-1/+1
| | | | | | | | | | | This is defined for all km_kirkwood boards and was not used up to now. This value was the same for all boards but it could be changed for some boards (and thus needs to be defined for every board). Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/km: remove unneeded defineHolger Brunck2011-07-04-2/+0
| | | | | | | | | | | CONFIG_ENV_SIZE for NAND was later in this file overwritten because we have the environment in i2c eeprom, so remove this define. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/km: fix u-boot.kwb build breakageHolger Brunck2011-07-04-22/+7
| | | | | | | | | | | | | | | | | | | commit 010a958b (arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h) breaks building keymile arm targets, when u-boot.kwb tries to generate the binary with mkimage. A simple make <board> or MAKEALL succeeded because it don't try to build the kirwood binary at the end. Due this commit we use the CONFIG_SYS_KWD_CONFIG from the arch-kirkwood/config.h and it was removed from the board config. But it was forgotten to include the header. Now the header is included in km_arm.h. Some other defines were obsolete due to this include, these are also removed in this commit. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/kirkwood: if CONFIG_SOFT_I2C is set don't set CONFIG_I2C_MVTWSIHolger Brunck2011-07-04-0/+2
| | | | | | | | | | | Some boards e.g. keymile arm boards have CONFIG_CMD_I2C switched on but they use soft i2c on kirkwood. So don't switch CONFIG_I2C_MVTWSI on in this case. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* Fix compiler error for cpu at91sam9, if lowlevel init is enabledJens Scharsig2011-07-04-1/+1
| | | | | | | * Fix compiler error for cpu at91sam9, if lowlevel init is enabled * use correct ATMEL_ name scheme to define ATMEL_BASE_SDRAMC Signed-off-by: Jens Scharsig
* atstk100x: switch to common cfi driverAndreas Bießmann2011-07-04-261/+8
| | | | | | | | | This patch removes the board implemenatation for flash driver which can now safely switched to the common cfi driver. Compile tested for all atstk100x boards, runtime tested on atstk1002. Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
* driver/serial: delete at91rm9200_usartAndreas Bießmann2011-07-04-127/+0
| | | | | | The at91rm9200_usart driver could be fully replaced by atmel_usart driver. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* cpuat91: use atmel_usartAndreas Bießmann2011-07-04-3/+12
| | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Eric Bénard <eric@eukrea.com>
* eb_cpux9k2: use atmel_usartAndreas Bießmann2011-07-04-2/+11
| | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> CC: Jens Scharsig <js_at_ng@scharsoft.de> Acked-by: Jens Scharsig<js_at_ng@scharsoft.de> Tested-by: Jens Scharsig<js_at_ng@scharsoft.de> (for eb_cpux9k2 board)
* at91rm9200ek: use atmel_usartAndreas Bießmann2011-07-04-2/+12
| | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm920t/at91: add at91rm9200_devices.cAndreas Bießmann2011-07-04-2/+93
| | | | | | | This is a copy of arm926ejs/at91 api for perpherial initialisation. At the moment we just need the usart part of the api. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm920t/at91: use new clock.c featuresAndreas Bießmann2011-07-04-4/+53
| | | | | | | | | This patch enables the new clock features from arm920t/at91/clock.c. This is an required step to get at91rm9200_usart replaced by atmel_usart driver. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Jens Scharsig <js_at_ng@scharsoft.de> Cc: Eric Bénard <eric@eukrea.com>
* arm920t/at91: add clock.cAndreas Bießmann2011-07-04-40/+198
| | | | | | | This patch adds an copy of arm926ejs/at91/clock.c to arm920t/at91. The arm926ejs specialities are removed from arm920t version and vice versa. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91rm9200.h: fix ATMEL_PMX_AA_TXD2Andreas Bießmann2011-07-04-1/+1
| | | | | | | | | This patch sets the ATMEL_PMX_AA_TXD2 to the correct value. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> CC: Jens Scharsig <js_at_ng@scharsoft.de> CC: eric@eukrea.com Acked-by: Eric Bénard <eric@eukrea.com>
* vision2: Fix build due to WEIM registers name changeFabio Estevam2011-07-04-5/+5
| | | | | | | | | commit 0015de1a (MX5: Make the weim structure complete) fixed the name for the WEIM registers in order to match with the MX51/MX53 manuals. Fix the WEIM register for vision2 board so that it can build again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX53: Add initial support for MX53ARDFabio Estevam2011-07-04-0/+650
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX5: Introduce a function for setting the chip select sizeFabio Estevam2011-07-04-1/+36
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX5: Add iomux structureFabio Estevam2011-07-04-0/+23
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX5: Make the weim structure completeFabio Estevam2011-07-04-6/+125
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* arm: Update jadecpu boardMatthias Weisser2011-07-04-14/+16
| | | | | | | | Enable dcache and arch memset/memcpy for speed reasons Remove of config.mk and some environment overwrites Some generic cleanup Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* arm: omap2: apollon: fix broken buildIgor Grinberg2011-07-04-0/+4
| | | | | | | | Define CONFIG_SYS_SDRAM_BASE to physical SDRAM address and CONFIG_SYS_INIT_SP_ADDR to physical SRAM address Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Cc: Kyungmin Park <kyungmin.park@samsung.com>
* OMAP[34]: fix broken timerJohn Rigby2011-07-04-3/+4
| | | | | | | | | | | | | | | | | | | | As implemented now the timer used to implement __udelay counts to 0xffffffff and then gets stuck there because the the programmed reload value is 0xffffffff. This value is not only wrong but illegal according to the reference manual. One can reproduce the bug by leaving a board at the u-boot prompt for sometime then issuing a sleep command. The sleep will hang forever. The timer is a count up timer that reloads as it rolls over from 0xffffffff so the correct load value is 0. Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff. Signed-off-by: John Rigby <john.rigby@linaro.org> Tested-by: Igor Grinberg <grinberg@compulab.co.il>
* arm: Tegra2: GPIO: enable GPIO for Tegra2 boardsTom Warren2011-07-04-0/+2
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* GPIO: Tegra2: add GPIO driver for Tegra2Tom Warren2011-07-04-10/+534
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* VCMA9: various cleanups/code style fixesDavid Müller (ELSOFT AG)2011-07-04-591/+634
| | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* VCMA9: use CFI driver (and remove the old one)David Müller (ELSOFT AG)2011-07-04-452/+22
| | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* VCMA9: remove unneeded config.mkDavid Müller (ELSOFT AG)2011-07-04-24/+2
| | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* armv7: adapt s5pc1xx to the new cache maintenance frameworkAneesh V2011-07-04-85/+6
| | | | | | adapt s5pc1xx to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: adapt omap3 to the new cache maintenance frameworkAneesh V2011-07-04-286/+176
| | | | | | adapt omap3 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: adapt omap4 to the new cache maintenance frameworkAneesh V2011-07-04-7/+32
| | | | | | adapt omap4 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: add PL310 support to u-bootAneesh V2011-07-04-0/+195
| | | | | | | | | | | | | PL310 is the L2$ controller from ARM used in many SoCs including the Cortex-A9 based OMAP4430 Add support for some of the key PL310 operations - Invalidate all - Invalidate range - Flush(clean & invalidate) all - Flush range Signed-off-by: Aneesh V <aneesh@ti.com>
* arm: minor fixes for cache and mmu handlingAneesh V2011-07-04-2/+18
| | | | | | | | | | | 1. make sure that page table setup is not done multiple times 2. flush_dcache_all() is more appropriate while disabling cache than a range flush on the entire memory(flush_cache()) Provide a default implementation for flush_dcache_all() for backward compatibility and to avoid build issues. Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: integrate cache maintenance supportAneesh V2011-07-04-32/+51
| | | | | | | | | | - Enable I-cache on bootup - Enable MMU and D-cache immediately after relocation - Do necessary initialization before enabling d-cache and MMU - Changes to cleanup_before_linux() - Make changes according to the new framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: rename cache related CONFIG flagsAneesh V2011-07-04-45/+42
| | | | | | | | | | | | | | | | Replace the cache related CONFIG flags with more meaningful names. Following are the changes: CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF Signed-off-by: Aneesh V <aneesh@ti.com> V2: * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE V4: * Changed all three flags to the final names suggested as above and accordingly changed the commit message
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