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* AM3517: Add SPL supportTom Rini2011-12-06-33/+56
| | | | | | | | The only change of note is that we move from 0x80008000 to 0x80100000 for CONFIG_SYS_TEXT_BASE Cc: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add SPL support to omap3_evmTom Rini2011-12-06-38/+159
| | | | | | | Add Hynix 200MHz timing information to <asm/arch-omap3/mem.h>. This also changes CONFIG_SYS_TEXT_BASE to 0x80100000. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add SPL support to BeagleboardTom Rini2011-12-06-39/+153
| | | | | | | | | | | | | | | | | | This introduces 200MHz Micron parts timing information based on x-loader to <asm/arch-omap3/mem.h> and Numonyx MCFG calculation. The memory init logic is also based on what x-loader does in these cases. Note that while previously u-boot would be flashed in with SW ECC in this case it now must be flashed with HW ECC. We also change CONFIG_SYS_TEXT_BASE to 0x80100000. Cc: Dirk Behme <dirk.behme@gmail.com> Beagleboard rev C5, xM rev A: Tested-by: Tom Rini <trini@ti.com> Beagleboard xM rev C: Tested-by: Matt Ranostay <mranostay@gmail.com> Beagleboard rev B7, C2, xM rev B: Tested-by: Matt Porter <mporter@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3 SPL: Add identify_nand_chip functionTom Rini2011-12-06-0/+91
| | | | | | | | | | A number of boards are populated with a PoP chip for both DDR and NAND memory. Other boards may simply use this as an easy way to identify board revs. So we provide a function that can be called early to reset the NAND chip and return the result of NAND_CMD_READID. All of this code is put into spl_id_nand.c and controlled via CONFIG_SPL_OMAP3_ID_NAND. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3 SPL: Rework memory initalization and devkit8000 supportTom Rini2011-12-06-44/+38
| | | | | | | | | This changes to making the board be responsible for providing the memory initialization timings in SPL and converts the devkit8000 to this framework. In SPL we try and initialize both CS0 and CS1. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Suffix all Micron memory timing parts with their speedTom Rini2011-12-06-10/+11
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add optimal SDRC autorefresh control valuesTom Rini2011-12-06-5/+11
| | | | | | | | This adds the optimal SDRC autorefresh control register values for 100Mhz, 133MHz, 165MHz and 200MHz clocks. We switch to using this to provide the default 165MHz value. Signed-off-by: Tom Rini <trini@ti.com>
* omap3: mem: Add MCFG helper macroTom Rini2011-12-06-16/+30
| | | | | | | | | This adds an MCFG macro to calculate the correct value, similar to the ACTIMA/ACTIMB macros and adds a comment that all of the potential values here are documented in the TRM. Then we convert the Micron value to use this macro. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Remove get_mem_type prototypeTom Rini2011-12-06-1/+0
| | | | | | This function doesn't exist for omap3 Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Change mem_ok to clear again after reading backTom Rini2011-12-06-0/+1
| | | | | | | | It's possible to need to call this function on the same banks multiple times so we want to be sure that 'pos A' is cleared out again at the end. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add a helper function to set timings in SDRCTom Rini2011-12-06-55/+61
| | | | | | | | Since we go through the sequence to setup the SDRC timings more than once, break this logic out into its own function and have that function call mem_ok() to make sure the memory is usable. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()Tom Rini2011-12-06-12/+11
| | | | | | | | | | | | | We update the comment in make_cs1_contiguous() to be a little bit more clear (it's been copy/pasted from other silicons) and then explain in dram_init() why we need to always try this. Note that in the previous behavior we were always calling this on boards that never had cs1 populated anyhow so making sure we do this always is fine and will correct things like omap3evm detecting an invalid amount of memory (384MB). Signed-off-by: Tom Rini <trini@ti.com>
* omap3: mem: Comment enable_gpmc_cs_config moreTom Rini2011-12-06-3/+13
| | | | | | | Expand the "enable the config" comment to explain what the bit shifts are and define out two of the magic numbers. Signed-off-by: Tom Rini <trini@ti.com>
* ARM: davici_emac: Fix condition for number of phy detectsPrabhakar Lad2011-12-06-1/+1
| | | | | | | | | | | Fix the condition for number of phys in davinci_eth_phy_detect() function. CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT indicates number of phys. From this commit id dc02badab480563b0bf9d3908046ea9d6b22ae63 davinci emac initilazed one less than the number of phy count. Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com> Acked-by: Heiko Schocher <hs@denx.de>
* arm: printf() is not available in some SPL configurationsChristian Riesch2011-12-06-0/+2
| | | | | | | | | | This patch avoids build breakage for SPLs that do not support printf. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Tom Rini <trini@ti.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm, davinci: add support for am1808 based enbw_cmc boardHeiko Schocher2011-12-06-0/+1105
| | | | | | | | | | | | - booting from NOR Flash with direct boot method - POST support - LOGBUF support Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Christian Riesch <christian.riesch@omicron.at>
* arm, davinci: move misc function in arch treeHeiko Schocher2011-12-06-68/+5
| | | | | | | | | | | | move the board/davinci/common/misc.c file to arch/arm/cpu/arm926ejs/davinci/misc.c, so all davinci boards can use this functions. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
* arm, board/davinci/common/misc.c: Codingstyle cleanupHeiko Schocher2011-12-06-9/+10
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
* arm, davinci, da850: add uart1 tx rx pinmux configHeiko Schocher2011-12-06-0/+6
| | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Tom Rini <trini@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
* arm, davinci: move davinci_rtc struct to hardware.hHeiko Schocher2011-12-06-26/+39
| | | | | | | | | move struct davinci_rtc to arch/arm/include/asm/arch-davinci/hardware.h and add RTC_KICK0R_WE, RTC_KICK1R_WE defines, so they are global useable. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: Remove duplication of pinmux configuration codeChristian Riesch2011-12-06-28/+8
| | | | | | | | | | This patch replaces the pinmux configuration code in arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c by the code from arch/arm/cpu/arm926ejs/davinci/pinmux.c. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Heiko Schocher <hs@denx.de>
* arm, hawkboard: Use the pinmux configurations defined in the arch treeChristian Riesch2011-12-06-43/+14
| | | | | | | | | | | | | | | | The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors that contain pinmux configurations for emac, uarts, memory controllers... In an earlier patch such pinmux configurations were added to the arch tree. This patch makes the hawkboard use these definitions instead of defining its own. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
* arm, da850evm: Use the pinmux configurations defined in the arch treeChristian Riesch2011-12-06-128/+27
| | | | | | | | | | | | | | | The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors that contain pinmux configurations for emac, uarts, memory controllers... In an earlier patch such pinmux configurations were added to the arch tree. This patch makes the da850evm use these definitions instead of defining its own. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
* arm, da850: Add pinmux configurations to the arch treeChristian Riesch2011-12-06-0/+217
| | | | | | | | | | | | | Up to now nearly every davinci board has separate code for the definition of pinmux configurations. This patch adds pinmux configurations for the DA850 SoCs to the arch tree which may later be used for all DA850 based boards. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
* arm, da850evm: Do pinmux configuration for EMAC together with other pinmuxesChristian Riesch2011-12-06-3/+3
| | | | | | | | | | | | Pinmux configuration for the EMAC was done in a separate call of davinci_configure_pin_mux(). This patch moves all the pinmux configuration that is done for this board to a common place. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Acked-by: Heiko Schocher <hs@denx.de>
* arm, hawkboard: Remove obsolete struct pinmux_config i2c_pinsChristian Riesch2011-12-06-6/+0
| | | | | | | | | | | | | | The configuration in struct pinmux_config i2c_pins does not configure the pins for i2c but for uart. Since this function is already configured by struct pinmux_config uart2_pins the i2c_pins struct is obsolete. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Heiko Schocher <hs@denx.de>
* arm, davinci: Move pinmux functions from board to arch treeChristian Riesch2011-12-06-13/+7
| | | | | | | | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Nick Thompson <nick.thompson@ge.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Nick Thompson <nick.thompson@ge.com>
* arm, arm926ejs: always do cpu critical initsHeiko Schocher2011-12-06-4/+2
| | | | | | | | | | | | | always do the cpu critical inits in cpu_init_crit, and only jump to lowlevel_init, if CONFIG_SKIP_LOWLEVEL_INIT is not defined. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Christian Riesch <christian.riesch@omicron.at>
* omap_gpmc: use SOFTECC in SPL if it's enabledIlya Yanok2011-12-06-1/+3
| | | | | | | | Use software ECC for the SPL build if support for software ECC in SPL is enabled. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Scott Wood <scottwood@freescale.com>
* nand_spl_simple: add support for software ECCIlya Yanok2011-12-06-2/+11
| | | | | | | | | | This patch adds support for software ECC to the nand_spl_simple driver. To enable this one have to define CONFIG_SPL_NAND_SOFTECC. Tested on OMAP3. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Scott Wood <scottwood@freescale.com>
* AM3517: move AM3517 specific mux defines to generic headerIlya Yanok2011-12-06-79/+41
| | | | | | | AM3517 specific CONTROL_PADCONF_* defines moved from board-specific files to <asm/arch-omap3/mux.h> Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* AM35xx: add EMAC supportIlya Yanok2011-12-06-0/+104
| | | | | | AM35xx has DaVinci-compatible EMAC. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: hardcode 100Mbps for AM35xx and RMIIIlya Yanok2011-12-06-1/+2
| | | | | | | For some reason code setting the speed based on the PHY feedback causes troubles on AM3517 so hardcode 100Mbps for now. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: fix for running with dcache enabledIlya Yanok2011-12-06-4/+42
| | | | | | | | | | | | DaVinci EMAC is present on TI AM35xx SoCs (ARMv7) which run with D-Cache enabled by default. So we have to take care and flush/invalidate the cache before/after the DMA operations. Please note that the receive buffer alignment to 32 byte boundary comes from the old driver version I don't know if it is really needed or alignment to cache line size is enough. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* arm926ejs: add noop implementation for dcache opsIlya Yanok2011-12-06-1/+76
| | | | | | | | Added noop implementation for dcache operations that will buzz about missing real implementation and disable the dcache. This fixes compilation of DaVinci EMAC driver on arm926ejs. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: conditionally compile specific PHY supportIlya Yanok2011-12-06-0/+8
| | | | Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: use internal addresses in buffer descriptorsIlya Yanok2011-12-06-9/+30
| | | | | | | | On AM35xx CPPI RAM had different addresses when accessed from the CPU and from the EMAC. We need to account this to deal with the buffer descriptors correctly. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: move arch-independent defines to separate headerIlya Yanok2011-12-06-289/+319
| | | | | | | | | | | DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs also. This patch moves common defines from arch-davinci/emac_defs.h to drivers/net/davinci_emac.h DaVinci specific PHY drivers hacked to include the new header. We might want to switch to phylib in future. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* BeagleBoard: config: Really switch to ttyO2Koen Kooi2011-12-06-1/+1
| | | | | | | The previous commit changed it to "zero two" instead of the proper "Oh two". This was completely broken! Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> Acked-by: Tom Rini <trini@ti.com>
* ARM: davinci_dm6467Tevm: Fix build breakageAnatolij Gustschin2011-12-06-0/+1
| | | | | | | | | | | | | | | Fix: arch/arm/cpu/arm926ejs/davinci/libdavinci.o: In function `timer_init': /work/agust/git/u-boot/arch/arm/cpu/arm926ejs/davinci/timer.c:62: undefined reference to `davinci_arm_clk_get' drivers/i2c/libi2c.o: In function `i2c_init': /work/agust/git/u-boot/drivers/i2c/davinci_i2c.c:102: undefined reference to `davinci_arm_clk_get' Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com>
* ARM: OMAP: Remove STACKSIZE for IRQ and FIQ if unusedThomas Weber2011-12-06-53/+0
| | | | | | | | | | | This patch removes the definition of stack sizes for irq and fiq if the CONFIG_USE_IRQ is undefined before. Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Thomas Weber <weber@corscience.de> Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
* ARM: OMAP3: Remove unused define SDRC_R_C_BThomas Weber2011-12-06-45/+0
| | | | | | | | | | | This patch removes the unused definition of SDRC_R_C_B from the config files. Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Thomas Weber <weber@corscience.de> Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it> Acked-by: Tom Rini <trini@ti.com>
* ARM: OMAP3: Remove unused define CONFIG_OMAP3430Thomas Weber2011-12-06-13/+0
| | | | | | | | | | This patch removes the CONFIG_OMAP3430, because it is unused. Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Thomas Weber <weber@corscience.de> Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
* omap4: fix IO settingAneesh V2011-12-06-1/+6
| | | | | | | | | | | | The value from TRIM is not working for some 4430 silicons. So, override with hw team recommended value. However, for 4460 TRIM value shall be used as long as the part is trimmed This fixes boot problem on some OMAP4430 ES2.0 Panda boards out there. Cc: Steve Sakoman <sakoman@gmail.com> Signed-off-by: Aneesh V <aneesh@ti.com>
* omap4+: streamline CONFIG_SYS_TEXT_BASE and other SDRAM addressesAneesh V2011-12-06-15/+21
| | | | | | | | | | | | | | | | | | | | | | | | Change the CONFIG_SYS_TEXT_BASE and the addresses of SDRAM buffers used by SPL(heap and BSS) keeping in mind the following requirements: 1. Make sure that SPL's heap and BSS doesn't come in the way of Linux kernel, which is typically loaded at 0x80008000. This will be important when SPL directly loads kernel. 2. Align the CONFIG_SYS_TEXT_BASE between TI internal U-Boot and mainline U-Boot. This avoids a lot of confusion and allows for the inter-operability of x-loader, SPL, internal U-Boot, mainline U-Boot etc. The internal U-Boot's address can not be changed to that of mainline U-Boot as internal U-Boot doesn't have relocation and 0x80100000 used by mainline U-Boot will clash with kernel 3. Assume only a minimum amount of memory that may be available on any practical OMAP4/5 board in future too. We are assuming a minimum of 128 MB of memory Signed-off-by: Aneesh V <aneesh@ti.com>
* omap4460: add ES1.1 identificationAneesh V2011-12-06-1/+12
| | | | Signed-off-by: Aneesh V <aneesh@ti.com>
* omap4: emif: fix error in driverAneesh V2011-12-06-2/+2
| | | | | | | | | | There was a typo in the EMIF driver. It went un-noticed because it affected only when automatic detection is enabled and even then half the memory was configured and identified properly. Reported-by: Rockefeller <rockefeller.lin@innocomm.com> Signed-off-by: Aneesh V <aneesh@ti.com>
* omap: remove I2C from SPLAneesh V2011-12-06-1/+0
| | | | | | | Due to some recent changes I2C is no longer required in SPL. Remove the i2c_init() call to save some space Signed-off-by: Aneesh V <aneesh@ti.com>
* omap4460: fix TPS initializationAneesh V2011-12-06-10/+13
| | | | | | | | | | | TPS power IC is controlled using a GPIO (gpio_wk7). This GPIO should be maintained at logic 1 always. As such an internal pull-up on this pin will do the job, driving the GPIO outuput is not needed. This will avoid the need of using GPIO library in SPL and also may save some power. Signed-off-by: Aneesh V <aneesh@ti.com>
* omap: fix cache line size for omap3/omap4 boardsAneesh V2011-12-06-0/+17
| | | | | | Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
generated by cgit v1.1 at 2024-11-05 12:54:50 +0000