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* ppc4xx: Add FPGA support and BSP commands for PMC440 boardsMatthias Fuchs2007-12-28-0/+1066
| | | | | | | This patch adds some BSP commands and FPGA booting support for esd's PMC440 boards. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* ppc4xx: Add initial esd PMC440 board filesMatthias Fuchs2007-12-28-0/+2497
| | | | | | | This patch adds the first files for the new esd PMC440 boards. The next two patches will complete the PMC440 board support. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* ppc4xx: Add EEPROM write protection for PLU405 boards + misc. updatesMatthias Fuchs2007-12-28-8/+93
| | | | | | | | | - add EEPROM write protection for esd PLU405 boards. - initialize NAND GPIOs - use correct io accessors - cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* ppc4xx: use correct io accessors for esd's LCD codeMatthias Fuchs2007-12-28-7/+8
| | | | | | | This patch fixes esd's LCD dectection code to work correctly with newer gcc versions. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* ppc4xx: Maintenance patch for VOH405 boardsMatthias Fuchs2007-12-28-39/+127
| | | | | | | | | | | - add EEPROM write protection - initialize NAND GPIOs - use correct io accessors - slow down I2C clock to 100kHz - enable ext. I2C bus - cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* ppc4xx: Enable 405EP PCI arbiter per default on all boardsStefan Roese2007-12-28-0/+5
| | | | | | | | | | In an attmemt to clean up the 4xx start.S file, I removed the enabling of the internal 405EP PCI arbiter. This is needed for multiple other 405EP platforms, like most of the esd 405EP. Now the internal PCI arbiter is enabled again per default as it has been before. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* ppc4xx: Fix bug in cpu_init.c (405EP instead of 450EP)Stefan Roese2007-12-28-1/+1
| | | | | Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* ppc4xx: Fix compilation problem of kilauea/haleakala nand booting targetStefan Roese2007-12-28-1/+1
| | | | | | | Use correct link to nand_ecc now located in drivers/mtd/nand/ for the platforms mentioned above. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of /home/stefan/git/u-boot/u-boot into for-1.3.2-ver2Stefan Roese2007-12-27-1822/+9769
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| * Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2007-12-27-113/+175
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| | * Some configuration updates for the TQM5200 based TB5200 board:Martin Krause2007-12-27-1/+2
| | | | | | | | | | | | | | | | | | | | | - enable command line history - increase malloc space (because of bigger flash sectors) Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * TQM8xx: use the CFI flash driver on all TQM8xx boardsMartin Krause2007-12-27-64/+120
| | | | | | | | | | | | Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * TQM885D: adjust for doubled flash sector size + some minor fixesMartin Krause2007-12-27-13/+20
| | | | | | | | | | | | Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * TQM885D: Exchanged SDRAM timing by a more relaxed timing.Jens Gehrlein2007-12-27-10/+8
| | | | | | | | | | | | | | | | | | | | | | | | CAS-Latency=2, Write Recovery Time tWR=2 The max. supported bus frequency is 66 MHz. Therefore, changed threshold to switch from 1:1 mode to 2:1 from 80 MHz to 66 MHz. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * TQM885D: use calculated cpuclk instead of measuring itMartin Krause2007-12-27-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | On the TQM885D the measurement of cpuclk with the PIT reference timer ist not necessary. Since all module variants use the same external 10 MHz oscillator, the cpuclk only depends on the PLL configuration - which is readable by software. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * TQM885D: fix SDRAM refreshJens Gehrlein2007-12-27-16/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At 133 MHz the current SDRAM refresh rate is too fast (measured 4 * 1.17 us). CFG_MAMR_PTA changes from 39 to 128. This result in a refresh rate of 4 * 7.8 us at the default clock 66 MHz. At 133 MHz the value will be then 4 * 3.8 us. This is a compromise until a new method is found to adjust the refresh rate. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * TQM860M: Support for 10col SDRAMs, max. 128 MiBJens Gehrlein2007-12-27-2/+5
| | | | | | | | | | | | Signed-off-by: Martin Krause <martin.krause@tqs.de>
| * | Fix coding style issues; update CHANGELOG.Wolfgang Denk2007-12-27-197/+917
| | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2007-12-27-6/+5766
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| | * Merge branch 'master' of git://www.denx.de/git/u-boot-shWolfgang Denk2007-12-27-6/+5766
| | |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: MAINTAINERS Signed-off-by: Wolfgang Denk <wd@denx.de>
| | | * sh: Moved driver of the SuperH dependenceNobuhiro Iwamatsu2007-12-07-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The composition of the directory in the drivers/ changed. I moved SuperH serial driver and marubun PCMCIA driver. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * Merge git://www.denx.de/git/u-bootNobuhiro Iwamatsu2007-12-07-2/+2
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| | | * \ Merge git://www.denx.de/git/u-bootNobuhiro Iwamatsu2007-12-07-1169/+2818
| | | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/Makefile
| | | * | | sh: Add SuperH boards maintainer to MAINTAINERS fileNobuhiro Iwamatsu2007-11-29-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MS7750SE and MS7722SE's board maintainer to MAINTAINERS file. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | sh: Add ms7750se support in MAKEALLNobuhiro Iwamatsu2007-11-29-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | sh: Add sh3 and sh4 support in MAKEALLJean-Christophe PLAGNIOL-VILLARD2007-11-29-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | sh: Add document for SuperH.Nobuhiro Iwamatsu2007-11-29-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This document is a summary of information concerning SuperH of U-Boot. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | sh: Add marubun's pcmcia driverNobuhiro Iwamatsu2007-11-29-0/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Marubun pcmcia is a chip for PCMCIA used with SuperH. Of course, this can be used even by other architectures. When use this driver, came to be able to use CompactFlash and Ethernet. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | sh: Update SuperH SCIF driverNobuhiro Iwamatsu2007-11-29-15/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Changed volatile unsigned to vu_. - Changed Makefile for kconfig. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | Merge git://www.denx.de/git/u-bootNobuhiro Iwamatsu2007-11-29-1657/+7852
| | | |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/Makefile
| | | * | | | sh: Add support command of ide with shNobuhiro Iwamatsu2007-09-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | | sh: Update MakefileNobuhiro Iwamatsu2007-09-23-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support MS7722SE01 to Makefile. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | | sh: Add support Renesas sh7722 processor and Hitachi MS7722SE01 boardNobuhiro Iwamatsu2007-09-23-0/+2016
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | | sh: Update MS7750SE01 platformNobuhiro Iwamatsu2007-09-23-50/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | | sh: Remove comment out code from include/asm-sh/cpu_sh4.hNobuhiro Iwamatsu2007-09-23-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | | sh: Update core code of SuperH.Nobuhiro Iwamatsu2007-09-23-270/+964
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | | Merge git://www.denx.de/git/u-bootNobuhiro Iwamatsu2007-09-23-151414/+129105
| | | |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: CREDITS
| | | * | | | | sh: MS7750SE support.Nobuhiro Iwamatsu2007-05-13-0/+479
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Hitachi MS7750SE. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | * | | | | sh: First support code of SuperH.Nobuhiro Iwamatsu2007-05-13-1/+2257
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | | | | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2007-12-27-13/+451
| |\ \ \ \ \ \ \ | | |/ / / / / /
| | * | | | | | Merge branch 'master' of git://www.denx.de/git/u-boot-avr32Wolfgang Denk2007-12-27-13/+451
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| | | * | | | | | AVR32: Fix logic inversion in disable_interrupts()Haavard Skinnemoen2007-12-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | disable_interrupts() should return nonzero if interrupts were _enabled_ before, not disabled. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | | * | | | | | AVR32: Enable interrupts at bootupHaavard Skinnemoen2007-12-17-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The timer code depends on the timer interrupt to keep track of the upper 32 bits of the cycle counter. This obviously doesn't work when interrupts are disabled the whole time. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | | * | | | | | AVR32: Fix wrong pin setup for USART3Haavard Skinnemoen2007-12-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As reported by Gerhard Berghofer: in "gpio_enable_usart3" the correct pins for USART 3 are PB17 and PB18 instead of PB18 and PB19. which is obviously correct. There's currently no code that uses USART3, but custom boards may run into problems. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | | * | | | | | README: Remove ATSTK1000 daughterboard listHaavard Skinnemoen2007-12-17-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As noted by Kim Phillips, these lists tend to become out of date. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | | * | | | | | Add ATSTK100[234] to MAINTAINERSHaavard Skinnemoen2007-12-17-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add all the ATSTK1000 daughterboards to MAINTAINERS along with their "mother". Also update the entry for ATSTK1000 to be not only about the AP7000 CPU; it's intended to handle all CPUs in the AT32AP family. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | | * | | | | | AVR32: Add support for the ATSTK1004 boardHaavard Skinnemoen2007-12-17-0/+189
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ATSTK1004 is a daughterboard for ATSTK1000 with the AT32AP7002 CPU, which is a derivative of AT32AP7000. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | | * | | | | | AVR32: Add support for the ATSTK1003 boardHaavard Skinnemoen2007-12-17-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ATSTK1003 is a daughterboard for ATSTK1000 with the AT32AP7001 CPU, which is a derivative of AT32AP7000. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | | * | | | | | AVR32: Make some AT32AP700x peripherals optionalHaavard Skinnemoen2007-12-17-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a chip-features file providing definitions of the form AT32AP700x_CHIP_HAS_<peripheral> to indicate the availability of the given peripheral on the currently selected chip. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | | * | | | | | AVR32: Rename at32ap7000 -> at32ap700xHaavard Skinnemoen2007-12-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SoC-specific code for all the AT32AP700x CPUs is practically identical; the only difference is that some chips have less features than others. By doing this rename, we can add support for the AP7000 derivatives simply by making some features conditional. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
generated by cgit v1.1 at 2024-09-12 17:22:27 +0000