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* mx28: Fix typo in POWER_DCLIMITS_NEGLIMIT_OFFSETMarek Vasut2012-11-24-1/+1
| | | | | | | | | The POWER_DCLIMITS_NEGLIMIT_OFFSET bit in mx28 power supply block is not called POWER_DCLIMITS_NETLIMIT_OFFSET, but POWER_DCLIMITS_NEGLIMIT_OFFSET. Correct the name in the header file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* mx28: Fix typo in POWER_MINPWR_VBG_OFFMarek Vasut2012-11-24-1/+1
| | | | | | | | | The POWER_MINPWR_VBG_OFF bit in mx28 power supply block is not called POWER_MINPWR_FBG_OFF, but POWER_MINPWR_VBG_OFF. Correct the name in the header file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* mx5: Mark lowlevel_init board-specific codeBenoît Thébaudeau2012-11-19-1/+9
| | | | | | | | | | | | The mx5 lowlevel_init.S contains board-specific code based on the reference design. Let's keep it since it avoids creating new lowlevel_init files and it may be used by many boards. But add a config to make it optional in order not to cause issues on boards not following this part of the reference design. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de>
* ehci-mxc: Fix host power mask bit for i.MX25Benoît Thébaudeau2012-11-19-1/+1
| | | | | | | | | | | | | The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance selection bit. This issue has been reported by Eric Bénard <eric@eukrea.com> and fixed by Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s had been copied. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de>
* mx35pdk: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx31pdk: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx25pdk: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx51evk: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6qsabre_common: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
* mx6qsabrelite: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
* mx53loco: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx28evk: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* ehci-mxc: Fix host power mask bit for i.MX35Benoît Thébaudeau2012-11-19-1/+1
| | | | | | | | | | | | | | The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance selection bit. This issue has been reported by Michael Burkey <mdburkey@gmail.com> and fixed by Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s had been copied. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6: clock: Only show CSPI clock if CSPI is enabledFabio Estevam2012-11-19-0/+2
| | | | | | | | | If a board does not enable CSPI, there is no need to show the CSPI clock frequency as part of the 'clock' command. Reported-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com>
* spi: mxc_spi: Fix spi clock glitch durant resetFabio Estevam2012-11-19-2/+2
| | | | | | | | | | | Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* spi: mxc_spi: Fix handling of chip selectFabio Estevam2012-11-19-2/+3
| | | | | | | | | In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx5: Print CSPI clock in 'clock' commandFabio Estevam2012-11-19-1/+3
| | | | | | Print CSPI clock in 'clock' command. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* mx5: Align SPI CS naming with i.MX53 reference manualFabio Estevam2012-11-19-3/+3
| | | | | | Align SPI chip select naming with i.MX53 reference manual. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* ehci-mx5/6: Make board_ehci_hcd_init() optionalBenoît Thébaudeau2012-11-16-3/+10
| | | | | | | | | | | | A custom board_ehci_hcd_init() may be unneeded, so add a weak default implementation doing nothing. By the way, use simple __weak from linux/compiler.h for board_ehci_hcd_postinit() instead of weak alias with full attribute. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* mx35pdk: Add support for OTGBenoît Thébaudeau2012-11-16-0/+39
| | | | | | | | | Add support for the OTG port on the mx35pdk Personality board. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Stefano Babic <sbabic@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de>
* ehci-mxc: Add support for i.MX35Benoît Thébaudeau2012-11-16-0/+71
| | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* ehci-mxc: Define host offsetsBenoît Thébaudeau2012-11-16-1/+3
| | | | | | | | | | Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* ehci-mxc: Make i.MX25 EHCI configurableBenoît Thébaudeau2012-11-16-11/+67
| | | | | | | | | Use EHCI MXC configuration options for i.MX25. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Matthias Weisser <weisserm@arcor.de>
* ehci-mxc: Make EHCI power/oc polarities configurableBenoît Thébaudeau2012-11-16-4/+62
| | | | | | | | | | Make EHCI power and overcurrent polarities configurable. If not set, these new configurartions keep the default register values so that existing board files do not have to be changed. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* ehci-mx5: Add missing OC_DIS for i.MX53Benoît Thébaudeau2012-11-16-0/+24
| | | | | | | | The i.MX53 has MXC_H*_UCTRL_H*_OC_DIS_BIT bits to disable the oc pin. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* ehci-mx5: Fix *PM usage for i.MX53Benoît Thébaudeau2012-11-16-1/+6
| | | | | | | | The MXC_*_UCTRL_*PM_BIT bits are available only on i.MX51. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* ehci-mx5: Fix OPM usageBenoît Thébaudeau2012-11-16-2/+2
| | | | | | | | | MXC_OTG_UCTRL_OPM_BIT disables (masks) the power/oc pins if set, like MXC_H1_UCTRL_H1PM_BIT and MXC_H2_UCTRL_H2PM_BIT, not the opposite. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* ehci-mx5: Fix OC_DIS usageBenoît Thébaudeau2012-11-16-3/+3
| | | | | | | | | MXC_OTG_PHYCTRL_OC_DIS_BIT disables the oc pin if set, like MXC_H1_OC_DIS_BIT, not the opposite. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* ehci-mx5: Clean upBenoît Thébaudeau2012-11-16-19/+26
| | | | | | | | | | Clean up ehci-mx5: - Fix column alignments. - Fix comments. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* ehci-mxc: Clean upBenoît Thébaudeau2012-11-16-46/+40
| | | | | | | | | | | Clean up ehci-mxc: - Remove useless #if's. - Fix identation. - Issue a #error if used with an unsupported platform. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* mx31: Move EHCI definitions to ehci-fsl.hBenoît Thébaudeau2012-11-16-26/+22
| | | | | | | | | The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to ehci-fsl.h so that all MXC SoCs can use them. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* arch-mx6: add mx6dl_pins.hTroy Kisky2012-11-10-0/+149
| | | | | | | Only the values used in the sabrelite board are added currently. Add more as other boards use them. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* imx-common: cpu: add imx_ddr_sizeTroy Kisky2012-11-10-0/+52
| | | | | | | | | | Read memory setup registers to determine size of available ram. This routine works for mx53/mx6x I need this because when mx6solo called get_ram_size with a too large maximum size, the system hanged. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mx6: use CONFIG_MX6 instead of CONFIG_MX6QTroy Kisky2012-11-10-4/+7
| | | | | | | | | | Use CONFIG_MX6 when the particular processor variant isn't important. Reserve the use of CONFIG_MX6Q to specifically test for quad cores variant. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mx6: soc: update get_cpu_rev and get_imx_type for mx6solo/sololiteTroy Kisky2012-11-10-17/+51
| | | | | | | | | | Previously, the same value was returned for both mx6dl and mx6solo. Check number of processors to differeniate. Also, a freescale patch says that sololite has its cpu/rev stored at 0x280 instead of 0x260. I don't have a sololite to verify. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* Merge git://git.denx.de/u-bootStefano Babic2012-11-10-29058/+23633
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| * Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2012-11-09-37/+14
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| | * microblaze: Fix compilation failure because of missing libdtsMichal Simek2012-11-08-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microblaze platform can use CONFIG_OF_EMBED option but also it is necessary to support boards which don't want to use this option. U-Boot doesn't compile dts/libdts.o for #undef CONFIG_OF_EMBED case that's why it should be guarded by ifdef. Signed-off-by: Michal Simek <monstr@monstr.eu>
| | * microblaze: Remove asm/bitops.h from asm/posix_types.hMichal Simek2012-11-07-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch "include/linux/byteorder: import latest endian definitions from linux" (sha1: eef1cf2d5cf1cae5fb76713e912263dedf110aeb) Introduced a lot of compilation failures with unknow types. include/linux/byteorder/big_endian.h:45:1: error: unknown type name '__le64' include/linux/byteorder/big_endian.h: In function '__cpu_to_le64p': include/linux/byteorder/big_endian.h:47:18: error: '__le64' undeclared (first use in this function) include/linux/byteorder/big_endian.h:47:18: note: each undeclared identifier is reported only once for each function it appears in include/linux/byteorder/big_endian.h:47:25: error: expected ';' before '__swab64p' include/linux/byteorder/big_endian.h: At top level: include/linux/byteorder/big_endian.h:49:1: error: unknown type name '__le64' include/linux/byteorder/big_endian.h:53:1: error: unknown type name '__le32' include/linux/byteorder/big_endian.h: In function '__cpu_to_le32p': include/linux/byteorder/big_endian.h:55:18: error: '__le32' undeclared (first use in this function) include/linux/byteorder/big_endian.h:55:25: error: expected ';' before '__swab32p' include/linux/byteorder/big_endian.h: At top level: include/linux/byteorder/big_endian.h:57:1: error: unknown type name '__le32' include/linux/byteorder/big_endian.h:61:1: error: unknown type name '__le16' ... Removing asm/bitops.h solved this problem. Signed-off-by: Michal Simek <monstr@monstr.eu>
| | * microblaze: Flush caches before enabling themMichal Simek2012-11-07-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | Flushing caches is necessary because of soft reset which doesn't clear caches. Signed-off-by: Michal Simek <monstr@monstr.eu> Reviewed-by: Marek Vasut <marex@denx.de>
| | * microblaze: Fix byteorder for microblazeMichal Simek2012-11-07-23/+0
| | | | | | | | | | | | | | | | | | | | | | | | Just remove ancient code. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Stephan Linz <linz@li-pro.net> Reviewed-by: Marek Vasut <marex@denx.de>
| | * microblaze: Fix compilation warning in ext2_find_next_zero_bitMichal Simek2012-11-07-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ext2_find_next_zero_bit must be also static if __swab32 is also static. Warning: include/asm/bitops.h:369:22: warning: '__fswab32' is static but used in inline function 'ext2_find_next_zero_bit' which is not static [enabled by default] Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Stephan Linz <linz@li-pro.net>
| * | common/command.c: revert changes from commit 199adb60Anatolij Gustschin2012-11-08-8/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 199adb601ff34bdbbd0667fac80dfe0a87bffc2b "common/misc: sparse fixes" broke the help command trying to fix the sparse error "command.c:44:38: error: bad constant expression". As Henrik points out, the fix was bad because the commit used CONFIG_SYS_MAXARGS whereas the code intended to use the maximum number of commands (not arguments to a command). Revert command.c changes to the original code as asked by Wolfgang. Reported-by: Henrik Nordström <henrik@henriknordstrom.net> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * Merge branch 'master' of git://git.denx.de/u-boot-avr32Tom Rini2012-11-05-9/+0
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| | * avr32: allow multi block mmc access for all boardsAndreas Bießmann2012-11-02-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 1db7377a70a8d931c32648e717695133120d5456 fixes the gen_atmel_mci driver to be able to use multi block access for avr32. Therefore remove the setting which forces single block access. This also adds a huge performace gain for mmc access: ---8<--- Loading file "/boot/uImage" from mmc device 0:1 1830666 bytes read in 1293 ms (1.3 MiB/s) --->8--- vs. ---8<--- Loading file "/boot/uImage" from mmc device 0:1 1830666 bytes read in 237 ms (7.4 MiB/s) --->8--- Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: haavard.skinnemoen@atmel.com Cc: hans-christian.egtvedt@atmel.com Cc: mpfj@mimc.co.uk Cc: alex.raimondi@miromico.ch Cc: julien.may@miromico.ch Cc: egtvedt@samfundet.no Cc: havard@skinnemoen.net
| * | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-11-05-639/+5732
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| | * | socfpga/spl: Remove malloc.hVikram Narayanan2012-11-04-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove unused header Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
| | * | socfpga/spl: Remove timer_init from spl_board_initVikram Narayanan2012-11-04-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Timer is initialized already in board_init_r function in (common/spl/spl.c) No need to initialize it again Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com>
| | * | arm: atmel: cpux9k2: add missing cache configsJens Scharsig (BuS Elektronik)2012-11-04-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | * add CONFIG_SYS_CACHELINE_SIZE to eb_cpux9k2 board config header * dissable dcache (CONFIG_SYS_DCACHE_OFF) for eb_cpux9k2 Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
| | * | Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-11-03-32/+3421
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