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* fsl_esdhc: fix wrong clock maskLi Yang2010-01-25-1/+1
| | | | | | | | Fix typo in SYSCTL_CLOCK_MASK, which caused residual in high bits of SDCLKFS. Signed-off-by: Jin Qing <B24347@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Revert "ppc/p4080: Fix reporting of PME & FM clock frequencies"Kumar Gala2010-01-25-6/+6
| | | | | | | | | This reverts commit bc20f9a9527afe8ae406a74f74765d4323f04922. The original code was correct. I clearly need glasses or a brown paper bag. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/p4080: Fix mask width of RCW fields MEM_PLL_RAT, SYS_PLL_RATJames Yang2010-01-25-2/+2
| | | | | | | | The masks for MEM_PLL_RAT and SYS_PLL_RAT should have been 5-bits instead of 4. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* jffs2: fix hangs/crashs when not using CONFIG_JFFS2_PART_SIZEMike Frysinger2010-01-26-2/+2
| | | | | | | | | | Commit b5b004ad8a0ac6f98bd5708ec8b22fbddd1c1042 caused the sector_size to be calculated incorrectly when the part size was not hardcoded. This is because the new code relied on part->size but tried to do the calculation before it was initialized properly, and it did not take into consideration the magic SIZE_REMAINING define. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* getline: split out for darwin systemsMike Frysinger2010-01-26-99/+111
| | | | | | | At least on OS X 10.5 and older, getline does not exist. So split out the function from the mingw code so that we can pull it in for Darwin systems. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* tools: give explicit libfdt pathsMike Frysinger2010-01-26-1/+1
| | | | | | | | | The current libfdt object rules hard depend implicitly on the .depend file being correct. If it isn't, then it is unable to properly compile the objects. Give it a full path like all the other implicit rules here so it will always work in face of .depend issues. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* gzip/zlib: make features optionalMike Frysinger2010-01-26-2/+7
| | | | | | | | If you really want to slim down U-Boot and you would rather use a higher compression scheme (like LZMA), it'd be nice to disable gzip/zlib since these code bases take up a significant amount of space. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* mkimage: Add Freescale imx Boot Image support (imximage)Stefano Babic2010-01-25-0/+628
| | | | | | | | | | | | This patch adds support for "imximage" (MX Boot Image) to the mkimage utility. The imximage is used on the Freescales's MX.25, MX.35 and MX.51 processors. Further details under doc/README.imximage. This patch was tested on a Freescale mx51evk board. Signed-off-by: Stefano Babic <sbabic@denx.de>
* mpc5xxx: Support CPU internal watchdog.Detlev Zundel2010-01-25-2/+37
| | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
* mpc512x: Add display of reset status registerDetlev Zundel2010-01-24-5/+7
| | | | | | | | Content of the RSR is put into gd early so we can output it together with the CPU info. The clearing of gd in board_init_f is redundant for this architecture as it is done in cpu_init_f so we remove it. Signed-off-by: Detlev Zundel <dzu@denx.de>
* Merge branch 'master-sync' of git://git.denx.de/u-boot-armWolfgang Denk2010-01-23-41/+5447
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| * at91: Enable slow master clock on meesc boardDaniel Gorsulowski2010-01-23-0/+27
| | | | | | | | | | | | | | | | Normally the processor clock has a divisor of 2. In some cases this this needs to be set to 4. Check the user has set environment mdiv to 4 to change the divisor. Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
| * SPEAr : Support added for SPEAr320 boardVipin KUMAR2010-01-23-1/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | SPEAr320 SoC support contains basic spear320 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver - emi driver(cfi support) Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Support added for SPEAr310 boardVipin KUMAR2010-01-23-1/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | SPEAr310 SoC support contains basic spear310 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver - emi driver(cfi support) Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : emi controller initialization for CFI driver supportVipin KUMAR2010-01-23-0/+113
| | | | | | | | | | | | | | | | | | SPEAr310 and SPEAr320 SoCs contain an EMI controller to interface Paraller NOR flashes. This patch adds the support for this IP The standard CFI driver is used to interface with NOR flashes Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Support added for SPEAr300 boardVipin KUMAR2010-01-23-0/+194
| | | | | | | | | | | | | | | | | | | | | | | | SPEAr300 SoC support contains basic spear300 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Support for HW mac id read/write from i2c memVipin KUMAR2010-01-23-1/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the support to read and write mac id from i2c memory. For reading: if (env contains ethaddr) pick env ethaddr else pick ethaddr from i2c memory For writing: chip_config ethaddr XX:XX:XX:XX:XX:XX writes the mac id in i2c memory Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Support added for SPEAr600 boardVipin KUMAR2010-01-23-0/+928
| | | | | | | | | | | | | | | | | | | | | | | | SPEAr600 SoC support contains basic spear600 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : usbd driver support for SPEAr SoCsVipin KUMAR2010-01-23-0/+1231
| | | | | | | | | | | | | | | | | | | | | | | | | | SPEAr SoCs contain a synopsys usb device controller. USB Device IP can work in 2 modes - DMA mode - Slave mode The driver adds support only for slave mode operation of usb device IP. This driver is used along with standard USBTTY driver to obtain a tty interface over USB on the host Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : nand driver support for SPEAr SoCsVipin KUMAR2010-01-23-0/+182
| | | | | | | | | | | | | | | | SPEAr SoCs contain an FSMC controller which can be used to interface with a range of memories eg. NAND, SRAM, NOR. Currently, this driver supports interfacing FSMC with NAND memories Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : smi driver support for SPEAr SoCsVipin KUMAR2010-01-23-0/+639
| | | | | | | | | | | | | | | | SPEAr SoCs contain a serial memory interface controller. This controller is used to interface with spi based memories. This patch adds the driver for this IP. Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : i2c driver support added for SPEAr SoCsVipin KUMAR2010-01-23-0/+478
| | | | | | | | | | | | | | SPEAr SoCs contain a synopsys i2c controller. This patch adds the driver for this IP. Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Adding basic SPEAr architecture support.Vipin KUMAR2010-01-23-0/+578
| | | | | | | | | | | | | | | | | | | | SPEAr Architecture support added. It contains the support for following SPEAr blocks - Timer - System controller - Misc registers Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : Adding README.spear in docVipin KUMAR2010-01-23-0/+48
| | | | | | | | | | | | | | README.spear contains information about SPEAr architecture and build options etc Signed-off-by: Vipin <vipin.kumar@st.com>
| * ARM Update mach-typesTom Rix2010-01-23-0/+351
| | | | | | | | | | | | | | | | | | | | Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 2045124ffd1a5e46d157349016a2c50f19c8c91d Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| * Kirkwood: Makefile cleanup- fixed ordering (cosmetic change)Prafulla Wadaskar2010-01-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | As per coding guidlines, it is good to maintain proper ordering in the makefiles. This was missed during initial coding, corrected here. This was discovered during orion5x code review Thanks to Albert Aribaud for this. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * Kirkwood: Upgated licencing for files imported from linux source to GPLv2 or ↵Prafulla Wadaskar2010-01-23-14/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | later These are few files directly imported from Linux kernel source. Those are not modifyed at all ar per strategy. These files contains source with GPLv2 only whereas u-boot expects GPLv2 or latter These files are updated for the same from prior permission from original writes Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * s5pc1xx: update cache routinesMinkyu Kang2010-01-23-23/+130
| | | | | | | | | | | | | | | | | | | | Because of v7_flush_dcache_all is moved to omap3/cache.S and s5pc110 needs cache routines, update s5pc1xx cache routines. l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S and invalidate_dcache is modified for SoC specific. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * samsung: fix DMC1_MEM_CFG for s3c64xxSeunghyeon Rhee2010-01-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MSB of DMC1_MEM_CFG can be set to '1' for separate CKE control for S3C6400. In the configuration of SMDK6400, however, two 16-bit mDDR (SAMSUNG K4X51163) chips are used in parallel to form 32-bit memory bus and there is no need to control CKE for each chip separately. AFAIK, CKE1 is not at all connected. Only CKE0 is used. Futhermore, it should be '0' always for S3C6410. When tested with a board which has a S3C6410 and the same memory configuration, a side effect is observed that u-boot command "reset" doesn't work leading to system hang. Leaving the bit clear is safe in most cases. Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | ppc4xx: Kilauea: Add CPLD version detection and EBC reconfigurationStefan Roese2010-01-23-5/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A newer CPLD version on the 405EX evaluation board requires a different EBC controller setup for the CPLD register access. This patch adds a CPLD version detection for Kilauea and code to reconfigure the EBC controller (chip select 2) for the old CPLD if no new version is found. Additionally the CPLD version is printed upon bootup: Board: Kilauea - AMCC PPC405EX Evaluation Board (CPLD rev. 0) Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Cc: Zhang Bao Quan <bqzhang@udtech.com.cn>
* | ppc4xx: Fix sending type 1 PCI transactionsFelix Radensky2010-01-23-1/+2
|/ | | | | | | | | | The list of 4xx SoCs that should send type 1 PCI transactions is not defined correctly. As a result PCI-PCI bridges and devices behind them are not identified. The following 4xx variants should send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
* mpc512x: Use in/out accessors for all registersDetlev Zundel2010-01-21-18/+19
| | | | | | | This is not only a cosmetic change as it fixes the real bug of board reset not working with the ELDK 4.2 toolchain. Signed-off-by: Detlev Zundel <dzu@denx.de>
* tools: allow people to compile w/out configuringMike Frysinger2010-01-21-2/+16
| | | | | | | | | | | It's useful to be able to build up the host tools without having to select a board first. Pretty much all tools in there are config-independent anyways. Also add a shortcut "tools-all" to quickly build all host tools that are actually config-independent to allow for simple test builds. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* ubsha1: drop unnecessary includes/prototypesMike Frysinger2010-01-21-8/+0
| | | | | | | This code doesn't use any config.h defines, and the sha1.h header already declares a sha1_csum prototype. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* image.h: avoid command.h for host toolsMike Frysinger2010-01-21-2/+1
| | | | | | | | The u-boot command structures don't get used with host systems, so don't bother including it when building host code. This avoids an implicit need on config.h in the process. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Removing Atmel from ARM926EJ-S SystemsMatthias Weisser2010-01-21-1/+1
| | | | Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2010-01-21-2/+2
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| * Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-01-21-2/+2
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| | * ppc4xx: Allow setting a single SPD EEPROM address for DDR2 DIMMsFelix Radensky2010-01-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On platforms where SPD EEPROM and another EEPROM have adjacent I2C addresses SPD_EEPROM_ADDRESS should be defined as a single element array, otherwise DDR2 setup code would fail with the following error: ERROR: Unknown DIMM detected in slot 1 However, fixing SPD_EEPROM_ADDRESS would result in another error: ERROR: DIMM's DDR1 and DDR2 type can not be mixed. This happens because initdram() routine does not explicitly initialize dimm_populated array. This patch fixes the problem. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
| | * ppc4xx: Fix reporting of bootstrap options G and F on 460EX/GTFelix Radensky2010-01-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Bootstrap options G and F are reported incorrectly (G instead of F and vice versa). This patch fixes this. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | | lmb: only force on arches that use itMike Frysinger2010-01-21-20/+40
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | sha1: add dedicated config optionMike Frysinger2010-01-21-1/+2
|/ / | | | | | | | | | | | | The sha1 code is currently compiled for everyone, but in reality, it's only used by the FIT code. So make it optional just like MD5. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2010-01-21-0/+26
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| * | MIPS: qemu_mips: Import asm/unaligned.h from the Linux kernelShinya Kuribayashi2010-01-20-0/+26
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | with a few adjustments for U-Boot. This fixes the following build error: make -C lib_generic/ zlib.c:31:27: error: asm/unaligned.h: No such file or directory zlib.c: In function 'inflate_fast': zlib.c:641: warning: implicit declaration of function 'get_unaligned' make[1]: *** [zlib.o] Error 1 make[1]: Leaving directory `/home/skuribay/git/u-boot.git/lib_generic' make: *** [lib_generic/libgeneric.a] Error 2 Reported-by: Himanshu Chauhan <himanshu@symmetricore.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2010-01-21-7/+103
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| * | MX31: Activate NAND environment on i.MX31 PDK board.Magnus Lilja2010-01-19-4/+21
| | | | | | | | | | | | Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
| * | MXC: Add large page oob layout for i.MX31 NAND controller.Magnus Lilja2010-01-19-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import the large page oob layout from Linux mxc_nand.c driver. The CONFIG_SYS_NAND_LARGEPAGE option is used to activate the large page oob layout. Run time detection is not supported as this moment. This has been tested on the i.MX31 PDK board with a large page NAND device. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
| * | mxc_nand: Update driver to work with i.MX31.Magnus Lilja2010-01-19-3/+31
| | | | | | | | | | | | | | | | | | Tested on i.MX31 Litekit. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
| * | MX31: Add struct definition for clock control module in i.MX31.Magnus Lilja2010-01-19-0/+39
| |/ | | | | | | Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2010-01-21-12/+1083
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