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* MIPS: xburst/start.S: save gd in s0 registerGabor Juhos2013-07-24-1/+2
| | | | | | | | Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: xburst/start.S: save relocation offset in s1 registerGabor Juhos2013-07-24-6/+6
| | | | | | | | Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: xburst/start.S: save relocation address in s2 registerGabor Juhos2013-07-24-3/+5
| | | | | | | | Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: mips32/start.S: rework relocation info checkGabor Juhos2013-07-24-3/+3
| | | | | | | | Make it similar to the code in mips64/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: mips32/start.S: use t8 register for dynamic relocationGabor Juhos2013-07-24-9/+9
| | | | | | | | Synchronize the code with mips64/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: mips32/cache.S: remove superfluous register assignmentGabor Juhos2013-07-24-2/+1
| | | | | | | | | | | | The t4 register already holds the cache line size, and the value of the register is not changed in mips_init_icache. Get the cache line size value from t4 for mips_init_dcache as well and remove the superfluous assignment of t5 register. Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
* MIPS: remove obsolete TODO itemsGabor Juhos2013-07-24-4/+0
| | | | | | | | The MIPS code uses centralized u-boot.lds script already, and dynamic relocation is supported as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: mips64/interrupt.c: remove superfluous includeGabor Juhos2013-07-24-1/+0
| | | | | | | Nothing is used from asm/mipsregs.h. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: mips32/time.c: fix checkpatch errors/warningsGabor Juhos2013-07-24-2/+3
| | | | | | | | | | | | | Checking mips32/time.c with checkpatch.pl shows this: arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required total: 1 errors, 1 warnings, 0 checks, 85 lines checked Fix the code to make checkpatch.pl happy. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: qemu-malta: bring up ethernetGabor Juhos2013-07-24-1/+8
| | | | | | | | | | Qemu emulates a PCNET PCI card for the Malta CoreLV board. Enable the pcnet driver and add board specific ethernet initialization function to bring it up. Also enable the CONFIG_CMD_NET and CONFIG_CMD_PING options. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: qemu-malta: add PCI supportGabor Juhos2013-07-24-0/+216
| | | | | | | | | | | Qemu emulates the Galileo GT64120 System Controller which provides a CPU bus to PCI bus bridge. The patch adds driver for this bridge and enables PCI support for the emulated Malta board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: qemu-malta: setup GT64120 registers as done by YAMONGabor Juhos2013-07-24-1/+55
| | | | | | | | | | | Move the GT64120 register base to 0x1be00000 and setup PCI BAR registers as done by the original YAMON bootloader. This is needed for running Linux kernel. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: qemu-malta: enable flash supportGabor Juhos2013-07-24-2/+9
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: qemu-malta: add reset supportGabor Juhos2013-07-24-0/+14
| | | | | | | | | | The MIPS Malta board has a SOFTRES register. Writing a magic value into that register initiates a board reset. Use this feature to implement reset support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: qemu-malta: add support for emulated MIPS Malta boardGabor Juhos2013-07-24-0/+206
| | | | | | | | | | | | Add minimal support for the MIPS Malta CoreLV board emulated by Qemu. The only supported peripherial is the UART. This is enough to boot U-Boot to the command prompt both in little and big endian mode. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: start.S: emulate REVISION register for qemu-maltaGabor Juhos2013-07-24-1/+7
| | | | | | | | | | | | | | | On the origial Malta boards the REVISION register is accessible at the 0x1fc00010 address. The contents of this register gives information about the revision of the Malta and Core Boards. This register is used by the Linux kernel to identify the actual board it is running on. However the register is not emulated properly by Qemu, so put a hardcoded value into the flash to make Linux work. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: import gt64120.h header from LinuxGabor Juhos2013-07-24-0/+550
| | | | | | | | | | | | The Linux specific register access macros, the extern function declarations and the UL suffixes has been removed. The header file will be used for the qemu-malta board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* net: pcnet: use pci_virt_to_mem to obtain buffer addressesGabor Juhos2013-07-24-1/+1
| | | | | | | | | | | | | | The pcnet driver uses the pci_phys_to_mem function to get the memory address of the DMA buffers. This This assumes an 1:1 mapping between the PCI and physical memory which is not true on all platforms. On MIPS platform U-Boot is running within a mapped memory region, and the pci_phys_to_mem macro can't be used to obtain the memory address of the buffers. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: mips64: fix typos in copyright text of start.STom Rini2013-07-24-1/+1
| | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Conflicts: arch/mips/cpu/mips64/start.S Signed-off-by: Tom Rini <trini@ti.com>
* Add eCos-2.0 SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-131/+48
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add LGPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-66/+488
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add LGPL-2.1+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-73/+511
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-91729/+5994
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* Licenses: introduce SPDX Unique Lincense IdentifiersWolfgang Denk2013-07-24-115/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Like many other projects, U-Boot has a tradition of including big blocks of License headers in all files. This not only blows up the source code with mostly redundant information, but also makes it very difficult to generate License Clearing Reports. An additional problem is that even the same lincenses are referred to by a number of slightly varying text blocks (full, abbreviated, different indentation, line wrapping and/or white space, with obsolete address information, ...) which makes automatic processing a nightmare. To make this easier, such license headers in the source files will be replaced with a single line reference to Unique Lincense Identifiers as defined by the Linux Foundation's SPDX project [1]. For example, in a source file the full "GPL v2.0 or later" header text will be replaced by a single line: SPDX-License-Identifier: GPL-2.0+ We use the SPDX Unique Lincense Identifiers here; these are available at [2]. Note: From the legal point of view, this patch is supposed to be only a change to the textual representation of the license information, but in no way any change to the actual license terms. With this patch applied, all files will still be licensed under the same terms they were before. Note 2: The apparent difference between the old "COPYING" and the new "Licenses/gpl-2.0.txt" only results from switching to the upstream version of the license which is differently formatted; there are not any actual changes to the content. Note 3: There are some recurring questions about linense issues, such as: - Is a "All Rights Reserved" clause a problem in GPL code? - Are files without any license header a problem? - Do we need license headers at all? The following excerpt from an e-mail by Daniel B. Ravicher should help with these: | Message-ID: <4ADF8CAA.5030808@softwarefreedom.org> | Date: Wed, 21 Oct 2009 18:35:22 -0400 | From: "Daniel B. Ravicher" <ravicher@softwarefreedom.org> | To: Wolfgang Denk <wd@denx.de> | Subject: Re: GPL and license cleanup questions | | Mr. Denk, | | Wolfgang Denk wrote: | > - There are a number of files which do not include any specific | > license information at all. Is it correct to assume that these files | > are automatically covered by the "GPL v2 or later" clause as | > specified by the COPYING file in the top level directory of the | > U-Boot source tree? | | That is a very fact specific analysis and could be different across the | various files. However, if the contributor could reasonably be expected | to have known that the project was licensed GPLv2 or later at the time | she made her contribution, then a reasonably implication is that she | consented to her contributions being distributed under those terms. | | > - Do such files need any clean up, for example should we add GPL | > headers to them, or is this not needed? | | If the project as a whole is licensed under clear terms, you need not | identify those same terms in each file, although there is no harm in | doing so. | | > - There are other files, which include both a GPL license header | > _plus_ some copyright note with an "All Rights Reserved" clause. It | > has been my understanding that this is a conflict, and me must ask | > the copyright holders to remove such "All Rights Reserved" clauses. | > But then, some people claim that "All Rights Reserved" is a no-op | > nowadays. License checking tools (like OSLC) seem to indicate this is | > a problem, but then we see quite a lot of "All rights reserved" in | > BSD-licensed files in gcc and glibc. So what is the correct way to | > deal with such files? | | It is not a conflict to grant a license and also reserve all rights, as | implicit in that language is that you are reserving all "other" rights | not granted in the license. Thus, a file with "Licensed under GPL, All | Rights Reserved" would mean that it is licensed under the GPL, but no | other rights are given to copy, modify or redistribute it. | | Warm regards, | --Dan | | Daniel B. Ravicher, Legal Director | Software Freedom Law Center (SFLC) and Moglen Ravicher LLC | 1995 Broadway, 17th Fl., New York, NY 10023 | (212) 461-1902 direct (212) 580-0800 main (212) 580-0898 fax | ravicher@softwarefreedom.org www.softwarefreedom.org [1] http://spdx.org/ [2] http://spdx.org/licenses/ Signed-off-by: Wolfgang Denk <wd@denx.de>
* Prepare v2013.07Tom Rini2013-07-23-1/+1
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* fs/ext4: fix log2blksz un-initialized error, by cacaulating its value from blkszLan Yixun (dlan)2013-07-22-0/+4
| | | | | | | | | | | The problem here is that uboot can't mount ext4 filesystem with commit "50ce4c07df1" applied. We use hard-coded "SECTOR_SIZE"(512) before this commit, now we introduce (block_dev_desc_t *)->log2blksz to replace this macro. And after we calling do_ls()->fs_set_blk_dev(), the variable log2blksz is not initialized, which it's not correct. And this patch try to solve the problem by caculating the value of log2blksz from variable blksz.
* ext4fs: le32_to_cpu() used on a 16-bit fieldRommel Custodio2013-07-22-6/+6
| | | | | | | | | | | | | | Fix reading ext4_extent_header struture on BE machines. Some 16 bit fields where converted to 32 bit fields, due to the byte swap on BE machines the containing value was corrupted. Therefore reading ext4 filesystems on BE machines where broken before. Signed-off-by: Rommel Custodio <sessyargc+uboot@gmail.com> [sent via git-send-email; rework commit message] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* arm: at91sam9n12: change EBI IO to high drive modeBo Shen2013-07-22-1/+1
| | | | | | | | | | | | As both the DDR SDRAM and NAND flash connect to EBI on at91sam9n12 and share the lower 8 bits data line. If use low drive of the data line, it will cause DDR data access corrupt in lower address, so change the data line to high drive mode This will fix the Linux kernel boot issue when use Lower address Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ddr cfg: DRAM_RESET needs 0x00020030Troy Kisky2013-07-20-1/+1
| | | | | | | | | | | | | | | | | The old value of 0x000e0030 will cause ethernet timeout issues on the sabrelite and possibly other boards using the KSZ9021. I have no explanation as to why. But this is a correct change, the TRM will be updated to show that 00b is the only valid setting for bits 19-18 of DRAM_RESET. My thanks go to Liu Hui(Jason) for this information. Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* net: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF caseFabio Estevam2013-07-19-1/+1
| | | | | | | | | | | | | Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the checking for ESTATUS_1000_XHALF, but it incorrectly sets the SUPPORTED_1000baseX_Full flag in this case. Set the SUPPORTED_1000baseX_Half flag instead. Acked-by: Charles Coldwell <coldwell@gmail.com> Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* phy: fix 10/100Mbps operation on 1Gbps-capable linksSascha Silbe2013-07-19-1/+9
| | | | | | | | | | | | | | | | | de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a check for the extended status register in order to support 1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since Extended Status only indicates what the PHY (i.e. the local side) is capable of, this broke communication with non-1Gbps peers. Only check the extended status if the 1000BASE-T registers are actually missing so we don't end up setting speed to 1Gbps even though the previous test (for the combination of local and peer support for 1Gbps) already indicated we can't do 1Gbps with the current peer. Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* mkimage: Use board config to get CONFIG_FIT_SIGNATURE valueSimon Glass2013-07-19-0/+4
| | | | | | | | The value of this config variable is not available to image.h on the host, since the board config is not actually included. Bring this in so that mkimage will be built with image-signing support for sandbox at least. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm:trats:fix: Correction of loaddtb environment variable.Łukasz Majewski2013-07-19-1/+1
| | | | | | | | Missing space for loaddtb command has been added. When missing, ext4load fails with wrong number of passed parameters. Acked-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* bootm: Move fixup_silent_linux() earlier in the bootm stagesSimon Glass2013-07-17-4/+4
| | | | | | | | | | | | Before the bootm refactor, fixup_silent_linux() was done only in the monolithic bootm case, not in the subcommand case. With the refactor, it is done always, which is good. Unfortunately it is done too late, since it is the PREP or CMDLINE stages that set up the command line for Linux. Move fixup_silent_linux() into the LOADOS stage, which is where we find out the OS being used, and can thus decide whether to perform this step. Signed-off-by: Simon Glass <sjg@chromium.org>
* README.mx28_common: Rename it to README.mxsFabio Estevam2013-07-17-0/+0
| | | | | | | | commit 54965b61360 (README: mxs: Introduce README.mxs) should have changed the file name to README.mxs, as it covers both mx23 and mx28 now. Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2013-07-16-5/+4
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| * fsl_esdhc: Touch only relevant sys ctrl bitsDirk Behme2013-07-16-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Dealing with the sys ctrl register should touch only the relevant bits and not accidently the whole register. On i.MX6, the sys control register contains bits which shouldn't be reset to 0, e.g. SYS_CTRL[3-0] and IPP_RST_N (SYS_CTRL[23]). Do this by read/modify/write instead of just a 32bit write. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * drivers/mmc/dw_mmc - remove extra arch specific "asm/arch/clk.h" inclusionAlexey Brodkin2013-07-16-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. No contents of "asm/arch/clk.h" is used within "dw_mmc.c". 2. If arch doesn't have "asm/arch/clk.h" driver won't build. Without mentioned inclusion dw_mmc driver could be built for arches other than ARM. For ARM driver still builds without it. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Mischa Jonker <mjonker@synopsys.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com> Cc: Amar <amarendra.xt@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * Powerpc: eSDHC: Fix mmc read write err in uboot of T4240QDS boardHaijun.Zhang2013-07-16-1/+1
| | | | | | | | | | | | | | | | | | Fill the right command type when using CMD12 to stop data transfer. Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> CC: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | powerpc/mpc85xx:Disable Debug TLB entry for non-minimal SPLPrabhakar Kushwaha2013-07-16-1/+3
| | | | | | | | | | | | | | | | | | | | CONFIG_SPL_BUILD creates debug TLB entry, so disable it before init_tlbs. CONFIG_SPL_INIT_MINIMAL never creates any debug TLB entry, so no need of disable_tlb(). Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mpc85xx: Add gdsys ControlCenter Digital boardDirk Eibach2013-07-16-1/+2699
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gdsys ControlCenter Digital board is based on a Freescale P1022 QorIQ SOC. It boots from SPI-Flash but can be configured to boot from SD-card for factory programming and testing. On board peripherals include: - 2x GbE - Lattice ECP3 FPGA connected via PCIe - mSATA RAID1 - USB host - DisplayPort video output - Atmel TPM Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | Build arch/$ARCH/lib/bootm.o depending on CONFIG_CMD_BOOTMDirk Eibach2013-07-16-13/+15
| | | | | | | | | | | | | | | | MAKEALL is fine for ppc4xx and mpc85xx. Run checks were done on our controlcenterd hardware. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | Add Atmel I2C tpmDirk Eibach2013-07-16-0/+125
| | | | | | | | | | | | | | | | | | Add support for Atmel TPM devices with two wire interface. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | i2c: fsl_i2c: i2c_read(): dont try to write address w/ alen=0Reinhard Pfau2013-07-16-3/+6
| | | | | | | | | | | | | | | | | | if alen is 0: no longer start a write cycle before reading data. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | tpm: add AUTH1 cmds for LoadKey2 and GetPubKeyReinhard Pfau2013-07-16-1/+638
|/ | | | | | | | | | | | | | | | | | | | | | Extend the tpm library with support for single authorized (AUTH1) commands as specified in the TCG Main Specification 1.2. (The internally used helper functions are implemented in a way that they could also be used for double authorized commands if someone needs it.) Provide enums with the return codes from the TCG Main specification. For now only a single OIAP session is supported. OIAP authorized version of the commands TPM_LoadKey2 and TPM_GetPubKey are provided. Both features are available using the 'tpm' command, too. Authorized commands are enabled with CONFIG_TPM_AUTH_SESSIONS. (Note that this also requires CONFIG_SHA1 to be enabled.) Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
* arm:samsung:trats:fix: Restore proper orientation of TRATS's LCD panelŁukasz Majewski2013-07-16-9/+1
| | | | | | | | | | | | | | | | | | | | | | | Before setting: mipi_lcd_device.reverse_panel = 1, the Trats's LCD panel was flipped by 180 degrees. The flip was caused by following change: Exynos: Change get_timer() to work correctly SHA1: 3d00c0cb96ff93a929700b80d89cb905e5ab5315 This commit fixed udelay(), which is necessary (due to HW LCD controller oddity) for mipi-dsi correct operation. As a result the display orientation has been switched. As a follow up, the hwrevision() function has been removed, since it was used only in this particular place. Test HW: Trats Exynos4210 rev 0. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* arm:exynos:fix: Fix clock calculation for Exynos4210 based targets.Łukasz Majewski2013-07-16-5/+4
| | | | | | | | | | | Provide proper setting for the APLL fout frequency calculation for Exynos4 based targets (especially Exynos4210 - Trats board). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* PPC MPC83xx: Fix MPC8323ERDB build warningWolfgang Denk2013-07-15-1/+5
| | | | | | | | | | | | Fix: mpc8323erdb.c: In function 'mac_read_from_eeprom': mpc8323erdb.c:198:3: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] Signed-off-by: Wolfgang Denk <wd@denx.de> cc: Timur Tabi <timur@tabi.org> cc: Kim Phillips <kim.phillips@freescale.com>
* Fix ext2/ext4 filesystem accesses beyond 2TiBFrederic Leroy2013-07-15-70/+93
| | | | | | | | | | | | | | | | | With CONFIG_SYS_64BIT_LBA, lbaint_t gets defined as a 64-bit type, which is required to represent block numbers for storage devices that exceed 2TiB (the block size usually is 512B), e.g. recent hard drives We now use lbaint_t for partition offset to reflect the lbaint_t change, and access partitions beyond or crossing the 2.1TiB limit. This required changes to signature of ext4fs_devread(), and type of all variables relatives to block sector. ext2/ext4 fs uses logical block represented by a 32 bit value. Logical block is a multiple of device block sector. To avoid overflow problem when calling ext4fs_devread(), we need to cast the sector parameter. Signed-off-by: Frédéric Leroy <fredo@starox.org>
* common: remove unaligned access error in bootmenu_getoption()Lan Yixun (dlan)2013-07-15-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Some ARM compilers may emit code that makes unaligned accesses when faced with constructs such as: char name[12] = "bootmenu_"; same fix as commit: 064d55f8bc8d7d205ed0be6abb6717e92eeb7cad ========================================================= data abort MAYBE you should read doc/README.arm-unaligned-accesses pc : [<3ff4b60c>] lr : [<3ff4b7b0>] sp : 3f346a58 ip : 3ff9c8e6 fp : 02000060 r10: 00000000 r9 : 3df47fc0 r8 : 3f347f40 r7 : 00000000 r6 : 00000000 r5 : 00000003 r4 : 3f759140 r3 : 000003f0 r2 : 00000000 r1 : 000003f1 r0 : 00000000 Flags: nzCv IRQs on FIQs off Mode SVC_32 Resetting CPU ... ====================================================== Signed-off-by: Lan Yixun (dlan) <dennis.yxun@gmail.com>
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