summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* ENGR00325255 pcie:enable pcie support on imx6sx sdRichard Zhu2014-07-31-14/+190
| | | | | | | | | | | | | | Enable pcie support in uboot on imx6sx sd boards - enable_pcie_clock should be call before ssp_en is set, since that ssp_en control the phy_ref clk gate, turn on it after the source of the pcie clks are stable. - add debug info - add rx_eq of gpr12 on imx6sx - there are random link down issue on imx6sx. It's pcie ep reset issue. solution:reset ep, then retry link can fix it. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00324352 Set console value to show log info for mfgtool nand downloadAllen Xu2014-07-24-0/+1
| | | | | | set console value to show download log info for mfgtool NAND download. Signed-off-by: Allen Xu <b45815@freescale.com>
* ENGR00323465: iMX6SX ARM2: modified NAND boot rootfs mtd partition numAllen Xu2014-07-14-1/+1
| | | | | | | | Since QSPI will be disabled for NAND module(pin conflict), the mtd partition number will be count from 0, the last partition for rootfs need to be changed from 4 to 3. Signed-off-by: Allen Xu <b45815@freescale.com>
* ENGR00323143 pcie:can't be enabled in both uboot and kernelRichard Zhu2014-07-17-1/+12
| | | | | | | | | | | | | | imx6 q/dl/solo pcie would be failed to work properly in kernel, if the pcie module is iniialized/enumerated both in uboot and linux kernel. rootcause:imx6 q/dl/solo pcie don't have the reset mechanism. it is only be RESET by the POR. So, the pcie module only be initialized/enumerated once in one POR. Set to use pcie in kernel defaultly, mask the pcie config here. Remove the mask freely, if the uboot pcie functions, rather than the kernel's, are required. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00322796 iMX6SXSABRESD: Enable Micron N25Q128 flash support for RevB boardYe.Li2014-07-17-0/+1
| | | | | | | | | The iMX6SX SABRESD RevB board uses Micron N25Q128 to replace Spansion S25FL128 on RevA board. So enable the CONFIG_SPI_FLASH_STMICRO and CONFIG_SPI_FLASH_SPANSION to support both two revisions. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00322860 iMX6SX: Add function to check M4 status before bootingYe.Li2014-07-17-1/+31
| | | | | | | Add new function "arch_auxiliary_core_check_up" to check whether M4 is already up. Therefore, avoid starting M4 again when it is running. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00321435-2 video: mxc gis: do not disable mxsfbLiu Ying2014-07-17-2/+0
| | | | | | | The mxc gis driver should not disable mxsfb, instead, mxsfb could be disabled in machine layer. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00321435-1 imx-common: cpu: Disable mxsfb when necessaryLiu Ying2014-07-17-0/+4
| | | | | | | | The kernel may break the display pipeline at boot stage and introduce various display artifacts, so let's disable mxsfb in uboot when necessary. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* MX6: Correct calculation of PLL_SYSAndre Renaud2014-07-15-1/+1
| | | | | | | | DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do the shift after the multiply to avoid rounding errors Signed-off-by: Andre Renaud <andre@bluewatersys.com> (cherry picked from commit 2eb268f6fd236a5ad9d51e7e47190d7994b3920f)
* mx6: soc: Update the comments of set_ldo_voltage()Fabio Estevam2014-07-15-3/+2
| | | | | | | | | | | | | | | Commit 3d622b78 (mx6: soc: Introduce set_ldo_voltage()) introduces set_ldo_voltage() function that can be used to set the voltages of any of the three LDO regulators controlled by the PMU_REG_CORE register. Prior to this commit there was a single set_vddsoc() which only configured the VDDSOC regulator. Update the comments to align with the new set_ldo_voltage() implementation. Acked-by: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> (cherry picked from commit 157f45da91b306d71dbf3a51325352dc11bf16d1)
* ENGR00321146 gis: faster auto standards detectionSandor Yu2014-07-11-1/+1
| | | | | | | | | | | | | | | | | Vadc need long time to auto standards detection, the default standard is NTSC, if vadc connect to PAL camera and no enough time to detect the video mode, driver will get wrong standard. Confirmation from chip design architecture that auto detect function is not required by rear-view camera application. Setting register vdec_stddbg standard_filte bits to 0 makes the standard detection faster, the issue duplicate decrease to 1%. Signed-off-by: Sandor Yu <R01008@freescale.com> (cherry picked from commit 06735bf6724f2dad2dcbbfc188c6a17145c7126b)
* ENGR00321577 iMX6:Android: Fixed memory overrun issue in do_bootiYe.Li2014-07-09-2/+2
| | | | | | | | | When booting from NAND, the memory copy to boothdr uses the size of fastboot_boot_img_hdr structure which is actually larger than boothdr size. This causes the u-boot heap corruption and failed to allocate memory any more. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00321137 mx6sx: arm2: Expand malloc pool to 32MSandor Yu2014-07-08-1/+1
| | | | | | | | | | | | GIS module need about 3M+3M+1.5M+1.5M=9M memory. When gis module enabled, malloc may failed to allocate memory for other modules, that may cause system hang. Expand malloc pool to 32M, system hang issue can not duplicate on mx6sx arm2 board. pass one night reset stress test. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00321299 gis: clean csi0 input mux set bit in GPRSandor Yu2014-07-07-0/+6
| | | | | | | | When gis enable in uboot, the CSI0 input mux select setting to vadc module, clean the bit when gis disabled. Signed-off-by: Sandor Yu <R01008@freescale.com> (cherry picked from commit ae66b17b7da3be50dc81ca636b67e8e879f52e26)
* ENGR00321260-2 iMX6:Android: Append the "androidboot.serialno" to bootargsYe.Li2014-07-04-0/+24
| | | | | | | | | | | | | Android supports to two ways to pass serialno: 1. ATAG_SERIAL 2. "androidboot.serialno=" argument in boot commandline. Since we support the DTB for android, so the ATAGS can't work. We have to choose the second way. This patch only applys the bootargs in bootimg, while the bootargs saved in u-boot env variables won't have this argument appended. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00321260-1 iMX6: Add support to get CPU serial numberYe.Li2014-07-04-0/+13
| | | | | | | | The android boot needs get_board_serial function to get the CPU uid as the serial number. Implement this function to read the uid from fuse for all iMX6 platforms. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00321085 iMX6SX:SABRESD: Enable the eMMC boot specific commandsYe.Li2014-07-04-0/+1
| | | | | | | | | The v2014 u-boot provides some “mmc” sub-commands for setting eMMC boot parameters, such as boot bus, partition, etc. These sub-commands are controlled by "CONFIG_SUPPORT_EMMC_BOOT". Enable this configuration for iMX6SXSABRESD board. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00321077 iMX6: Enable the mtest command for DDR testYe.Li2014-07-03-0/+5
| | | | | | | The mtest is no longer default in v2014. To test the DDR, enable this command for each iMX6 board. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00320609 Use FUNC2 as Volume down key in bootloader recovery mode detectionguoyin.chen2014-07-01-2/+2
| | | | | | | | Align the keymap with Android rootfs as: FUNC1 -- > Volume + FUNC2 -- > Volume - Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
* ENGR00320125 iMX6: Change to use dynamical mmcrootYe.Li2014-06-30-48/+272
| | | | | | | | | | | | | | | | | | | | | | | | | The kernel changes to fix the mmcblk index with USDHC controllers as below: mmcblk0 ---> USDHC1 mmcblk1 ---> USDHC2 mmcblk2 ---> USDHC3 mmcblk3 ---> USDHC4 So in u-boot, the "mmcroot" must be updated together. When booting from SD/MMC device, change the "mmcroot" to dynamically set according to the boot USDHC controller. It is the same mechanism as "mmcdev" used for kernel image loading. Therefore, the uboot, kernel image, dtb and rootfs are required in same SD/MMC card. To disable the mmc dynamical detection, set the "mmcautodetect" to "no", then "mmcroot" and "mmcdev" will not be overwritten. When booting from other devices which needs to load kernel, dtb and rootfs from SD/MMC card, their "mmcdev" reset vaule is CONFIG_SYS_MMC_ENV_DEV and "mmcroot" reset value is CONFIG_MMCROOT. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00320350 iMX6SLEVK: Fix build warning of PCIE Phy power downYe.Li2014-06-30-0/+2
| | | | | | | | | | | | Since the iMX6SL does not have PCIE module, should not define the function "imx_set_pcie_phy_power_down" for it. Otherwise, get the build warning below: arch/arm/cpu/armv7/mx6/soc.c:446:13: warning: 'imx_set_pcie_phy_power_down' defined but not used [-Wunused-function] static void imx_set_pcie_phy_power_down(void) Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00320057 iMX6SX:SABRESD/19x19ARM2: Update DDR3 scriptsYe.Li2014-06-28-70/+136
| | | | | | | | Update latest DDR3 scirpts for imx6sx SabreSD and 19x19 DDR3 ARM2 board as provided by board team. (http://sw-git.freescale.net/cgi-bin/gitweb.cgi?p=ddr-scripts-rel.git) Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00319772 iMX6SX:ARM2: Add EIM-NOR support for 17x17 ARM2 boardYe.Li2014-06-25-0/+79
| | | | | | | | | | | | | | The NOR flash PC28F00AG18 has 512 of 256KB erase blocks which are locked after power on reset. Change the 17x17 ARM2 configurations to match the flash parameters, and enable the CONFIG_SYS_FLASH_PROTECTION to allow write to the flash. The EIM-NOR on 17x17 ARM2 board uses MUXed mode. This has less effort on board rework. When boot from EIM-NOR, set SW8, SW7, SW5 to all off. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00319965 pcie: mask the imx6sl outRichard Zhu2014-06-25-2/+7
| | | | | | | imx6sl doesn't have the pcie module, mask the pcie related codes from imx6sl. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00319415 pcie: random link down issue after warm-rstRichard Zhu2014-06-24-0/+18
| | | | | | | | | | | | | | | | | There are about 0.02% percentage on some imx6q/dl/solo hw boards, random pcie link down when warm-reset is used. Make sure to clear the ref_ssp_en bit16 of gpr1 before warm-rst, and set ref_ssp_en after the pcie clks are stable to workaround it. rootcause: * gpr regisers wouldn't be reset by warm-rst, while the ref_ssp_en is required to be reset by pcie. (work-around in u-boot) * ref_ssp_en should be set after pcie clks are stable. (work-around in kernel) Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00319241: imx6: pfuze: set pmic mode to decrease power number in DSM modeRobin Gong2014-06-20-0/+213
| | | | | | | Currently, kernel common regulator framework can't support setting pmic mode by common DTS, so move the related code to u-boot firstly. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00319151-2 HAB: Add the HAB image authentication to bootzYe.Li2014-06-20-0/+9
| | | | | | | Since the zImage is used at default, add the HAB image authentication support in bootz to authenticate zImage. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00319151-1 iMX6SX: Change default boot to use bootz and zImageYe.Li2014-06-20-57/+57
| | | | | | | Modified the default boot commands of all iMX6SX boards to use bootz and zImage. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00319003 iMX6SX:HAB: Fixed build break when enabling secure bootYe.Li2014-06-18-6/+6
| | | | | | | | | | | | | | | When enabling "CONFIG_SECURE_BOOT", the build broken on iMX6SX platform due to two problems. 1. The imximage tool in v2014 changes the command name of "SECURE_BOOT" to "CSF". Must update it in imximage.cfg scripts. 2. The iMX6SX uses "CONFIG_ROM_UNIFIED_SECTIONS", but some HAB API definitions are not defined and cause compile errors. (HAB_RVT_REPORT_EVENT_NEW, HAB_RVT_REPORT_STATUS_NEW, HAB_RVT_AUTHENTICATE_IMAGE_NEW, HAB_RVT_ENTRY_NEW, HAB_RVT_EXIT_NEW) Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-82 mx6sx arm2: Enable gis functionYe.Li2014-06-17-1/+7
| | | | | | | | Enable gis function for mx6sx 19x19 arm2 board Expand malloc buf pool to 16M. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-81 gis: Add gis moduleYe.Li2014-06-17-0/+641
| | | | | | | | Add gis module, current gis is support vadc input. Add power down function to lcdif driver. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-80 pxp: Add pxp moduleYe.Li2014-06-17-0/+324
| | | | | | | | Add pxp module. Support csc between YUV444 and RGB888 and scaling. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-79 csi: Add csi moduleYe.Li2014-06-17-0/+425
| | | | | | | Add csi module. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-78 vadc: Add vadc moduleYe.Li2014-06-17-0/+602
| | | | | | | | Add vadc module. Both PAL and NTSC mode can work. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-77 mx6 soc: Add vadc power up/down functionYe.Li2014-06-17-0/+58
| | | | | | | Add vadc power up/down function. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-76 mx6 clock: Add vadc clock enable functionYe.Li2014-06-17-0/+10
| | | | | | | Add vadc clock enable function. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-75 iMX6SX:SABRESD Support the reworked eMMC on SD4Ye.Li2014-06-17-0/+29
| | | | | | | | | | | | | | The eMMC chip on iMX6SX SABRESD board is DNP at default. HW rework is needed to weld it on the eMMC socket and disconnect SD card slot. The pins IOMUX of eMMC are different with SD card slot: 1. The eMMC uses 8 data pins, while SD card slot only uses 4 bits. 2. The CD pin used by SD card slot works as a data pin for eMMC. So adding a new u-boot target "mx6sxsabresd_emmc" for the eMMC support, rather than using the SD boot configuration. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-74 pfuze200: add clear print for pfuze200Ye.Li2014-06-17-3/+6
| | | | | | | | add clear print log to show pfuze200 or pfuze100 found on mx6qsabresd/ mx6slevk/mx6sx_19x19_arm2 boards. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-73 iMX6SX:SABRESD/ARM2 Add "bmode" command supportYe.Li2014-06-17-0/+51
| | | | | | | | | | | | | Enable the "CONFIG_CMD_BMODE" and add BSP support. "bmode" supports to reboot: SD4, QSPI2 (SABRESD) SD2, SD3, eMMC, QSPI2, NAND, SPINOR (17x17 ARM2) SD1, QSPI2, SPINOR, EIMNOR (19x19 ARM2) BTW: Board rework is needed on ARM2 for NAND, SPINOR or EIMNOR boot. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-72 iMX6SX:SABRESD/19x19ARM2 Add splash screen support in BSPYe.Li2014-06-17-4/+374
| | | | | | | | | | | | Enable the video drivers and MXS LCDIF driver to support the splash screen on MX6SX SDB and 19x19 ARM2. Add BSP codes for video parameters and LCDIF/LVDS initialization. "panel" env is used for selecting the display panel. Set "panel" env to "Hannstar-XGA" for LVDS display. Set "panel" env to "MCIMX28LCD" for parallel LCD display. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-71 iMX6SX Update registers and clock for displayYe.Li2014-06-17-1/+445
| | | | | | Add registers and clock functions to enable/set LCDIF clock and LVDS. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-70 iMX6SX:Video Update MXS LCDIF driverYe.Li2014-06-17-13/+67
| | | | | | | | | | | | Add a new interface "mxs_lcd_panel_setup" to setup fb parameters and specifies the LCDIF controller for multiple controllers of iMX6SX. Pass fb parameters via "videomode" env remains work if the new interface is not called before video initialization. Modify LCDIF clock interface "mxs_set_lcdclk" to support multiple LCDIF controllers on iMX6SX. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-69 iMX6:SABREAUTO Change android NAND partition layoutYe.Li2014-06-17-1/+1
| | | | | | | Update NAND memory layout for match with new mfg tool. Signed-off-by: Ke Qinghua <qinghua.ke@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-68 iMX6SX:SABRESD: Add Android features supportYe.Li2014-06-17-2/+178
| | | | | | | Add BSP codes to mx6sxsabresd to support android uboot features: fastboot, booti and recovery Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-67 iMX6SX:SABRESD Disable the RDC temporarilyYe.Li2014-06-17-1/+1
| | | | | | | Disable RDC in u-boot till kernel implements it. Otherwise, crash may happen in kernel. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-66 iMX6SX:SABRESD Support M4 fast boot at early stageYe.Li2014-06-17-2/+12
| | | | | | | | | | | | | | | | T support M4 boot in 50 ms, kick start M4 at "board_early_init_f" stage where u-boot passes ARM and architecture initialization. Add a configuration "CONFIG_SYS_AUXCORE_FASTUP" for this feature enablement. And a build config "mx6sxsabresd_m4fastup". Adjust the default M4 image address to 0x78000000 represented by "CONFIG_SYS_AUXCORE_BOOTDATA". When M4 fast boot is enabled, RDC should be enabled together and the QSPI driver must turn off, because M4 is running on QSPI flash in XIP. Setup this relationship by configurations. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-65 iMX6SX:SABRESD Add RDC settings to BSPYe.Li2014-06-17-0/+14
| | | | | | | | | | | According to the SRS, in the M4 CAN demo, the GPIO group1 will be shared between A9 and M4. At A9 side, the pins 0, 1, 2, 3 are used. M4 also uses one pin in its application. To synchronize the registers setttings of GPIO1, must enable RDC and RDC semaphore on the GPIO1. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-64 iMX6SX: Add MX6SX SABRE SD board supportYe.Li2014-06-17-0/+1244
| | | | | | | | | | | | Add BSP codes for iMX6SX SABRE SD board to support SD/MMC, USB, QSPI2 NOR Flash, Ethernet, I2C, PMIC and M4 command boot(bootaux). Add board build targets of SABER SD for boot device: mx6sxsabresd --- SD/MMC mx6sxsabresd_qspi2 --- QuadSPI2 NOR flash Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-63 iMX6SX: Add MX6SX 19x19 LPDDR2 ARM2 board supportYe.Li2014-06-17-0/+283
| | | | | | | | Add script "imximage_lpddr2.cfg" for DDR controller settings of LPDDR2. Modify "plugin.S" for LPDDR2. Add build target for 19x19 LPDDR2 ARM2 board. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-62 iMX6SX: Add MX6SX 19x19 DDR3 ARM2 board supportYe.Li2014-06-17-0/+950
| | | | | | | | | | | | | | | | | | | Add BSP codes for iMX6SX 19x19 DDR3 ARM2 board to support SD/MMC, USB, QSPI2 NOR Flash, SPI NOR flash, WEIM NOR Flash, Ethernet, I2C, PMIC and M4 command boot(bootaux). Some features has conflicts, so can't be enabled at same time: WEIM-NOR <---> QSPI pin conflict QSPI <---> SPI-NOR u-boot driver conflict SPI-NOR <---> SD2 pin conflict Add board build targets of 19x19 DDR3 ARM2 for boot device: mx6sx_19x19_ddr3_arm2 --- SD/MMC/eMMC mx6sx_19x19_ddr3_arm2_spinor --- SPINOR on ECSPI4 CS0 mx6sx_19x19_ddr3_arm2_eimnor --- WEIM NOR flash mx6sx_19x19_ddr3_arm2_qspi2 --- QuadSPI2 NOR flash Signed-off-by: Ye.Li <B37916@freescale.com>
generated by cgit v1.1 at 2024-08-23 10:48:45 +0000