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* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-12-06-261/+1745
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| * AM3517 EVM: Enable ethernetTom Rini2013-12-06-2/+12
| | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * omap4_panda: Don't use ulpi_resetRoger Quadros2013-12-06-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Fixes this error message when USB is started. "ULPI: ulpi_reset: failed writing reset bit" It is pointless to manually reset the ULPI as the USB Host Reset and PHY RESET line should take care of that. Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * omap3_beagle: Don't use ulpi_resetRoger Quadros2013-12-06-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Fixes this error message when USB is started. "ULPI: ulpi_reset: failed writing reset bit" It is pointless to manually reset the ULPI as the USB Host Reset and PHY RESET line should take care of that. Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * usb: ehci-omap: Reset the USB Host OMAP moduleRoger Quadros2013-12-06-15/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit bb1f327 we removed the UHH reset to fix NFS root (over usb ethernet) problems with Beagleboard (3530 ES1.0). However, this seems to cause USB detection problems for Pandaboard, about (3/8). On further investigation, it seems that doing the UHH reset is not the cause of the original Beagleboard problem, but in the way the reset was done. This patch adds proper UHH RESET mechanism for OMAP3 and OMAP4/5 based on the UHH_REVISION register. This should fix the Beagleboard NFS problem as well as the Pandaboard USB detection problem. Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> CC: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * arm: omap3: Enable clocks for peripherals only if they are usedMichael Trimarchi2013-12-06-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch change the per_clocks_enable() function used in OMAP3 code to enable peripherals clocks. Only required clock should be activated. So if the board use the uart(x) as a console we need to activate it. The Board's config should include define to enable every subsystem that the board use. For a complete list of affected peripherals, registers CM_FCLKEN_PER and CM_ICLKEN_PER should be checked. Right now the bootloader can enable and disable clocks for: uart(x) using CONFIG_SYS_NS16550 gpio bank (x) using CONFIG_OMAP3_GPIO_X with X = { 2, 3, 4, 5, 6 } i2c bus using CONFIG_DRIVER_OMAP34XX_I2C. Not required gptimer(x) and mcbsp(x) for booting are disabled by default and are not supported by any define. Their activation need to included in the per_clocks_enable if the peripheral is included. Not booting board should enable the peripheral clock connected to their driver Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * am335x: cpsw: optimize cpsw_recv to increase network performanceVladimir Koutny2013-12-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | In 48ec5291, only TX path was optimized; this does the same also for RX path. This results in huge increase of TFTP throughput on custom am3352 board (from 312KiB/s to 1.8MiB/s) and eliminates occasional transfer timeouts. Signed-off-by: Vladimir Koutny <vladimir.koutny@streamunlimited.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com>
| * pandaboard: 1/1] ARM:OMAP4+: panda-es: Support Rev B3 Elpida DDR2 RAMHardik Patel2013-12-04-2/+66
| | | | | | | | Signed-off-by: Hardik Patel <hardik.patel@volansystech.com>
| * davinci: fix Master Priority Registers locationViktar Palstsiuk2013-12-04-1/+2
| | | | | | | | | | | | | | MSTPRI0 (Master Priority 0 Register) sits at 0x01C14110 not at 0x01C14114 Signed-off-by: Viktar Palstsiuk <viktar.palstsiuk@promwad.com>
| * arm: am335x: Add DT (FDT) support to Siemens boardsStefan Roese2013-12-04-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Enable FDT support for all Siemens AM335x boards. To support newer Linux kernels with DT booting. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Roger Meier <r.meier@siemens.com> Cc: Lukas Stockmann <lukas.stockmann@siemens.com> Cc: Tom Rini <trini@ti.com> Acked-by: Heiko Schocher<hs@denx.de>
| * am335x_evm: Update nandboot to use partitions and DTTom Rini2013-12-04-5/+4
| | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * arm: omap3: Add uart4 omap3 adddressMichael Trimarchi2013-12-04-0/+1
| | | | | | | | | | | | This patch add the OMAP34XX_UART4 memory address Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
| * ARM: OMAP5+: Remove unnecessary EFUSE settingsLokesh Vutla2013-12-04-6/+0
| | | | | | | | | | | | | | | | | | Certain EFUSE settings were recommended for the first four lots of OMAP5 ES1.0 silicon. These are not applicable for OMAP5 ES2.0 and DRA7 silicon. So removing these EFUSE settings. Reported-by: Griffis, Brad <bgriffis@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: dra7_evm: Add SATA supportRoger Quadros2013-12-04-0/+18
| | | | | | | | | | | | | | The evm has a SATA port. Enable SATA configuration and inititialize the SATA controller. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * ARM: DRA7xx: Add PRCM and Control information for SATARoger Quadros2013-12-04-0/+3
| | | | | | | | | | | | | | Adds the necessary PRCM and Control register information for SATA on DRA7xx. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * ARM: omap5_uevm: Add SATA supportRoger Quadros2013-12-04-0/+17
| | | | | | | | | | | | The uevm has a SATA port. Inititialize the SATA controller. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * ARM: OMAP5: Add SATA platform glueRoger Quadros2013-12-04-0/+124
| | | | | | | | | | | | Add platform glue logic for the SATA controller. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * ARM: OMAP5: Add PRCM and Control information for SATARoger Quadros2013-12-04-0/+12
| | | | | | | | | | | | | | Adds the necessary PRCM and Control register information for SATA on OMAP5. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * ARM: OMAP5: Add Pipe3 PHY driverRoger Quadros2013-12-04-0/+271
| | | | | | | | | | | | | | Pipe3 PHY is used by SATA, USB3 and PCIe modules. This is a driver for the Pipe3 PHY. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * ahci: Fix cache align error messagesRoger Quadros2013-12-04-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | Align the ATA ID buffer to the cache-line boundary. This gets rid of the below error mesages on ARM v7 platforms. scanning bus for devices... ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618 ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818 CC: Aneesh V <aneesh@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * ahci: Error out with message on malloc() failureRoger Quadros2013-12-04-2/+14
| | | | | | | | | | | | | | | | | | If malloc() fails, we don't want to continue in ahci_init() and ahci_init_one(). Also print a more informative error message on malloc() failures. CC: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * ARM: DRA7/OMAP5: EMIF: Add workaround for bug 0039SRICHARAN R2013-12-04-1/+124
| | | | | | | | | | | | | | | | | | | | | | When core power domain hits oswr, then DDR3 memories does not come back while resuming. This is because when EMIF registers are lost, then the controller takes care of copying the values from the shadow registers. If the shadow registers are not updated with the right values, then this results in incorrect settings while resuming. So updating the shadow registers with the corresponding status registers here during the boot. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * ARM: DRA: EMIF: Change DDR3 settings to use hw levelingSRICHARAN R2013-12-04-98/+174
| | | | | | | | | | | | | | | | | | | | Currently the DDR3 memory on DRA7 ES1.0 evm board is enabled using software leveling. This was done since hardware leveling was not working. Now that the right sequence to do hw leveling is identified, use it. This is required for EMIF clockdomain to idle and come back during lowpower usecases. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * ARM: DRA7: Add is_dra7xx cpu check definitionSRICHARAN R2013-12-04-0/+8
| | | | | | | | | | | | | | | | A generic is_dra7xx cpu check is useful for grouping all the revisions under that. This is used in the subsequent patches. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * am33xx: Stop modifying certain EMIF4D registersTom Rini2013-12-04-101/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on the definitive guide to EMIF configuration[1] certain registers that we have been modifying (and are documented registers) should be left in their reset values rather than modified. This has been tested on AM335x GP EVM and Beaglebone White. [1]: http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Heiko Schocher <hs@denx.de> Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Matt Porter <matt.porter@linaro.org>
| * ARMV7: OMAP4: Add twl6032 supportOleg Kosheliev2013-12-04-6/+68
| | | | | | | | | | | | | | | | | | | | Added chip type detection and twl6032 support in the battery control and charge functions. Based on Balaji T K <balajitk@ti.com> patches for TI u-boot. Signed-off-by: Oleg Kosheliev <oleg.kosheliev@ti.com>
| * ARMV7: OMAP4: Add struct for twl603x dataOleg Kosheliev2013-12-04-5/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | The data struct is used to support different PMIC chip types. It contains the chip type and the data (e.g. registers addresses, adc multiplier) which is different for twl6030 and twl6032. Replaced some hardcoded values with the structure vars. Based on Balaji T K <balajitk@ti.com> patches for TI u-boot. Signed-off-by: Oleg Kosheliev <oleg.kosheliev@ti.com>
| * ARM: OMAP4: Fix bug in omap4470_volts structLubomir Popov2013-12-04-4/+8
| | | | | | | | | | | | | | | | | | | | The struct incorrectly referenced SMPS1 for all three power domains. Fixed this by using SMPS2 and SMPS5 as appropriate. Add some comments and choose voltage values that correspond to voltage selection codes. Signed-off-by: Lubomir Popov <l-popov@ti.com>
| * pcm051: Support for revision 3Lars Poeschel2013-12-04-7/+49
| | | | | | | | | | | | | | | | | | | | | | | | Phytec sells revision or version 3 of pcm051. It is labeled 1358.3 on the board. The difference for u-boot is that is has other DDR3 RAM on it: 1 x MT41K256M16HA125E instead of 2 x MT41J256M8HX15E on revisions 1 and 2. Both configurations are 512 MiB. Configure your u-boot build with pcm051_rev3 for the new RAM and pcm051_rev1 for the old RAM configuration. Board revision 2 has to use pcm051_rev1 also. Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
| * cm_t335: add support for pca9555 i2c gpio extenderIlya Ledvich2013-12-04-0/+12
| | | | | | | | | | | | | | | | Add support for the 16 bits pca9555 i2c to gpio extender featured by the SB-T335 baseboard. Signed-off-by: Ilya Ledvich <ilya@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * cm_t335: add support for status LEDIlya Ledvich2013-12-04-0/+19
| | | | | | | | | | | | | | | | Add support for status LED. Use the STATUS_LED APIs for indicating a boot progress. Signed-off-by: Ilya Ledvich <ilya@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * cm_t335: add cm_t335 board supportIlya Ledvich2013-12-04-0/+658
| | | | | | | | | | | | | | | | | | Add cm_t335 board directory, config file. Enable build. Signed-off-by: Ilya Ledvich <ilya@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> [trini: Adapt Makefile] Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'Albert ARIBAUD2013-12-06-17/+7512
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| * arm: rmobile: Remove config.mkNobuhiro Iwamatsu2013-12-03-9/+0
| | | | | | | | | | | | | | | | Renesas ARM SoCs (R-Mobile, R-Car) are armv7 only. This drops armv5 supprt from PLATFORM_CPPFLAGS and remove config.mk of rmobile. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * arm: kzm9g: Fix undefined reference to `__aeabi_uldivmod' errorNobuhiro Iwamatsu2013-12-03-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kzm9g board fails in building with -march=armv7-a. This fixs this problem by converting to do_div(). ----- USE_PRIVATE_LIBGCC=yes ./MAKEALL kzm9g ... arch/arm/cpu/armv7/rmobile/librmobile.o: In function `get_time_us': arch/arm/cpu/armv7/rmobile/timer.c:41: undefined reference to `__aeabi_uldivmod' arch/arm/cpu/armv7/rmobile/librmobile.o: In function `get_time_ms': arch/arm/cpu/armv7/rmobile/timer.c:47: undefined reference to `__aeabi_uldivmod' ----- Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
| * arm: rmobile: Add support koelsch boardNobuhiro Iwamatsu2013-12-03-3/+1728
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The koelsch board has R8A7791, 2GB DDR3-SDRAM, USB, Quad SPI, Ethernet, and more. This patch supports the following functions: - DDR3-SDRAM - SCIF Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
| * arm: rmobile: Add support R8A7791Nobuhiro Iwamatsu2013-12-03-0/+2193
| | | | | | | | | | | | | | | | | | | | | | Renesas R8A7791 is CPU with Cortex-A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
| * arm: rmobile: Add support lager boardNobuhiro Iwamatsu2013-12-03-0/+1570
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lager board has R8A7790, 4GB DDR3-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - DDR3-SDRAM - SCIF Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
| * arm: rmobile: Add support R8A7790Nobuhiro Iwamatsu2013-12-03-0/+2015
| | | | | | | | | | | | | | | | | | | | | | | | | | Renesas R8A7790 is CPU with Cortex-A7 and A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
| * arm: rmobile: Move lowlevel_init.o to taget of each CPUNobuhiro Iwamatsu2013-12-03-6/+3
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | socfpga: Adding Freeze Controller driverChin Liang See2013-12-03-1/+275
|/ | | | | | | | | | | | | | Adding Freeze Controller driver. All HPS IOs need to be in freeze state during pin mux or IO buffer configuration. It is to avoid any glitch which might happen during the configuration from propagating to external devices. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-12-02-458/+655
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| * arm: atmel: eb_cpux9k2: config clean upJens Scharsig (BuS Elektronik)2013-12-01-4/+0
| | | | | | | | | | | | | | * remove mature defines from board config Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: atmel: sam9m10g45ek: let CONFIG_SYS_NO_FLASH at proper positionBo Shen2013-12-01-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | In config_cmd_default.h, it will use CONFIG_SYS_NO_FLASH to decide whether include CONFIG_CMD_FLASH and CONFIG_CMD_IMLS. So, if the CONFIG_SYS_NO_FLASH defined later than include/config_cmd_default.h, These two commands will be included always. So move CONFIG_SYS_NO_FLASH definition to proper position. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm926ejs, at91: add common phy_reset functionHeiko Schocher2013-12-01-167/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add common phy reset code into a common function. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Jens Scharsig <esw@bus-elektronik.de> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Stelian Pop <stelian@popies.net> Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com> Cc: Eric Benard <eric@eukrea.com> Cc: Markus Hubig <mhubig@imko.de> Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Tested-by: Bo Shen <voice.shen@atmel.com> Acked-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: atmel: sama5d3: spl boot from fat fs SD cardBo Shen2013-12-01-2/+285
| | | | | | | | | | | | | | | | Enable Atmel sama5d3xek boart spl boot support, which can load u-boot from SD card with FAT file system. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: atmel: add ddr2 initialization functionBo Shen2013-12-01-0/+251
| | | | | | | | | | | | | | | | The MPDDRC supports different type of SDRAM This patch add ddr2 initialization function Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: atmel: sama5d3: early enable PIO peripheralsBo Shen2013-12-01-0/+6
| | | | | | | | | | | | | | Enable the PIO peripherals early than other peripherals. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: atmel: sama5d3: the offset of MULA is 18Bo Shen2013-12-01-0/+4
| | | | | | | | | | | | | | | | The offset of MULA field in PLLA register in sama5d3 is 18, and the length only 7 bits. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: atmel: sama5d3: correct the error define of DIVBo Shen2013-12-01-2/+2
| | | | | | | | | | | | | | Correct the error define of DIV. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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