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* MX5: vision2: use new pmic driverStefano Babic2011-10-27-15/+23
| | | | | | Switch to new pmic generic driver. Signed-off-by: Stefano Babic <sbabic@denx.de>
* misc: pmic: Freescale PMIC switches to generic PMIC driverStefano Babic2011-10-27-4/+59
| | | | | | Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Stefano Babic <sbabic@denx.de>
* misc:pmic:samsung Enable PMIC driver at GONI targetŁukasz Majewski2011-10-27-0/+8
| | | | | | | | Enable support for new PMIC driver at GONI reference target. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Stefano Babic <sbabic@denx.de>
* misc:pmic:max8998 MAX8998 support at a new PMIC driver.Łukasz Majewski2011-10-27-0/+128
| | | | | | | | This commit adds support for MAX8998 PMIC driver. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Stefano Babic <sbabic@denx.de>
* misc:pmic:core New generic PMIC driverŁukasz Majewski2011-10-27-0/+422
| | | | | | | | | | | | | | I2C or SPI PMIC devices can be accessed. Separate files: pmic_i2c.c and pmic_spi.c are responsible for handling transmission over I2C or SPI bus. New flags: CONFIG_PMIC - enable PMIC general device. CONFIG_PMIC_I2C/SPI - specify the interface to be used. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Stefano Babic <sbabic@denx.de>
* mx31pdk: Remove unneeded configFabio Estevam2011-10-27-2/+1
| | | | | | | | | | | | | | | | | | | | | Currently there are two config options for building a U-boot binary for MX31PDK: make mx31pdk_config or, make mx31pdk_nand_config mx31pdk_config was developed first when no NAND SPL support was available for MX31 and it requires that the U-boot binary is loaded into RAM via JTAG and it forces SKIP_LOWLEVEL_INIT. mx31pdk_nand_config was added later and it allows booting from NAND Flash. Leave just one config option called mx31pdk so that it produces a binary that can boot from NAND Flash. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx31: provide readable WEIM CS accessorHelmut Raiger2011-10-27-77/+187
| | | | | | | | | | | | setup_weimcs() and some macros are added to support the setup for i.MX31 WEIM chip selects. As a compromise between verbosity and readability an ASCII-art'ish bit comment is used instead of bitfields. All i.MX31 boards have been patched to use this approach using a helper program to verify the changes. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
* MX51: vision2: Set global macrosStefano Babic2011-10-27-8/+9
| | | | | | | Adapt vision2 to the current u-boot version. Drop own macros to set global data and use the common ones. Signed-off-by: Stefano Babic <sbabic@denx.de>
* I2C: Add i2c_get/set_speed() to mxc_i2c.cMarek Vasut2011-10-27-8/+23
| | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* ARM: Update mach-typesMarek Vasut2011-10-27-30689/+1985
| | | | | | | | | This commit updates the mach-types based on the latest in Linus's head Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* devkit8000: Add config to enable SPL MMC bootSimon Schwarz2011-10-27-0/+5
| | | | | | Add MMC boot configs to devkit8000 config. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
* devkit8000: protect board_mmc_initSimon Schwarz2011-10-27-1/+1
| | | | | | | This function is also defined in omap-common/spl_mmc.de so the implementation in devkit8000.c was protected by a ifdef. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
* arm, post: add missing post_time_ms for armHeiko Schocher2011-10-27-1/+1
| | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* cosmetic, post: Codingstyle cleanupHeiko Schocher2011-10-27-68/+59
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* arm, logbuffer: make it compilecleanHeiko Schocher2011-10-27-2/+1
| | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* tegra2: Enable MMC for SeaboardTom Warren2011-10-27-14/+63
| | | | | | | | This adds the required GPIO and pinmux configuration to make eMMC / SD work on Seaboard. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add more pinmux functionsSimon Glass2011-10-27-49/+707
| | | | | | | | | | | | | This adds support for changing pinmux functions of pin groups. This is done by defining a PMUX_FUNC_... enum which can be used to select the function for each group using pinmux_set_func(). It is also possible to enable pullup/pulldown, and the existing tristate functionality is retained. Also provided is a means of configuring a list of pingroups by providing a configuration table to pinmux_config_table(). Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Rename PIN_ to PINGRP_Simon Glass2011-10-27-148/+148
| | | | | | | | | | | The pin groupings are better named PINGRP, since on Tegra2 they refer to multiple pins. Sorry about this, but better to get it right now when there is only a small amount of code affected. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add more clock functionsSimon Glass2011-10-27-215/+999
| | | | | | | | | | | | | This adds most of the clock functions required by board and driver code: -query and adjust peripheral clocks -query and adjust PLLs -reset and enable control These functions are plumbed in as required. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Clean up board code a littleSimon Glass2011-10-27-48/+20
| | | | | | | | | | | | This removes clock_init() and pinmux_init() which are names better suited to those respective modules. By moving board_init_f() to the bottom of the file we can remove the need for so many functions in the board.h header file. The only clock/pinmux/gpio init we need to do prior to relocation is for the UART. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Rename CLOCK_PLL_ID to CLOCK_IDSimon Glass2011-10-27-27/+26
| | | | | | | | | | | Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the code now deals with both PLL clocks and source clocks. This also tidied up the assert() to match the one sent upstream, and fixes an error in the PWM id. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* FAT: Add FAT write featureDonggeun Kim2011-10-26-0/+1101
| | | | | | | | | | | | | | In some cases, saving data in RAM as a file with FAT format is required. This patch allows the file to be written in FAT formatted partition. The usage is similar with reading a file. First, fat_register_device function is called before file_fat_write function in order to set target partition. Then, file_fat_write function is invoked with desired file name, start ram address for writing data, and file size. Signed-off-by: Donggeun Kim <dg77.kim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* fdt: ARM: Add fdtcontroladdr to set device tree address in environmentSimon Glass2011-10-26-0/+19
| | | | | | | | | | This adds support for a new environment variable called 'fdtcontroladdr'. If defined, the hex address is used as the address of the control fdt for U-Boot. Note: I have not changed CONFIG_PRAM section as I already have an outstanding patch on that. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: ARM: Implement and verify embedded and separate device treeSimon Glass2011-10-26-0/+12
| | | | | | | | | | This locates the device tree either embedded within U-Boot or attached to the end as a separate binary. When CONFIG_OF_CONTROL is defined, U-Boot requires a valid fdt. A check is provided for this early in initialisation. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: add decode helper librarySimon Glass2011-10-26-0/+276
| | | | | | | | | | | | | | | | | | This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: Add support for a separate device tree (CONFIG_OF_SEPARATE)Simon Glass2011-10-26-2/+23
| | | | | | | | | This adds support for an FDT to be build as a separate binary file called u-boot.dtb. This can be concatenated with the U-Boot binary to provide a device tree located at run-time by U-Boot. The Makefile is modified to provide this file in u-boot-dtb.bin. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: Add support for embedded device tree (CONFIG_OF_EMBED)Simon Glass2011-10-26-2/+291
| | | | | | | | | | | | | | | | | This new option allows U-Boot to embed a binary device tree into its image to allow run-time control of peripherals. This device tree is for U-Boot's own use and is not necessarily the same one as is passed to the kernel. The device tree compiler output should be placed in the $(obj) rooted tree. Since $(OBJCOPY) insists on adding the path to the generated symbol names, to ensure consistency it should be invoked from the directory where the .dtb file is located and given the input file name without the path. This commit contains my entry for the ugliest Makefile / shell interaction competition. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: ARM: Add device tree control of U-Boot (CONFIG_OF_CONTROL)Simon Glass2011-10-26-0/+12
| | | | | | | | This adds a device tree pointer to the global data. It can be set by board code. A later commit will add support for making a device tree binary blob available to U-Boot for run-time configuration. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: tftpput: add tftpput commandSimon Glass2011-10-26-0/+23
| | | | | | This adds the tftpput command to U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: tftpput: implement tftp logicSimon Glass2011-10-26-21/+119
| | | | | | | This adds logic to tftp.c to implement the tftp 'put' command, and updates the README. Signed-off-by: Simon Glass <sjg@chromium.org>
* tftpput: add save_addr and save_size global variablesSimon Glass2011-10-26-0/+4
| | | | | | We need something akin to load_addr to handle saving data. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: tftpput: Support selecting get/put for tftpSimon Glass2011-10-26-5/+4
| | | | | | TftpStart should support starting either a get or a put. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: tftpput: Factor out start, restart and next block functionsSimon Glass2011-10-26-26/+51
| | | | | | This code is required for tftpput, so move it into separate functions. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: tftpput: move common code into separate functionsSimon Glass2011-10-26-30/+38
| | | | | | | We want to show block markers on completion of get and put, so move this common code into separate functions. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: tftpput: Rename TFTP to TFTPGETSimon Glass2011-10-26-23/+23
| | | | | | | | This is a better name for this protocol. Also remove the typedef to keep checkpatch happy, and move zeroing of NetBootFileXferSize a little earlier since TFTPPUT will need to change this. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: tftpput: Add support for receiving ICMP packetsSimon Glass2011-10-26-3/+43
| | | | | | | | | | ICMP packets can tell you when there is no server at the other end. It is useful for tftp to figure this out, so that a quick error can be displayed, rather than pointlessly retrying. This adds an ICMP packet handler to the net interface. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: tftpput: Move ICMP code into its own functionSimon Glass2011-10-26-43/+58
| | | | | | | NetReceive() is a very long function with a lot of indent. Before adding code to the ICMP bit, split it out. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add setenv_ulong() and setenv_addr()Simon Glass2011-10-26-0/+32
| | | | | | | It seems we put numbers and addresses into environment variables a lot. We should have some functions to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
* Move simple_itoa to vsprintfSimon Glass2011-10-26-15/+17
| | | | | | | This function is generally useful and shouldn't hide away in hush. It has been moved as is. Signed-off-by: Simon Glass <sjg@chromium.org>
* altera_tse: Fix return of eth_device's recv() callbackJoachim Foerster2011-10-26-0/+2
| | | | | | | It seems to be good practice to return the number of received bytes in the eth_device's recv() callback, here: tse_eth_rx(). Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* altera_tse: m88e1111s: Honor device flags regarding PHY interface modeJoachim Foerster2011-10-26-2/+8
| | | | | | | | | Note: This is kind of guess work. The current code is preserved for all RGMII related modes. It is different for flags=0 (GMII) and flags=5 (SGMII). The last case, SGMII, is successfully tested on Altera's Terasic DE4. Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* altera_tse: Add support for dedicated descriptor memoryJoachim Foerster2011-10-26-5/+27
| | | | Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* altera_tse: Fix SGDMA reset triggeringJoachim Foerster2011-10-26-4/+4
| | | | | | The SW_RESET needs to be set instead of being masked out! Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* altera_tse: Clear SGDMA's RUN bit in async transfer, like in sync caseJoachim Foerster2011-10-26-0/+6
| | | | Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* part_efi: dcache: allocate cacheline aligned buffersAnton staaf2011-10-25-9/+9
| | | | | | | | | | | | | | | Currently part_efi.c allocates buffers for the gpt_header, the legacy_mbr, and the pte (partition table entry) that may be incorrectly aligned for DMA operations. This patch uses ALLOC_CACHE_ALIGN_BUFFER for the stack allocated buffers and memalign to replace the malloc of the pte. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Mike Frysinger <vapier@gentoo.org>
* mmc: dcache: allocate cache aligned buffers for ext_csdAnton staaf2011-10-25-2/+2
| | | | | | | | | | | | | | | Currently the mmc_change_freq and mmc_startup functions allocates buffers on the stack that are passed down to the MMC device driver. These buffers could be unaligned to the L1 dcache line size. This causes problems when using DMA and with caches enabled. This patch correctly cache alignes the buffers used for reading the ext_csd data from an MMC device. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* ext2: Cache line aligned partial sector bounce bufferAnton staaf2011-10-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Currently, if a device read request is done that does not begin or end on a sector boundary a stack allocated bounce buffer is used to perform the read, and then just the part of the sector that is needed is copied into the users buffer. This stack allocation can mean that the bounce buffer will not be aligned to the dcache line size. This is a problem when caches are enabled because unaligned cache invalidates are not safe. This patch uses ALLOC_CACHE_ALIGN_BUFFER to create a stack allocated cache line size aligned bounce buffer. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Dave Liu <r63238@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Change-Id: I32e1594d90ef039137bb219b0f7ced55768744ff Acked-by: Mike Frysinger <vapier@gentoo.org>
* mmc: dcache: allocate cache aligned buffer for scr and switch_statusAnton staaf2011-10-25-5/+5
| | | | | | | | | | | | | | | | | Currently the sd_change_freq function allocates two buffers on the stack that it passes down to the MMC device driver. These buffers could be unaligned to the L1 dcache line size. This causes problems when using DMA and with caches enabled. This patch correctly cache alignes the buffers used for reading the scr register and switch status values from an MMC device. Change-Id: Ifa8414f572ef907681bd2d5ff3950285a215357d Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Mike Frysinger <vapier@gentoo.org>
* tegra: define CONFIG_SYS_CACHELINE_SIZE for tegraAnton staaf2011-10-25-0/+2
| | | | | | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Tom Warren <twarren.nvidia@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Change-Id: I5c4bcfc0bfe59158ff249fe3be6640eec6d3cc76 Acked-by: Mike Frysinger <vapier@gentoo.org>
* cache: add ALLOC_CACHE_ALIGN_BUFFER macroAnton staaf2011-10-25-0/+60
| | | | | | | | | | | | | This macro is used to allocate cache line size aligned stack buffers for use with DMA hardware. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Aneesh V <aneesh@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de>
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