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* ARM: vexpress: refactoring of Versatile Express CA9x4 supportRyan Harkin2013-05-23-7/+40
| | | | | | | | | | | | | | | The current ca9x4_ct_vxp platform contains support for a Versatile Express motherboard with a quad core A9 core tile. This patch separates the Versatile Express motherboard code and the A9 specific code, to ease supporting more core tiles in the next patches. Andre: merged the first two of Ryan's original patches and did some checkpatch fixes. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
* ARM: at91: add NAND partition table and indexBo Shen2013-05-21-1/+20
| | | | | | | | | | Add NAND partition table, EK board support boot up NAND flash using the same NAND partition table Add Index in this file Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: at91: add at91sam9x5 and sama5d3x informationBo Shen2013-05-21-0/+42
| | | | | | | | | This patch add following EK information - at91sam9n12ek, at91sam9x5ek - sama5d3xek Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: at91: fix and update README.at91 documentBo Shen2013-05-21-17/+6
| | | | | | | | | | | This patch implement following things - The link no longer accessable - Remove the error configuration command - Update soldered data flash memory map - Update at91sam9m10g45ek memory size to 128MiB Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: atmel: add sama5d3xek supportBo Shen2013-05-21-0/+1522
| | | | | | | | | | | | | Add sama5d3xek support with following feature - boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector - boot from SPI flash support - boot from SD card support - LCD support - EMAC support - USB OHCI support Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* USB: ohci-at91: support sama5d3x devicesBo Shen2013-05-21-2/+12
| | | | | | | Add OHCI support for sama5d3x devices Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: at91: add Atmel sama5d3 SoC new pmc registerBo Shen2013-05-21-0/+23
| | | | | | | Add Atmel sama5d3 SoC new pmc register Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91sam9260ek: move board id setup to config headerAndreas Bießmann2013-05-12-12/+18
| | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Bo Shen <voice.shen@atmel.com>
* mmc: atmel_mci: add mmc card supportBo Shen2013-05-12-1/+4
| | | | | | | add mmc card support with atmel mci driver Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* mmc: atmel_mci: using IP version for different settingBo Shen2013-05-12-4/+40
| | | | | | | | | Using IP version for different setting - Higher version supports 8bit mode - Higher version bus width setting is different Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm: at91: add at91sam9g20ek_mmc_config, which can save environment in mmc cardWu, Josh2013-05-12-1/+18
| | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm: at91: enable mci support for at91sam9g20ek.Wu, Josh2013-05-12-2/+28
| | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm: at91: add at91sam9n12ek board supportWu, Josh2013-05-12-2/+699
| | | | | | | | | | | | Add support for following features: - nand boot, with PMECC 2bit ECC for 512 bytes sector - SPI flash boot - SD card boot - LCD support Signed-off-by: Josh Wu <josh.wu@atmel.com> [fix -Wimplicit-function-declaration for at91_lcd_hw_init()] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm: at91: add at91sam9n12 register definitionWu, Josh2013-05-12-8/+32
| | | | | | | | Since at91sam9n12 is a subset of at91sam9x5, so put all at91sam9n12 definitions in at91sam9x5 head file. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* spi: atmel_spi: using ip version to check whether has wdrbtBo Shen2013-05-12-4/+13
| | | | | | | | | | | Using IP version to check whether it has wdrbt bit in mode register Tested in at91sam9x5ek and at91sam9n12ek. Signed-off-by: Bo Shen <voice.shen@atmel.com> [fix warning about incompatible parameter] Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-11-422/+1561
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| * ARM: OMAP: Add arch_cpu_init functionSRICHARAN R2013-05-10-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | The boot parameters passed from SPL to UBOOT must be saved as a part of uboot's gd data as early as possible, before we will inadvertently overwrite it. So adding a arch_cpu_init for the required Socs to save it. Signed-off-by: Sricharan R <r.sricharan@ti.com> [trini: Add igep0033 hunk] Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: OMAP: Cleanup boot parameters usageSRICHARAN R2013-05-10-91/+39
| | | | | | | | | | | | | | | | | | | | | | The boot parameters are read from individual variables assigned for each of them. This been corrected and now they are stored as a part of the global data 'gd' structure. So read them from 'gd' instead. Signed-off-by: Sricharan R <r.sricharan@ti.com> [trini: Add igep0033 hunk] Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: OMAP: Correct save_boot_params and replace with 'C' functionSRICHARAN R2013-05-10-7/+56
| | | | | | | | | | | | | | | | | | | | | | Currently save_boot_params saves the boot parameters passed from romcode. But this is not stored in a writable location consistently. So the current code would not work for a 'XIP' boot. Change this by saving the boot parameters in 'gd' which is always writable. Also add a 'C' function instead of an assembly code that is more readable. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * ARM: OMAP4/5: Make OMAPx_SRAM_SCRATCH_ defines commonSRICHARAN R2013-05-10-33/+24
| | | | | | | | | | | | | | | | These defines are same across OMAP4/5. So move them to omap_common.h. This is required for the patches that follow. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * ARM: OMAP: Make omap_boot_parameters common across socsSRICHARAN R2013-05-10-72/+49
| | | | | | | | | | | | | | | | omap_boot_parameters is same and defined for each soc. So move this to a common place to reuse it across socs. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * am33xx: Fix warning with CONFIG_DISPLAY_CPUINFOTom Rini2013-05-10-5/+1
| | | | | | | | | | | | | | | | The arm_freq and ddr_freq variables are unused, so remove. Fixup whitespace slightly while in here. Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Tom Rini <trini@ti.com>
| * davinci: handle CONFIG_SYS_CLE_MASK and CONFIG_SYS_ALE_MASKEric Benard2013-05-10-8/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | these variables are curently defined in several config files but the driver doesn't use them and defaults to hardcoded values in nand_defs.h It's interesting to be able to change this hardcoded valude when the hardware is not using the default adress signals to drive ALE and CLE and two configuration defines already exist for this purpose so use them. Signed-off-by: Eric Bénard <eric@eukrea.com>
| * da850: provide davinci_enable_uart0Eric Benard2013-05-10-0/+10
| | | | | | | | | | | | | | | | this is needed to bring UART0 out of reset but this function currently only exists for dm644x/355/365/646x when da850 (at least am1808 also need it). Signed-off-by: Eric Bénard <eric@eukrea.com>
| * cm-t35: update config fileIgor Grinberg2013-05-10-13/+5
| | | | | | | | | | | | | | Several minor updates to the cm-t35 config file. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
| * MAINTAINERS: fix the cm-t35 board nameIgor Grinberg2013-05-10-1/+1
| | | | | | | | | | | | | | "cm-t35" in U-Boot source code is called "cm_t35". Make the change "cm-t35" -> "cm_t35" for better greppability. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * cm-t35: move cm-t35 to live in compulab directoryIgor Grinberg2013-05-10-10/+11
| | | | | | | | | | | | | | | | | | Currently the cm-t35 support code lives under board/cm_t35 directory. Some of the code can be shared with other/future CompuLab boards, so move the cm-t35 to live under board/compulab/cm_t35 directory. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
| * ARM: Panda: Add flag to allow runtime enviroment varibale modsDan Murphy2013-05-10-0/+2
| | | | | | | | | | | | | | | | Add the flag to allow runtime enviroment variable modifications. This is being added so that the board-name can be modified at runtime to indicate either a panda(4430) or a panda-es(4460) Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * ARM:Panda:Fix device tree loading for the panda-esDan Murphy2013-05-10-1/+9
| | | | | | | | | | | | | | | | | | | | | | Fix the device tree loading for panda(4430) and panda-es(4460) Modify the board name if a 4460 panda or panda-es is detected at run time. In the findfdt add a check for the panda-es board name and load the panda-es device tree blob. Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * ARM: OMAP5: Fix warm reset with USB cable connectedLokesh Vutla2013-05-10-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Warm reset on OMAP5 freezes when USB cable is connected. Fix requires PRM_RSTTIME.RSTTIME1 to be programmed with the time for which reset should be held low for the voltages and the oscillator to reach stable state. There are 3 parameters to be considered for calculating the time, which are mostly board and PMIC dependent. -1- Time taken by the Oscillator to shut + restart -2- PMIC OTP times -3- Voltage rail ramp times, which inturn depends on the PMIC slew rate and value of the voltage ramp needed. In order to keep the code in u-boot simple, have a way for boards to specify a pre computed time directly using the 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC' option. If boards fail to specify the time, use a default as specified by 'CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC' instead. Using the default value translates into some ~22ms and should work in all cases. However in order to avoid this large delay hiding other bugs, its recommended that all boards look at their respective data sheets and specify a pre computed and optimal value using 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC' In order to help future board additions to compute this config option value, add a README at doc/README.omap-reset-time which explains how to compute the value. Also update the toplevel README with the additional option and pointers to doc/README.omap-reset-time. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [rnayak@ti.com: Updated changelog and added the README] Signed-off-by: Rajendra Nayak <rnayak@ti.com>
| * Remove duplicate / unused #defines on AM335x boardsMark Jackson2013-05-10-11/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | As part of a review of a recent patch to add a new AM335x board, Tom found several duplicate and/or unused #defines. This patch simply removes them. The two affected configs have been recompiled to check nothing was broken (from a compilation point of view !!) Reported-by: Tom Rini <trini@ti.com> Signed-off-by: Mark Jackson <mpfj-list@mimc.co.uk>
| * omap5_common: Add optargs variable for kernel command line argsTom Rini2013-05-10-0/+2
| | | | | | | | | | | | | | | | Add 'optargs' variable to be set to additional kernel arguments, similar to omap3*/am3* usage. Cc: Sricharan R <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
| * OMAP5: USB: hsusbtll_clkctrl has to be in hw_auto for USB to workLubomir Popov2013-05-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | USB TLL clocks do not support 'explicit_en', only 'hw_auto' control (R. Sricharan). cm_l3init_hsusbtll_clkctrl has to be moved to the clk_modules_hw_auto_essential[] array in order to make the clock work. This fix is needed (but not sufficient) for USB EHCI operation in U-Boot. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
| * ARM: Add support for IGEP COM AQUILA/CYGNUSEnric Balletbo i Serra2013-05-10-0/+680
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IGEP COM AQUILA and CYGNUS are industrial processors modules with following highlights: o AM3352/AM3354 Texas Instruments processor o Cortex-A8 ARM CPU o 3.3 volts Inputs / Outputs use industrial o 256 MB DDR3 SDRAM / 128 Megabytes FLASH o MicroSD card reader on-board o Ethernet controller on-board o JTAG debug connector available o Designed for industrial range purposes Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
| * Add DDR3 support for IGEP COM AQUILA/CYGNUS.Enric Balletbo i Serra2013-05-10-0/+17
| | | | | | | | | | | | These boards uses Samsung K4B2G1646E-BIH9 a 2Gb E-die DDR3 SDRAM. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
| * arm: omap: emif: Fix DDR3 init after warm resetLokesh Vutla2013-05-10-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | EMIF supports a global warm reset mode, during which the EMIF keeps the SDRAM content. But if leveling is enabled at the time of warm reset for DDR3, the following steps needs to be done after warm reset: 1) Keep EMIF in self refresh mode. 2) Reset PHY to bring back the PHY to a known state. 3) Start Levelling procedure. Doing the same. And also enabling DLL lock and code output after warm reset. Tested on OMAP5432 ES2.0 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * beagleboard: Update comment in get_board_rev()Tom Rini2013-05-10-2/+3
| | | | | | | | | | | | | | | | We are able to tell the difference between xM Rev Ax/Bx and xM Rev Cx, and have been for some time. The comment above the function however did not list this, so update. Signed-off-by: Tom Rini <trini@ti.com>
| * OMAP5: I2C: Set I2C_BUS_MAX to 5 to enable I2C4 and I2C5Lubomir Popov2013-05-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms. In order to be able to select one of these buses however, I2C_BUS_MAX has to be set to 5; do this here. Please note that for working bus selection, a fix to the i2c driver is required as well (subject of a separate patch). Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
| * OMAP5: I2C: Add I2C4 and I2C5 basesLubomir Popov2013-05-10-0/+2
| | | | | | | | | | | | | | | | I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms. The I2C4 and I2C5 base addresses were however not defined; do this here. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
| * OMAP5: I2C: Enable i2c5 clocksLubomir Popov2013-05-10-0/+1
| | | | | | | | | | | | | | I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms. The i2c5 clock was however not enabled; do this here. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
| * palmas: add header guardNishanth Menon2013-05-10-0/+4
| | | | | | | | | | | | | | Add an header guard to common header file to prevent multiple includes messing things up. Signed-off-by: Nishanth Menon <nm@ti.com>
| * palmas: use palmas_i2c_[read|write]_u8Nishanth Menon2013-05-10-26/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 21144298 (power: twl6035: add palmas PMIC support) introduced twl6035_i2c_[read|write]_u8 Then, commit dd23e59d (omap5: pbias ldo9 turn on) introduced palmas_[read|write]_u8 for precisely the same access function. TWL6035 belongs to the palmas family, so instead of having an twl6035 API, we could use an generic palmas API instead. To stay consistent with the function naming of twl4030,6030 accessors, we use palmas_i2c_[read|write]_u8 Cc: Balaji T K <balajitk@ti.com> Cc: Sricharan R <r.sricharan@ti.com> Reported-by: Ruchika Kharwar <ruchika@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
| * palmas: rename twl6035_mmc1_poweron_ldo with an palmas generic functionNishanth Menon2013-05-10-3/+3
| | | | | | | | | | | | | | | | Since TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs, rename twl6035_mmc1_poweron_ldo by a more generic palmas_mmc1_poweron_ldo function. Signed-off-by: Nishanth Menon <nm@ti.com>
| * palmas: rename init_settings to an generic palmas initNishanth Menon2013-05-10-3/+3
| | | | | | | | | | | | | | Since TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs, rename twl6035_init_settings with an more generic palmas_init_settings Signed-off-by: Nishanth Menon <nm@ti.com>
| * twl6035: rename to palmasNishanth Menon2013-05-10-12/+12
| | | | | | | | | | | | | | | | | | | | | | TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs Rename twl6035 to palmas to allow reuse across multiple current and future platforms As part of this change, change the CONFIG_TWL6035_POWER to CONFIG_PALMAS_POWER and update usage of header file accordingly. Signed-off-by: Nishanth Menon <nm@ti.com>
| * twl6030: add header guardNishanth Menon2013-05-10-0/+5
| | | | | | | | | | | | | | Add an header guard to common header file to prevent multiple includes messing things up. Signed-off-by: Nishanth Menon <nm@ti.com>
| * twl6030: move twl6030 register access functions to common header fileNishanth Menon2013-05-10-11/+11
| | | | | | | | | | | | | | | | twl6030_i2c_[read|write]_u8 can be used else where to access multi-function device such as twl6030, so move the register access functions to the common twl6030.h header file. Signed-off-by: Nishanth Menon <nm@ti.com>
| * twl6030: twl6030_i2c_[read|write]_u8 prototype consistentNishanth Menon2013-05-10-34/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot standard i2c register access prototype is i2c_read(addr, reg, 1, &buf, 1) i2c_reg_write(u8 addr, u8 reg, u8 val) twl6030_i2c_read_u8(u8 addr, u8 *val, u8 reg) twl6030_i2c_write_u8(u8 addr, u8 val, u8 reg) does not provide consistency, so switch the prototype to be consistent with rest of u-boot i2c operations: twl6030_i2c_read_u8(u8 addr, u8 reg, u8 *val) twl6030_i2c_write_u8(u8 addr, u8 reg, u8 val) Signed-off-by: Nishanth Menon <nm@ti.com>
| * twl4030: make twl4030_i2c_read_u8 prototype consistentNishanth Menon2013-05-10-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | u-boot standard i2c read prototype is i2c_read(addr, reg, 1, &buf, 1) twl4030_i2c_read_u8(u8 addr, u8 *val, u8 reg) does not provide consistency, so switch the prototype to be consistent with rest of u-boot i2c operations: twl4030_i2c_read_u8(u8 addr, u8 reg, u8 *val) Signed-off-by: Nishanth Menon <nm@ti.com>
| * twl4030: make twl4030_i2c_write_u8 prototype consistentNishanth Menon2013-05-10-61/+62
| | | | | | | | | | | | | | | | | | | | | | | | u-boot standard i2c register write prototype is i2c_reg_write(u8 addr, u8 reg, u8 val) twl4030_i2c_write_u8(u8 addr, u8 val, u8 reg) does not provide consistency, so switch the prototype to be consistent with rest of u-boot i2c operations: twl4030_i2c_write_u8(u8 addr, u8 reg, u8 val) Signed-off-by: Nishanth Menon <nm@ti.com>
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