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* Merge branch 'spi' of git://git.denx.de/u-boot-x86Tom Rini2013-03-20-155/+1213
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| * sf: Use unsigned type for buffersSimon Glass2013-03-19-4/+4
| | | | | | | | | | | | The verify code is broken on archs with signed char. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Enable time command for corebootSimon Glass2013-03-19-0/+2
| | | | | | | | | | | | | | This command is useful for measuring SPI flash load times and the like. Enable gettime as well to obtain absolute time tick values. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Enable SPI flash support for corebootSimon Glass2013-03-19-3/+9
| | | | | | | | | | | | Turn on SPI flash support and related commands. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Add FDT SPI node for linkSimon Glass2013-03-19-0/+11
| | | | | | | | | | | | Add a memory-mapped 8GB SPI chip. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Move PCI init before SPI initSimon Glass2013-03-19-4/+4
| | | | | | | | | | | | | | It is possible that our PCI bus will provide the SPI controller, so change the init order to make this work. Signed-off-by: Simon Glass <sjg@chromium.org>
| * sf: Enable FDT-based configuration and memory mappingSimon Glass2013-03-19-1/+48
| | | | | | | | | | | | | | Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: spi: Set maximum write size for ICHSimon Glass2013-03-19-0/+5
| | | | | | | | | | | | | | This SPI controller can only write 64 bytes at a time. Add this restriction in so that 'sf write' works correct for blocks larger than 64 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * sf: Respect maximum SPI write sizeSimon Glass2013-03-19-2/+8
| | | | | | | | | | | | | | | | Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of bytes that can be in a write transaction. Support this by breaking the writes into multiple transactions. Signed-off-by: Simon Glass <sjg@chromium.org>
| * spi: Add parameter for maximum write sizeSimon Glass2013-03-19-0/+3
| | | | | | | | | | | | | | | | Some SPI controllers (e.g. Intel ICH) have a limit on the number of SPI bytes that can be written at a time. Add this as a parameter so that clients of the SPI interface can respect this value. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: spi: Add Intel ICH driverSimon Glass2013-03-19-0/+893
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports Intel ICH7/9. The Intel controller is a little unusual in that it is mostly intended for use with SPI flash, and has some optimisations and features specifically for that application. In particular it is not possible to support ongoing transactions that continue over many calls with SPI_XFER_BEGIN and SPI_XFER_END. This driver supports writes of up to 64 bytes at a time, the limit for the controller. Future work will improve this. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * sf: Use spi_flash_alloc() in each SPI flash driverSimon Glass2013-03-19-52/+8
| | | | | | | | | | | | | | | | Rather than each device having its own way to allocate a SPI flash structure, use the new allocation function everywhere. This will make it easier to extend the interface without breaking devices. Signed-off-by: Simon Glass <sjg@chromium.org>
| * sf: Add spi_flash_alloc() to create a new SPI flash structSimon Glass2013-03-19-0/+63
| | | | | | | | | | | | | | | | | | | | At present it is difficult to extend the SPI flash structure since all devices allocate it themselves, and few of them zero all fields. Add a new function spi_flash_alloc() which can be used by SPI devices to perform this allocation, and thus ensure that all devices can better cope with SPI structure changes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * spi: Use spi_alloc_slave() in each SPI driverSimon Glass2013-03-19-83/+36
| | | | | | | | | | | | | | | | Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org>
| * spi: Add function to allocate a new SPI slaveSimon Glass2013-03-19-0/+83
| | | | | | | | | | | | | | | | | | | | At present it is difficult to extend the SPI structure since all drivers allocate it themselves, and few of them zero all fields. Add a new function spi_alloc_slave() which can be used by SPI drivers to perform this allocation, and thus ensure that all drivers can better cope with SPI structure changes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * fdt: Add fdtdec_get_addr_size() to read reg propertiesSimon Glass2013-03-19-6/+36
| | | | | | | | | | | | | | | | It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2013-03-18-49/+4203
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| * usb: Add multiple controllers support for EHCI PCIVincent Palatin2013-03-18-9/+16
| | | | | | | | | | | | | | Use the ability to have several active EHCI controller on a system in the PCI EHCI controller implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Enable USB features for corebootSimon Glass2013-03-18-0/+17
| | | | | | | | | | | | Enable PCI EHCI, storage, keyboard and Ethernet for USB. Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: usbeth: smsc95xx: remove EEPROM loaded checkMichael Spang2013-03-18-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | [port of Linux kernel commit bcd218be5aeb by Steve Glendinning] The eeprom read & write commands currently check the E2P_CMD_LOADED_ bit is set before allowing any operations. This prevents any reading or writing unless a correctly programmed EEPROM is installed. Signed-off-by: Michael Spang <spang@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
| * usb: ehci: Fix aliasing issue in EHCI interrupt codeVincent Palatin2013-03-18-1/+1
| | | | | | | | | | | | | | | | | | | | The interrupt endpoint handling code stores the buffer pointer in the QH padding field. We need to make it the size of a pointer to avoid strict aliasing issue with the compiler. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: Support interrupt transfers via periodic listPatrick Georgi2013-03-18-5/+316
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interrupt transfers aren't meant to be used from the async list (the EHCI spec indicates trouble with low/full-speed intr on async). Build a periodic list instead, and provide an API to make use of it. Then, use that API from the existing interrupt transfer API. This provides support for USB keyboards using EHCI. Use timeouts to ensure we cannot get stuck in the keyboard scanning if something wrong happens (USB device unplugged or fatal I/O error) Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: exynos: Enable non-dt pathVivek Gautam2013-03-18-0/+7
| | | | | | | | | | | | | | | | Enabling the non-dt path for the driver so that we don't get any build errors for non-dt configuration. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: exynos: Fix multiple FDT decodeVivek Gautam2013-03-18-28/+16
| | | | | | | | | | | | | | | | | | | | With current FDT support driver tries to parse device node twice in ehci_hcd_init() and ehci_hcd_stop(), which shouldn't happen ideally. Making provision to store data in a global structure and thereby passing its pointer when needed. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
| * arm:trats: Use new ums commandLukasz Majewski2013-03-18-0/+68
| | | | | | | | | | | | | | | | | | This patch enables new "ums" command on Trats board Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
| * usb:gadget: USB Mass Storage Gadget supportLukasz Majewski2013-03-18-0/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the USB Mass Storage Gadget to u-boot New command called "ums" is implemented to provide access to on-device embedded persistent memory. USB Mass Storage is supposed to work on top of the USB Gadget framework Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Marek Vasut <marek.vasut@gmail.com>
| * usb:composite: USB Mass Storage - f_mass_storage.c from Linux kernelPiotr Wilczek2013-03-18-0/+2793
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The f_mass_storage.c source file from v2.6.36 Linux kernel. commit 8876f5e7d3b2a320777dd4f6f5301d474c97a06c Author: Michal Nazarewicz <m.nazarewicz@samsung.com> Date: Mon Jun 21 13:57:09 2010 +0200 USB: gadget: f_mass_storage: added eject callback Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Marek Vasut <marek.vasut@gmail.com>
| * usb:composite: USB Mass Storage - storage_common.c from Linux kernelLukasz Majewski2013-03-18-0/+653
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The storage_common.c source file from v2.6.36 Linux kernel. commit d26a6aa08b9f12b44fb1ee65625e7480d3d5bb81 Author: Michal Nazarewicz <m.nazarewicz@samsung.com> Date: Mon Nov 9 14:15:23 2009 +0100 USB: g_mass_storage: code cleaned up and comments updated Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Marek Vasut <marek.vasut@gmail.com>
| * usb:composite:fix Provide function data when addressing device with only one ↵Lukasz Majewski2013-03-18-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | interface This commit fixes problems with some non-standard requests send with device address instead of interface address (bmRequestType.Receipent field). This happens with dfu-util (debian version: 0.5), which address non standard requests (like w_value=0x21 and bRequest=GET_DESCRIPTOR) to device. Without this fix, the above request is STALLED, and hence causes dfu-util to assume some standard configuration (packet size = 1024B instead of 4096B) In turn it displays following errors: Error obtaining DFU functional descriptor Warning: Assuming DFU version 1.0 Warning: Transfer size can not be detected ... Warning: Trying default transfer size 1024 This fix allows passing non-standard request to function setup code, where it shall be handled. Tested at: Trats (exynos4210) Tested with:DFU and UMS gadgets Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * usbtty: adapt buffers for large packet supportShiraz Hashim2013-03-16-2/+4
| | | | | | | | | | | | | | Increase buffer sizes at driver and tty level to accommodate kermit large packet support. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
| * usb/host/ehci: Add support for EHCI on spearVipin Kumar2013-03-16-0/+60
| | | | | | | | | | | | | | Add EHCI support for spear boards Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
| * usb: Fix bug when both DFU & ETHER are definedPantelis Antoniou2013-03-16-2/+8
| | | | | | | | | | | | | | | | | | | | | | When both CONFIG_USB_GADGET & CONFIG_USB_ETHER are defined the makefile links objects twice. This patch uses a Makefile specific idiom of 'if defined(CONFIG_USB_GADGET) || defined(CONFIG_USB_ETHER)' to handle the case. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * dfu: Add a partition type targetPantelis Antoniou2013-03-16-0/+31
| | | | | | | | | | | | | | Dealing with raw block numbers with the dfu is very annoying. Introduce a partition method. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * dfu: Properly zero out timeout valuePantelis Antoniou2013-03-16-0/+3
| | | | | | | | | | | | | | Zero out timeout value; letting it filled with undefined values ends up with the dfu host hanging. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * dfu: Fix crash when wrong number of arguments givenPantelis Antoniou2013-03-16-1/+1
| | | | | | | | | | | | | | Fix obvious crash when not enough arguments are given to the dfu command. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * dfu: Only perform DFU board_usb_init() for TRATSPantelis Antoniou2013-03-16-0/+3
| | | | | | | | | | | | USB initialization shouldn't happen for all the boards. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * usb: ehci: Add 64-bit controller supportVincent Palatin2013-03-16-0/+3
| | | | | | | | | | | | | | | | On EHCI controller with 64-bit address space support, we must initialize properly the high word for the PCI bus master accesses. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: generic PCI supportVincent Palatin2013-03-16-1/+40
| | | | | | | | | | | | | | | | | | Instead of hardcoding the PCI IDs on the USB controller, use the PCI class to detect them. Ensure the busmaster bit is properly set in the PCI configuration. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-03-18-10407/+15588
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Albert's rework of the linker scripts conflicted with Simon's making everyone use __bss_end. We also had a minor conflict over README.scrapyard being added to in mainline and enhanced in u-boot-arm/master with proper formatting. Conflicts: arch/arm/cpu/ixp/u-boot.lds arch/arm/cpu/u-boot.lds arch/arm/lib/Makefile board/actux1/u-boot.lds board/actux2/u-boot.lds board/actux3/u-boot.lds board/dvlhost/u-boot.lds board/freescale/mx31ads/u-boot.lds doc/README.scrapyard include/configs/tegra-common.h Build tested for all of ARM and run-time tested on am335x_evm. Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-15-1570/+2881
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| | * Tegra114: Dalmore: Add pad config tables/code based on pinmux codeTom Warren2013-03-14-14/+292
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pad config registers exist in APB_MISC_GP space, and control slew rate, drive strengh, schmidt, high-speed, and low-power modes for all of the pingroups in Tegra30. This builds off of the pinmux way of constructing init tables to configure select pads (SDIOCFG, for instance) during pinmux_init(). Currently, no padcfg entries exist. SDIO3CFG will be added when the MMC driver is added as per the TRM to work with the SD-card slot on Dalmore E1611. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * Tegra114: fdt: Move aliases from dtsi to dts file as per other TegrasTom Warren2013-03-14-8/+8
| | | | | | | | | | | | | | | | | | | | | All other Tegra boards have their alias nodes in the .dts file Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * Tegra114: Dalmore: Always use DEFAULT instead of DISABLE for lock bitsTom Warren2013-03-14-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pinmux code issues a warning if the caller attempts to disable the lock bit in a pinmux register, since this is impossible (once it's locked, the only way to unlock it is to reset the device/pmt controller). The I2C/DDC/CEC/USB macros expect a lock setting to be passed in, and the previous setting of DISABLE caused the pinmux table parsing code to issue the warning. Changing the lock bits in these table entries to DEFAULT (i.e. don't touch it) fixes this. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * Tegra114: Fix/update GP padcfg register structTom Warren2013-03-14-8/+26
| | | | | | | | | | | | | | | | | | | | | Differences in padcfg registers (some removed, some added) between Tegra30 and Tegra114 weren't picked up when I first ported this file. Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * Tegra114: pinmux: Fix bad CAM_MCLK func 3 table entryTom Warren2013-03-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This caused CAM_MCLK's pinmux reg to be locked out, since the table parsing code couldn't find a matching entry for VI_ALT3 and wrote garbage to the register. Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: enable a common set of disk-related commands everywhereStephen Warren2013-03-14-80/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable a common set of partition types, filesystems, and related commands in tegra-common.h, so that they are available on all Tegra boards. This allows boot.scr (loaded and executed by the default built-in environment) on those boards to assume that certain features are always available. Do this in tegra-common.h, so that individual board files can undefine the features if they really don't want any of them. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * disk: define HAVE_BLOCK_DEVICE if CONFIG_CMD_PARTStephen Warren2013-03-14-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Various code that is conditional upon HAVE_BLOCK_DEVICE is required by code conditional upon CONFIG_CMD_PART. So, enable HAVE_BLOCK_DEVICE if CONFIG_CMD_PART is enabled. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * disk: define HAVE_BLOCK_DEVICE in a common placeStephen Warren2013-03-14-40/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This set of ifdefs is used in a number of places. Move its definition somewhere common so it doesn't have to be repeated. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: make bounce buffer option commonStephen Warren2013-03-14-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | All Tegra devices will need CONFIG_BOUNCE_BUFFER. Move it to tegra-common.h to ensure it's always set. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * Tegra30: MMC: Enable DT MMC driver support for Tegra30 Cardhu boardsTom Warren2013-03-14-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | Tested on my Cardhu-A04 tablet, eMMC and SD-Card work fine, can load a kernel off of an SD card OK, card detect works, and the env is now stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
generated by cgit v1.1 at 2024-11-09 20:23:22 +0000