| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
|
| |
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
|
|
|
|
|
| |
The name of this function is not consistent, so fix it, and export
the function for external use.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
|
|
|
|
|
|
|
|
| |
Samsung's SDHCI bindings require multiple gpios to be parsed and
configured at a time. Export the already available fdtdec_decode_gpios
for this purpose.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
|
|
|
|
|
|
| |
A memory region has a start and a size and is often specified in
a node by a 'reg' property. Add a function to decode this information
from the fdt.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
|
|
|
|
|
| |
Add a function to look up a configuration string such as board name
and returns its value. We look in the "/config" node for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
| |
Add a function to look up a configuration item such as machine id
and return its value.
Note: The code has been taken as is from the Chromium u-boot development
tree and needs Simon Glass' sign-off.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Microblaze platform can use CONFIG_OF_EMBED option
but also it is necessary to support boards
which don't want to use this option.
U-Boot doesn't compile dts/libdts.o for #undef CONFIG_OF_EMBED
case that's why it should be guarded by ifdef.
Signed-off-by: Michal Simek <monstr@monstr.eu>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The patch
"include/linux/byteorder: import latest endian definitions from linux"
(sha1: eef1cf2d5cf1cae5fb76713e912263dedf110aeb)
Introduced a lot of compilation failures with unknow types.
include/linux/byteorder/big_endian.h:45:1: error: unknown type name '__le64'
include/linux/byteorder/big_endian.h: In function '__cpu_to_le64p':
include/linux/byteorder/big_endian.h:47:18: error: '__le64' undeclared (first use in this function)
include/linux/byteorder/big_endian.h:47:18: note: each undeclared identifier is reported only once for each function it appears in
include/linux/byteorder/big_endian.h:47:25: error: expected ';' before '__swab64p'
include/linux/byteorder/big_endian.h: At top level:
include/linux/byteorder/big_endian.h:49:1: error: unknown type name '__le64'
include/linux/byteorder/big_endian.h:53:1: error: unknown type name '__le32'
include/linux/byteorder/big_endian.h: In function '__cpu_to_le32p':
include/linux/byteorder/big_endian.h:55:18: error: '__le32' undeclared (first use in this function)
include/linux/byteorder/big_endian.h:55:25: error: expected ';' before '__swab32p'
include/linux/byteorder/big_endian.h: At top level:
include/linux/byteorder/big_endian.h:57:1: error: unknown type name '__le32'
include/linux/byteorder/big_endian.h:61:1: error: unknown type name '__le16'
...
Removing asm/bitops.h solved this problem.
Signed-off-by: Michal Simek <monstr@monstr.eu>
|
| |
| |
| |
| |
| |
| |
| |
| | |
Flushing caches is necessary because of soft reset
which doesn't clear caches.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Reviewed-by: Marek Vasut <marex@denx.de>
|
| |
| |
| |
| |
| |
| |
| |
| | |
Just remove ancient code.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stephan Linz <linz@li-pro.net>
Reviewed-by: Marek Vasut <marex@denx.de>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
ext2_find_next_zero_bit must be also static if __swab32 is also static.
Warning:
include/asm/bitops.h:369:22: warning: '__fswab32' is static but
used in inline function 'ext2_find_next_zero_bit'
which is not static [enabled by default]
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stephan Linz <linz@li-pro.net>
|
|/
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
commit 199adb601ff34bdbbd0667fac80dfe0a87bffc2b "common/misc: sparse
fixes" broke the help command trying to fix the sparse error
"command.c:44:38: error: bad constant expression".
As Henrik points out, the fix was bad because the commit used
CONFIG_SYS_MAXARGS whereas the code intended to use the maximum
number of commands (not arguments to a command).
Revert command.c changes to the original code as asked by Wolfgang.
Reported-by: Henrik Nordström <henrik@henriknordstrom.net>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Commit 1db7377a70a8d931c32648e717695133120d5456 fixes the gen_atmel_mci driver
to be able to use multi block access for avr32. Therefore remove the setting
which forces single block access.
This also adds a huge performace gain for mmc access:
---8<---
Loading file "/boot/uImage" from mmc device 0:1
1830666 bytes read in 1293 ms (1.3 MiB/s)
--->8---
vs.
---8<---
Loading file "/boot/uImage" from mmc device 0:1
1830666 bytes read in 237 ms (7.4 MiB/s)
--->8---
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: haavard.skinnemoen@atmel.com
Cc: hans-christian.egtvedt@atmel.com
Cc: mpfj@mimc.co.uk
Cc: alex.raimondi@miromico.ch
Cc: julien.may@miromico.ch
Cc: egtvedt@samfundet.no
Cc: havard@skinnemoen.net
|
|\ \ |
|
| | |
| | |
| | |
| | |
| | |
| | | |
Remove unused header
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Timer is initialized already in board_init_r function in
(common/spl/spl.c) No need to initialize it again
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
* add CONFIG_SYS_CACHELINE_SIZE to eb_cpux9k2 board config header
* dissable dcache (CONFIG_SYS_DCACHE_OFF) for eb_cpux9k2
Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
|
| |\ \ |
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
This patch extends the am335x_evm board for the AM335x IDK.
The IDK board uses MII for the ethernet phy (same as
Beaglebone board) and MMC0 for storage (but without
card detect line).
The IDK uses UART3 for console. So u-boot must be build
with CONFIG_SERIAL4 and CONFIG_CONS_INDEX=4 or for
the am335x_evm_uart3 board configuration as introduced
by Andrew Bradfords recent patch series "am33xx: Enable
UART {1,2,3,4,5}...". When using the IDK with console on UART0,
those patches are not required. In this case the board
slightly needs to be modified.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
When CONFIG_SYS_L2CACHE_OFF is defined we end up with a few warnings
currently. Re-order functions so that we don't have that anymore.
Signed-off-by: Tom Rini <trini@ti.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
This fixes the following boothang in SPL:
Unknown board, cannot configure pinmux.### ERROR ### Please RESET the board ###
Future commits will add pinmuxes for more on-board peripherals.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Raphael Assenat <raph@8d.com>
[trini: Squash boards.cfg / MAINTAINERS change into main patch]
Signed-off-by: Tom Rini <trini@ti.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Based on previous work by: Alistair Buxton <a.j.buxton@gmail.com>
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Cc: Ивайло Димитров <freemangordon@abv.bg>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add optional support for some ANSI escape sequences to the
cfb_console driver. Define CONFIG_CFB_CONSOLE_ANSI to enable
cursor moving, color reverting and clearing the cfb console
via ANSI escape codes.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
* Code copied from linux kernel 3.0.0 from file include/linux/i2c/twl.h
* commit 6523b148b44be38d89c2ee9865d34da30d9f5f1c
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Board can implement function setup_board_tags which is used for adding atags
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add targets of am335x_evm_uart{1,2,3,4,5} to have serial input/output on
UART{1,2,3,4,5} for use with the Beaglebone RS232 cape, am335x_evm
daughterboard, and other custom configurations.
Modify target for am335x_evm to include SERIAL1 and CONS_INDEX=1
options in order to clarify UART selection requirements.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Increase the possible number of ns16550 serial devices from 4 to 6.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
If configured to use UART{1,2,3,4,5} such as on the Beaglebone RS232
cape or on the am335x_evm daughterboard, enable the proper pin-muxing.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
If configured to use UART{1,2,3,4,5} such as on the Beaglebone RS232
cape or the am335x_evm daughterboard, enable the required clocks for
the UART in use.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add back common.h header that was removed in previous patch so that
CONFIG_TEGRA can be evaluated correctly.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Remove calls to serial_assign() that are failing now that it returns a
proper error code. This calls were not actually doing anything
because they passed the name of a stdio_dev when a serial_device name
is exptectd.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
The rules to generate u-boot-{no,}dtb-tegra.bin were almost identical.
Combine them into a single paremeterized rule. This will allow the next
patch to edit a single rule, rather than being cut/paste twice.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Initialize this variable to avoid a compiler warning about possible
use of uninitialized variable with gcc 4.4.6.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Change tegra SPL to use common SPL framework. Any tegra specific
initialization is now done in spl_board_init() instead of
board_init_f()/board_init_r(). Only one SPL boot target is supported
on tegra, which is boot to RAM image. jump_to_image_no_args() must be
overridden on tegra so the host CPU can be initialized.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Change jump_to_image_no_args() to a weak symbol to allow override by
SoC specific code. This is required by tegra because the SPL runs on
a different CPU from the image it is loading, so tegra specific
initialization is required to start the host CPU. Pass in spl_image
as a parameter for the same reason.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Seaboard has a GPIO that switches an external mux between Tegra's debug
UART and SPI flash. This is initialized from the SPL so that SPL debug
output can be seen. Simplify the code that does this, and don't actually
request the GPIO in the SPL; just program it. This saves ~4.5K from the
size of the SPL, mostly BSS due to the large gpio_names[] table that is
no longer required. This makes Seaboard's SPL fit within the current max
size.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Seaboard and Ventana are very similar boards, and so share the seaboard.c
board file. The one difference needed so far is detected at run-time by
calling machine_is_ventana(). This bloats the Ventana build with code
that is never used. Switch to detecting Ventana at compile time to remove
bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit
within the max size.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
For Tegra, the SPL and main U-Boot are concatenated together to form a
single memory image. Hence, the maximum SPL size is the different in
TEXT_BASE for SPL and main U-Boot. Instead of manually calculating
SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if
one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform
the calculation automatically.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add an ASSERT() to u-boot.lds to detect an SPL that doesn't fit within
SPL_TEXT_BASE..SPL_MAX_SIZE.
Different .lds files implement this check in two possible ways:
1) An ASSERT() like this
2) Defining a MEMORY region of size SPL_MAX_SIZE, and re-directing all
linker output into that region. Since u-boot.lds is used for both
SPL and main U-Boot, this would entail only sometimes defining a
MEMORY region, and only sometimes performing that redirection, and
hence option (1) was deemed much simpler, and hence implemented.
Note that this causes build failures at least for NVIDIA Tegra Seaboard
and Ventana. However, these are legitimate; the SPL doesn't fit within
the required space, and this does cause runtime issues.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add the missing bits to the Tegra NAND driver to make ONFI detection work
properly.
Also add it to the Tegra default config, as it seems to be a reasonable thing
to have it available on all boards that use any kind of NAND.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Port USB1 on Whistler is intended as a device port for USB recovery.
Whistler's DT currently contains an alias for this USB port, even though
Whistler's config doesn't enable multiple USB controllers, so the alias
is unused. Remove the unused alias for consistency for now. Similar,
explicitly disable the port in the device tree too.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
The device tree already contains the required configuration for both the
USB1 and USB3 ports. Enable the required configuration options to enable
both these ports, which in turn allows the USB1 port to be used.
Note that on a true Seaboard, this port is typically used as a device
port hosting Tegra's USB recovery protocol. However, on the Springbank
derivative, this port is the only external USB port, so we enable it as
a host port so that USB peripherals may be used. Enabling this port in
U-Boot as a host port doesn't prevent the port from reverting to a
device port when the CPU is reset into recovery mode.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
The ULPI port is routed onto pins on the mini PCI Express connector. A
standard breakout board may be used to access the port.
* Add required DT entries to configure the ULPI port.
* Setup up the ULPI pinmux in the board code.
* Enable multiple USB controller and ULPI support in the board config.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Currently, Tegra's default environment uses non-standard variables to define
where boot scripts should load the kernel, FDT, and initrd. This change both
changes the variable names to match those described in U-Boot's README, and
shuffles their values around a little so that the values make a little more
sense; see comments in the patch for rationale behind the values chosen.
Note that this patch does remove the old non-standard variable "fdt_load" from
the default environment, so this patch requires people to change their boot
scripts.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
This define indicates the size of the memory region where it is safe
to place data passed to the Linux kernel (ATAGs, DTB, initrd). The
value needs to be:
a) Less than or equal to RAM size.
b) Small enough that the area is not within the kernel's highmem region,
since the kernel cannot access ATAGs/DTB/initrd from highmem.
c) Large enough to hold the kernel+DTB+initrd.
256M seems large enough for (c) in most circumstances, and small enough
to satisfy (a) and (b) across any possible Tegra board. Note that the
user can override this value via environment variable "bootm_mapsize"
if needed.
The advantage of defining BOOTMAPSZ is that we no longer need to define
variable fdt_high in the default environment. Previously, we defined
this to prevent the DTB from being relocated to the very end of RAM,
which on most Tegra systems is within highmem, and hence which would
cause boot failures. A user can still define this variable themselves
if they want the FDT to be either left in-place wherever loaded, or
copied to some other specific location. Similarly, there should no
longer be a strict requirement for the user to define initrd_high if
using an initrd.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
This adds board support for the Toradex Colibri T20 module.
Working functions:
- SD card boot
- USB boot
- Network
- NAND environment
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
For Non-Nvidia boards to include newly added features (like emc clock
scaling) it would be necessary to add each feature to their own board
Makefile. This is because currently the top Makefile automaticly includes
these features only for Nvidia boards.
This patch adds a simple Makefile include so all new features become
available for non-Nvidia board vendors.
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|