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* omap5_common: Re-work mmc boot to try SD and eMMC, correct root deviceTom Rini2013-10-09-21/+24
| | | | | | | | | | | | OMAP5 boards may have both eMMC (on MMC2) and an SD slot (on MMC1). We Update the default bootcmd to match what happens on AM335x where we try SD first, and then eMMC. In this case however, the hardware layout used for powering both of these means that in the kernel eMMC shall be found first as it is powered by a fixed regulator and SD found second as SD is powered via the palmas which will result in deferred probing. Tested-by: Aparna Balasubramanian <aparnab@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* km/scripts: fix ramfsAndreas Huber2013-10-09-1/+1
| | | | | | 'actual_bank' is not used anymore, instead boot_bank is used. Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
* powerpc/km: drop unused CONFIG_SYS_DTT_LOW_TEMPHolger Brunck2013-10-09-2/+0
| | | | | | This define is not used in u-boot code, we can drop this define safely. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* km/common: switch on CMD_GREPENVHolger Brunck2013-10-09-0/+1
| | | | Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* powerpc/83xx: remove staticness for qe_iop_conf_tabHolger Brunck2013-10-09-1/+1
| | | | | | | | | commit a5510058 powerpc/83xx/km: make local functions and structs static removed the staticness also from this struct. But this struct is needed in arch/powerpc/cpu/mpc83xx/cpu_init.c and declared as extern. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* Merge branch 'next' of git://git.denx.de/u-boot-mpc83xxTom Rini2013-10-09-6/+11
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| * powerpc/83xx/km: make local functions and structs staticHolger Brunck2013-05-21-6/+6
| | | | | | | | | | Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * powerpc/83xx/km: MV88e6122 errata fix for 1.9VHolger Brunck2013-05-21-0/+5
| | | | | | | | | | | | | | | | Errata Fix: 1.9V Output from Internal 1.8V Regulator, acc. MV-S300889-00D.pdf , clause 4.5 Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | da850evm.h: Always set CONFIG_CMD_SF, move to by CONFIG_SPI_FLASHTom Rini2013-10-08-1/+1
| | | | | | | | | | | | When we have CONFIG_SPI_FLASH set we now require CONFIG_CMD_SF. Signed-off-by: Tom Rini <trini@ti.com>
* | Revert "am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should ↵Tom Rini2013-10-08-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mmcroot." Upon further inspection and review and chatting with kernel folks, what happens here is that what mmcblk# a device gets is based on probe order. So a system with an SD card inserted with place eMMC on mmcblk1, but without an SD card, it will be on mmcblk0. So U-boot can only provide a best guess. In this case, if no SD card is present, we would want to pass mmcblk0p2 still. If an SD card is present, it woudl be able to provide a uEnv.txt that would be loaded (even if the kernel is NOT there) which can still update mmcroot variable. This reverts commit 827512fb1154c05c6eb1e2259e936df55c98a535. Cc: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-10-08-1380/+363
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| * | socfpga: Adding pin mux handoff filesChin Liang See2013-10-07-0/+268
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding the generated pin mux configuration by Preloader Generator tool Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * | socfpga: Adding System Manager driverChin Liang See2013-10-07-2/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding System Manager driver which will configure the pin mux for real hardware Cyclone V development kit (not Virtual Platform) Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * | omap1510inn: arm925t: remove supportAlbert ARIBAUD2013-10-07-1348/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | omap1510inn is orphan and has been for years now. Reove it and, as it was the only arm925t target, also remove arm925t support. Update doc/README.scrapyard accordingly. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | usb: Fix error handling in musb_hcd.cAndrew Murray2013-10-07-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The wait_until_[rx|tx]ep_ready functions return a u8 to indicate success containing the value 0, 1 or -1. This patch changes the return type to an int to accommodate the negative return values. These functions are used in the file using calls such as if (!wait_until... Where a -1 is returned it is mishandled and treated as success instead of a CRC error. This patch addresses this. Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Andrew Murray <amurray@embedded-bits.co.uk> Acked-by: Marek Vasut <marex@denx.de>
| * | pcm051/igep0033: Supply bd_ram_ofs for cpsw driverLars Poeschel2013-10-07-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since 2bf36ac638ab2db9f0295aa47064976eeebf80c1 the BD ram address is not hardcoded inside cpsw driver any more. Platforms have to supply their bd_ram_ofs in the platform data to the driver. This commit does this for pcm051 and igep0033 boards. Tested-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
| * | ARM: IGEP0033: Update timing to run DDR at 400MHz.Enric Balletbo i Serra2013-10-07-14/+14
| | | | | | | | | | | | | | | | | | | | | We can run the DDR at 400MHz, so update the timings for that purpose. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
| * | am335x_evm: Switch to zImage as default rather than uImageTom Rini2013-10-07-11/+11
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2013-10-08-2318/+1696
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| * | | spi: exynos: Support word transfersRajeshwari Shinde2013-10-08-16/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since SPI register access is so expensive, it is worth transferring data a word at a time if we can. This complicates the driver unfortunately. Use the byte-swapping feature to avoid having to convert to/from big endian in software. This change increases speed from about 2MB/s to about 4.5MB/s. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | spi: exynos: Minimise access to SPI FIFO levelRajeshwari Shinde2013-10-08-12/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Accessing SPI registers is slow, but access to the FIFO level register in particular seems to be extraordinarily expensive (I measure up to 600ns). Perhaps it is required to synchronise with the SPI byte output logic which might run at 1/8th of the 40MHz SPI speed (just a guess). Reduce access to this register by filling up and emptying FIFOs more completely, rather than just one word each time around the inner loop. Since the rxfifo value will now likely be much greater that what we read before we fill the txfifo, we only fill the txfifo halfway. This is because if the txfifo is empty, but the rxfifo has data in it, then writing too much data to the txfifo may overflow the rxfifo as data arrives. This speeds up SPI flash reading from about 1MB/s to about 2MB/s on snow. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | spi: exynos: Support a delay after deactivateRajeshwari Shinde2013-10-08-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For devices that need some time to react after a spi transaction finishes, add the ability to set a delay. Implement this as a delay on the first/next transaction to avoid any delay in the fairly common case where a SPI transaction is followed by other processing. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | exynos: Export timer_get_us() to get microsecond timerRajeshwari Shinde2013-10-08-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function, if implemented by the board, provides a microsecond timer. The granularity may be larger than 1us if hardware does not support this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | doc: SPI: Update SPI status trackJagannadha Sutradharudu Teki2013-10-07-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | Updated SPI/status.txt, with memory_map and TODO. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: ramtron: Remove page_size printJagannadha Sutradharudu Teki2013-10-07-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no page_size for ramtron flashes, so just print the detected flash and it's size. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: Minor cleanupsJagannadha Sutradharudu Teki2013-10-07-23/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add spaces, tabs - Commenting. - Rearrange code. - Add static qualifier for missing func. - Remove memory_map from ramtron.c - Ramtron: spi_flash_internal.h -> sf_internal.h Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | README: qspi usecase and testing documentation.Poddar, Sourav2013-10-07-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Contains documentation and testing details for qspi flash interface. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | dra7xx_evm: add SPL API, QSPI, and serial flash supportMatt Porter2013-10-07-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enables support for SPI SPL, QSPI and Spansion serial flash device on the EVM. Configures pin muxes for QSPI mode. Signed-off-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | spi: add TI QSPI driverMatt Porter2013-10-07-0/+312
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds a SPI master driver for the TI QSPI peripheral. - Added quad read support. - Added memory mapped support. Signed-off-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: Add memory mapped read supportPoddar, Sourav2013-10-07-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qspi controller can have a memory mapped port which can be used for data read. Added support to enable memory mapped port read. This patch enables the following: - It enables exchange of memory map address between mtd and qspi through the introduction of "memory_map" flag. - Add support to communicate to the driver that memory mapped transfer is to be started through introduction of new flags like "SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END". This will enable the spi controller to do memory mapped configurations if required. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | armv7: hw_data: change clock divider setting.Poddar, Sourav2013-10-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clock requirement for qspi clk is 192 Mhz. According to the below formulae, f dpll = f ref * 2 * m /(n + 1) clockoutx2_Hmn = f dpll / (hmn+ 1) fref = 20 Mhz, m = 96, n = 4 gives f dpll = 768 Mhz For clockoutx2_Hmn to be 768, hmn + 1 should be 4. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | omap5: add qspi supportMatt Porter2013-10-07-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add QSPI definitions and clock configuration support. Signed-off-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | sf: probe: Add support for EN25S64Priyanka Jain2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for EON EN25S64 SPI flash. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | doc: SPI: Add status.txt for tracking SPI subsys statusJagannadha Sutradharudu Teki2013-10-07-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | doc/SPI/status.txt added to track the u-boot SPI subsystem status. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: Rename spi_flash filesJagannadha Sutradharudu Teki2013-10-07-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renamed: spi_flash.c -> sf.c spi_flash_internal.h -> sf_internal.h spi_flash_ops.c -> sf_ops.c spi_flash_probe.c -> sf_probe.c Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | spi: spi cleanupsJagannadha Sutradharudu Teki2013-10-07-43/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Rearranged multi-line comment style. - Add tabs. - Add spaces. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: spi_flash cleanupsJagannadha Sutradharudu Teki2013-10-07-74/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | More cleanups on spi_flash side: - Removed unneeded comments. - Rearranged macros in proper location. - Rearranged func declerations - Renamed few function names. - Added License headers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: Remove spi_flash_do_alloc referencesJagannadha Sutradharudu Teki2013-10-07-38/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Added a support for common probe, hence removed removed spi_flash_do_alloc reference. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for MX25L51235FJagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Macronix MX25L51235F SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for MX25L25635FJagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Macronix MX25L25635F SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: ops: Add static qualifier to spi_flash_cmd_bankaddr_writeJagannadha Sutradharudu Teki2013-10-07-6/+1
| | | | | | | | | | | | | | | | Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Print erase_size while printing flash detailsJagannadha Sutradharudu Teki2013-10-07-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Included erase_size while printing probed flash details. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Use print_size arg as page_sizeJagannadha Sutradharudu Teki2013-10-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use flash->page_size arg in print_size() instead of flash->sector_size while printing detected flas part details. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for S25FL512S_256KJagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Spansion S25FL512S_256K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for S25FL256S_256KJagannadha Sutradharudu Teki2013-10-07-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Spansion S25FL256S_256K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for EN25Q64Jagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add support for EON EN25Q64 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: Remove unneeded flash drivers filesJagannadha Sutradharudu Teki2013-10-07-1508/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the common probing is handled in spi_flash_probe.c hence removed the unneeded flash drivers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: ramtron: Add support for separate flash driverJagannadha Sutradharudu Teki2013-10-07-284/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compared to other spi flashes, ramtron has a different probing and implementation on flash ops, hence moved ramtron probe code into ramtron driver. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: Add proper comment style on spi_flash structureJagannadha Sutradharudu Teki2013-10-07-28/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Added proper comment style on spi_flash structure to make more readable. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Simply the BAR configuration logicJagannadha Sutradharudu Teki2013-10-07-54/+20
| | | | | | | | | | | | | | | | Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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