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* Add bb_miiphy_init call before any ethernet bring-up code.Luigi 'Comio' Mantellini2009-10-10-1/+64
| | | | | Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Rewrite the miiphybb (Bit-banged MII bus driver) in order to support an ↵Luigi 'Comio' Mantellini2009-10-10-105/+322
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arbitrary number of mii buses. This feature is useful when your board uses different mii buses for different phys and all (or a part) of these buses are implemented via bit-banging mode. The driver requires that the following macros should be defined into the board configuration file: CONFIG_BITBANGMII - Enable the miiphybb driver CONFIG_BITBANGMII_MULTI - Enable the multi bus support If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs to define at least the following macros: MII_INIT - Generic code to enable the MII bus (optional) MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional) MDIO_ACTIVE - Activate the MDIO pin as out pin MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin MDIO_READ - Read the MDIO pin MDIO(v) - Write v on the MDIO pin MDC_DECLARE - Declaration needed to access to the MDC pin (optional) MDC(v) - Write v on the MDC pin The previous macros make the driver compatible with the previous version (that didn't support the multi-bus). When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill the bb_miiphy_buses[] array with a record for each required bus and declare the bb_miiphy_buses_num variable with the number of mii buses. The record (struct bb_miiphy_bus) has the following fields/callbacks (see miiphy.h for details): char name[] - The symbolic name that must be equal to the MII bus registered name int (*init)() - Initialization function called at startup time (just before the Ethernet initialization) int (*mdio_active)() - Activate the MDIO pin as output int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin int (*set_mdio)() - Write the MDIO pin int (*get_mdio)() - Read the MDIO pin int (*set_mdc)() - Write the MDC pin int (*delay)() - Delay function void *priv - Private data used by board specific code The board code will look like: struct bb_miiphy_bus bb_miiphy_buses[] = { { .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... }, { .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... }, ... int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) / sizeof(bb_miiphy_buses[0]); Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Merge branch 'reloc'Wolfgang Denk2009-10-09-1413/+154
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| * relocation: Do not relocate NULL pointers.Joakim Tjernlund2009-10-08-24/+48
| | | | | | | | | | | | | | | | | | | | NULL is an absolute value and should not be relocated. After this correction code like: void weak_fun(void) __attribute__((weak)); printf("weak_fun:%p\n", weak_fun); will still print null after relocation. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
| * 85xx: Ensure BSS segment isn't linked at address 0Peter Tyser2009-10-08-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When U-Boot is relocated from flash to RAM pointers are modified accordingly. However, pointers initialzed with NULL values should not be modified so that they maintain their intended NULL value. If the BSS segment is linked at address 0 its address will not be updated as necessary during relocation. This is a temporary workaround. The end goal is to add support to U-Boot to dynamically locate the BSS at an arbitrary address at runtime. When the ability to fixup the BSS inteligently is added, this workaround can be removed and the 85xx link script can put the BSS at a fixed address at link time. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * ppc: Remove reloc_off field from global_data structurePeter Tyser2009-10-03-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that proper relocation is supported, the reloc_off field is no longer necessary. Note that the location of the standalone application jump table pointer in the global data structure is affected by this change, breaking execution of standalone applications compiled for previous versions of U-Boot. We therefore increment XF_VERSION to 6 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
| * arm/microblaze/nios/nios2/sh: Remove relocation fixupsPeter Tyser2009-10-03-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These architectures don't need relocation fixups, so reduce their codesize a bit by defining CONFIG_RELOC_FIXUP_WORKS. Also remove the reloc_off field from their global data structures as it is no longer needed. Note that the location of the standalone application jump table pointer in the global data structure is affected by this change, breaking execution of standalone applications compiled for previous versions of U-Boot. We will therefore increment XF_VERSION in the next commit, which also touches this area. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
| * Conditionally perform common relocation fixupsPeter Tyser2009-10-03-5/+41
| | | | | | | | | | | | | | | | | | | | | | Add #ifdefs where necessary to not perform relocation fixups. This allows boards/architectures which support relocation to trim a decent chunk of code. Note that this patch doesn't add #ifdefs to architecture-specific code which does not support relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * p3mx: Remove serial relocation fixupsPeter Tyser2009-10-03-11/+0
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * lwmon, lwmon5: Remove sysmon POST relocation fixupsPeter Tyser2009-10-03-32/+2
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * mpl: Remove memory test relocation fixupsPeter Tyser2009-10-03-33/+1
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * fpga: Remove relocation fixupsPeter Tyser2009-10-03-863/+18
| | | | | | | | | | | | | | | | PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * tsec: Remove PHY command relocation fixupsPeter Tyser2009-10-03-49/+0
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * ppc: Remove board-specific command table relocation fixupsPeter Tyser2009-10-03-71/+0
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * ppc: Remove extable relocation fixupsPeter Tyser2009-10-03-20/+6
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * ppc: Remove pci config table pointer relocation fixupsPeter Tyser2009-10-03-25/+0
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * ppc: Remove board.c relocation fixupsPeter Tyser2009-10-03-50/+0
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * ppc: Check for compilers that don't support relocationPeter Tyser2009-10-03-0/+6
| | | | | | | | | | | | | | | | | | | | Certain ppc compilers are known not to generate the .fixup section properly. The .fixup section is necessary to create a relocatable U-Boot image. A basic check for the existence of the .fixup section should hopefully catch the majority of broken compilers which don't support relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * ppc: Enable full relocation to RAMPeter Tyser2009-10-03-223/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The following changes allow U-Boot to fully relocate from flash to RAM: - Remove linker scripts' .fixup sections from the .text section - Add -mrelocatable to PLATFORM_RELFLAGS for all boards - Define CONFIG_RELOC_FIXUP_WORKS for all boards Previously, U-Boot would partially relocate, but statically initialized pointers needed to be manually relocated. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* | tqm5200: Correct comment and code in post_hotkeys_pressed.Detlev Zundel2009-10-08-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the code and the comment according to the original intent of doing an intensive memory test when PSC6_3 is pulled low on the STK52xx. Notably PORT_CONFIG will be overridden with this correct code now, so beware. The original code only worked by coincidence depending on the PORT_CONFIG setting from the header file. The new code was tested to ensure that the (undocumented) memory test still works on the STK52x. Signed-off-by: Detlev Zundel <dzu@denx.de> CC: Martin Krause <Martin.Krause@tqs.de> Minor white-space cleanup. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | mpc512x: fix fixed_sdram() init code.Wolfgang Denk2009-10-08-21/+37
| | | | | | | | | | | | | | | | | | | | Commit 054197ba and later fixes used an array to initialize some of the MDDRC parameters; however, the use of an array turned out to be a bad idea as it was not possible to correlate structure entries to array indices in readable and reliable way. Now we use a struct instead, which makes this self-explanatory. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ppc4xx: respect 80-chars per line in ppc*.h filesNiklaus Giger2009-10-07-870/+1038
| | | | | | | | | | | | | | | | After running checkstyle.pl on the three previous patches I noted that in the *.h files there were a lot of long lines. This patch solves this problem. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Rework cmd reginfoNiklaus Giger2009-10-07-154/+378
| | | | | | | | | | | | | | | | | | | | The command "reginfo" got an overhaul for the ppc4xx. It dumps all the relevant HW configuration registers (address, symbolic name, content). This allows to easily detect errors in *.h files and changes in the HW configuration. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc_4xx: Apply new HW register namesNiklaus Giger2009-10-07-492/+492
| | | | | | | | | | | | | | | | Modify all existing *.c files to use the new register names as seen in the AMCC manuals. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Cleanup some HW register namesNiklaus Giger2009-10-07-189/+216
| | | | | | | | | | | | | | | | | | | | Here you find all the changes in the include directory for new register names and adapting other ones to the names used by AMCC in their manuals, e.g. For 440EPx/GRPPC440EPx/GRX, Revision 1.15 – September 22, 2008 For PPC405GP Embedded Processor, Revision 1.02 – March 22, 2006 Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Add PPC405EX(r) Rev D supportStefan Roese2009-10-07-12/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately some Rev D PPC405EX/405EXr PVR's are identical with older 405EX(r) parts. Here a list: 0x12911475 - 405EX Rev D with Security *and* 405EX Rev A/B witout Sec 0x12911473 - 405EX Rev D without Security *and* 405EXr Rev A/B with Sec Since there are only a few older parts in the field, this patch now changes the PVR's above to represent the new Rev D versions. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Phong Vo" <pvo@amcc.com>
* | ppc4xx: Fix msg "initialization as root-complex failed" upon PCIe scanStefan Roese2009-10-07-1/+17
| | | | | | | | | | | | | | | | | | | | This message is printed upon PCIe bus scan, not only upon error, but also if no PCIe device is detected at all. Since this is not an error, let's remove this message in this case. We already have the message "link is not up." if there is no PCIe device present. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
* | PPC4xx: Denali core: Fix incorrect DDR row bitsMike Nuss2009-10-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPD detection code for the Denali memory controller used on some ppc4xx processors incorrectly encodes DDR0_42. With certain memory configurations, this can cause the bootwrapper to incorrectly calculate the installed memory size, because the number of row bits is wrong. This patch fixes that encoding. Signed-off-by: Mike Nuss <mike@terascala.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Add information about return values of xxx_eth_register() in documentationBen Warren2009-10-05-8/+13
| | | | | | | | | | | | | | | | | | As discussed on mailing list, <0 indicates failure, >=0 indicates number of interfaces found. Also added blurb about private data Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | document network driver frameworkMike Frysinger2009-10-04-0/+177
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | net: kirkwood_egiga.c: fixed build warningPrafulla Wadaskar2009-10-04-1/+3
| | | | | | | | | | | | | | | | if link up detection code is disabled through config option, it gives build warning. This patch fixes the same Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Convert SMC91111 Ethernet driver to CONFIG_NET_MULTI APIBen Warren2009-10-04-639/+849
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All in-tree boards that use this controller have CONFIG_NET_MULTI added Also: - changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111 - cleaned up line lengths - modified all boards that override weak function in this driver - modified all eeprom standalone apps to work with new driver - updated blackfin standalone EEPROM app after testing Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | net: phy: mv88e61xx.c : fixed build warningPrafulla Wadaskar2009-10-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | following build warning was observed mv88e61xx.c: In function ‘mv88e61xx_busychk’: mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules This patch fixes the same Patch tested for rd6281a board build Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | net: Fix problem with 405EZ ethernet interruptJames Clough2009-10-04-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | On 405EZ the RX-/TX-interrupts are coalesced into one IRQ bit in the UIC. We need to acknowledge the RX-/TX-interrupts in the SDR0_ICINTSTAT reg as well. This problem was introduced with commit d1631fe1 [ppc4xx: Consolidate PPC4xx UIC defines] Signed-off-by: James Clough <james@rtetc.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | net: add random_port() prototypeMike Frysinger2009-10-04-0/+3
| | | | | | | | | | | | | | | | | | | | The random_port() is meant to be used by other net code, but without a prototype, we get fun warnings like: dns.c: In function 'DnsSend': dns.c:89: warning: implicit declaration of function 'random_port' Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2009-10-03-351/+341
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| * | ppc4xx: Add SDRAM detection for PMC440 boardsMatthias Fuchs2009-10-02-33/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to detect the amount of DDR2 SDRAM on PMC440 modules. Detection is done by probing through a list of available and supported hardware configurations from 1GByte down to 256MB. The static TLB entry is replaced by dynamically created entries. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Merge PPC4xx DDR and DDR2 ECC handlingStefan Roese2009-10-02-257/+173
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch merges the ECC handling (ECC parity byte writing) into one file (ecc.c) for all PPC4xx SDRAM controllers except for PPC440EPx/GRx. This exception is because only those PPC's use the completely different Denali SDRAM controller core. Previously we had two routines to generate/write the ECC parity bytes. With this patch we now only have one core function left. Tested on Kilauea (no ECC) and Katmai (with and without ECC). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Felix Radensky <felix@embedded-sol.com> Cc: Grant Erickson <gerickson@nuovations.com> Cc: Pieter Voorthuijsen <pv@prodrive.nl>
| * | ppc4xx: Reorganize DDR2 ECC handlingFelix Radensky2009-10-02-207/+253
| |/ | | | | | | | | | | | | | | | | | | Reorganize DDR2 ECC handling to use common code for SPD DIMMs and soldered SDRAM. Also, use common code to display SDRAM info (ECC, CAS latency) for SPD and soldered SDRAM variants. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2009-10-03-2/+2
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| * Blackfin: update default console= settingsMike Frysinger2009-09-30-1/+1
| | | | | | | | | | | | | | The Linux kernel has changed the way it numbers serial ports, so update the default command line to match it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf533-ezkit: update env locationMike Frysinger2009-09-30-1/+1
| | | | | | | | | | | | | | | | The u-boot image has outgrown the current space and overflowed into the env sector. So move the env to the next available sector (we've already allocated the first few sectors anyways for u-boot). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2009-09-30-1678/+2175
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| * | ppc/85xx: get_law_entry isn't used in CONFIG_NAND_SPLKumar Gala2009-09-30-0/+4
| | | | | | | | | | | | | | | | | | | | | Don't include get_law_entry as part of the NAND_SPL build since the code isnt used. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | Add README.mpc8536dsMingkai Hu2009-09-30-0/+127
| | | | | | | | | | | | | | | | | | | | | Add boot from NAND/eSDHC/eSPI description Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | On-chip ROM boot: MPC8536DS supportMingkai Hu2009-09-30-1/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MPC8536E is capable of booting from the on-chip ROM - boot from eSDHC and boot from eSPI. When power on, the porcessor excutes the ROM code to initialize the eSPI/eSDHC controller, and loads the mian U-Boot image from the memory device that interfaced to the controller, such as the SDCard or SPI EEPROM, to the target memory, e.g. SDRAM or L2SRAM, then boot from it. The memory device should contain a specific data structure with control word and config word at the fixed address. The config word direct the process how to config the memory device, and the control word direct the processor where to find the image on the memory device, or where copy the main image to. The user can use any method to store the data structure to the memory device, only if store it on the assigned address. The on-chip ROM code will map the whole 4GB address space by setting entry0 in the TLB1, so the main image need to switch to Address space 1 to disable this mapping and map the address space again. This patch implements loading the mian U-Boot image into L2SRAM, so the image can configure the system memory by using SPD EEPROM. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | NAND boot: MPC8536DS supportMingkai Hu2009-09-30-18/+307
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC8536E can support booting from NAND flash which uses the image u-boot-nand.bin. This image contains two parts: a 4K NAND loader and a main U-Boot image. The former is appended to the latter to produce u-boot-nand.bin. The 4K NAND loader includes the corresponding nand_spl directory, along with the code twisted by CONFIG_NAND_SPL. The main U-Boot image just like a general U-Boot image except the parts that included by CONFIG_SYS_RAMBOOT. When power on, eLBC will automatically load from bank 0 the 4K NAND loader into the FCM buffer RAM where CPU can execute the boot code directly. In the first stage, the NAND loader copies itself to RAM or L2SRAM to free up the FCM buffer RAM, then loads the main image from NAND flash to RAM or L2SRAM and boot from it. This patch implements the NAND loader to load the main image into L2SRAM, so the main image can configure the RAM by using SPD EEPROM. In the first stage, the NAND loader copies itself to the second to last 4K address space, and uses the last 4K address space as the initial RAM for stack. Obviously, the size of L2SRAM shouldn't be less than the size of the image used. If so, the workaround is to generate another image that includes the code to configure the RAM by SPD and load it to L2SRAM first, then relocate the main image to RAM to boot up. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc8536: fix board config file line lengthMingkai Hu2009-09-30-68/+79
| | | | | | | | | | | | | | | Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | sbc8548: reclaim wasted sector in boot flashPaul Gortmaker2009-09-30-4/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By nature of being based off the MPC8548CDS board, this board inherited an ENV_SIZE setting of 256k. But since it has a smaller flash device (8MB soldered on), it has a native sector size of 128k, and hence the ENV_SIZE was causing 2 sectors to be used for the environment. By removing the unused sector, we can push TEXT_BASE up closer to the end of address space and reclaim that sector for any other application. This also fixes the mismatch between TEXT_BASE and MONITOR_LEN reported by Kumar earlier. Since this board also supports the ability to boot off the 64MB SODIMM flash, this change is forward looking with that in mind; i.e. the settings for MONITOR_LEN and ENV_SIZE will work when the 512k sectors of the SODIMM flash are used for alternate boot in the future. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | ppc/85xx: Clean up immap_85xx.hKumar Gala2009-09-28-1589/+1586
| |/ | | | | | | | | | | | | | | | | * Converted all white space to tabs * Converted all types to u8/u16/u32 * Reduce lines to fit in 80 columns * Renamed MPC85xx_{Q,B}MAN -> FSL_CORENET_{Q,B}MAN Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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