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* mmc/dw_mmc: Fix DMA descriptor corruptionMischa Jonker2013-09-20-3/+4
| | | | | | | | | | | | | | | | | | | In dwmci_prepare_data, the descriptors are allocated for DMA transfer. These are allocated using the ALLOC_CACHE_ALIGN_BUFFER. This macro uses the stack to allocate these descriptors. This becomes a problem if the DMA transfer continues after the processor leaves the function in which the descriptors were allocated. Therefore, I have moved the allocated of the buffers up one level, to dwmci_send_cmd(). The DMA transfer should be complete when leaving this function. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Andy Fleming <afleming@gmail.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* mmc: don't support write & erase for SPL buildsPaul Burton2013-09-20-182/+230
| | | | | | | | | | For SPL builds this is just dead code since we'll only need to read. Eliminating it results in a significant size reduction for the SPL binary, which may be critical for certain platforms where the binary size is highly constrained. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* mmc: size optimization when !CONFIG_MMC_SPIPaul Burton2013-09-17-0/+4
| | | | | | | | | | | When CONFIG_MMC_SPI is not enabled, the MMC_MODE_SPI capability can never be set. However there is code in mmc.c which uses the mmc_host_is_spi macro to check that capability & act accordingly. If we expand that macro to 0 when CONFIG_MMC_SPI is not set (since it will always be 0 at runtime anyway) then the compiler can optimize away the SPI-specific code paths in mmc.c. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* mmc: don't call *printf or puts when SPL & !CONFIG_SPL_LIBCOMMON_SUPPORTPaul Burton2013-09-17-0/+36
| | | | | | | | If we don't have CONFIG_SPL_LIBCOMMON_SUPPORT defined then stdio & *printf functions are unavailable & calling them will cause a link failure. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* spl_mmc: only call printf or puts with CONFIG_SPL_LIBCOMMON_SUPPORTPaul Burton2013-09-17-0/+16
| | | | | | | If we don't have CONFIG_SPL_LIBCOMMON_SUPPORT defined then stdio functions are unavailable & calling them will cause a link failure. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* spl: remove unnecessary (& ARM specific) include of asm/utils.hPaul Burton2013-09-17-1/+0
| | | | | | | ARM is the only architecture which includes this header and nothing in spl_mmc.c makes use of it. Remove the include. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* ARM: OMAP: Enable 8-bit eMMC access for OMAP4/5/DRA7xxLubomir Popov2013-09-17-3/+14
| | | | | | | | | | | | | | | Enable 8-bit host capability for HSMMC2 and/or HSMMC3. CONFIG_HSMMC2_8BIT (for OMAP4/5/DRA7xx) and/or CONFIG_HSMMC3_8BIT (for DRA7xx only) must be defined in the board header if an 8-bit eMMC device is connected to the corresponding port. Fix the "No status update" error that appeared for eMMC devices by inserting a 20 us delay between writing arguments and command. This solution has been proposed by Michael Cashwell <mboards@prograde.net>. A minor cosmetic fix in a comment as well. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
* omap_hsmmc: omap4+/am335x: modify MMC controller internal fsm reset funcOleksandr Tyshchenko2013-09-17-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "mmc_send_cmd: timeout: No status update" error sometimes happens in omap_hsmmc driver func mmc_send_cmd() when the MMC controller card identification and selection sequence is executed for eMMC on OMAP4 boards. It happens due to incorrect execution of CMD line reset procedure for OMAP4. Because CMD(DAT) lines reset procedures are slightly different for OMAP3 and OMAP4(AM335x,OMAP5,DRA7xx). According to OMAP3 TRM: Set SRC(SRD) bit in MMCHS_SYSCTL register to 0x1 and wait until it returns to 0x0. According to OMAP4(AM335x,OMAP5,DRA7xx) TRMs, CMD(DATA) lines reset procedure steps must be as follows: 1. Initiate CMD(DAT) line reset by writing 0x1 to SRC(SRD) bit in MMCHS_SYSCTL register (SD_SYSCTL for AM335x). 2. Poll the SRC(SRD) bit until it is set to 0x1. 3. Wait until the SRC(SRD) bit returns to 0x0 (reset procedure is completed). Unfortunately, at present omap_hsmmc driver has support only for OMAP3. And as result step #2 is missing for OMAP4(AM335x,OMAP5,DRA7xx). This sometimes leads to the fact that the waiting loop which is required in step #3 does not executed, because SRC bit does not set yet (at the moment of checking a condition of a loop execution). And as a result this can cause to timeout error when sending a next command. In the particular case (working with eMMC witch do not respond to some SD specific command) due to incorrect reset sequence after command SD_CMD_SEND_IF_COND which finished with CTO flag within 64 clock cycles, the next command MMC_CMD_APP_CMD leads to a timeout error within 1s. So, extend CMD(DATA) lines reset procedure in func mmc_reset_controller_fsm() by adding the missing step #2 for OMAP4+/AM335x boards. Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* mmc: Remove unused variable backup from mmc_send_cmd()Oleksandr Tyshchenko2013-09-17-3/+0
| | | | | | | | Do not call a memset for unused variable backup every time. Remove unused variable from function. Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* mmc: sdhci: use the SDHCI_QUIRK_USE_WIDE8 for samsung SoCJaehoon Chung2013-09-17-7/+13
| | | | | | | | | Samsung SoC is supported the WIDE8, even if Controller version is v2.0. So add the SDHCI_QUIRK_USE_WIDE8 for Samsung-SoC. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* Prepare v2013.10-rc3Tom Rini2013-09-16-1/+1
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2013-09-16-10/+15
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| * cmd_sf: let "sf update" preserve the final part of the last sectorGerlando Falauto2013-08-27-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Since "sf update" erases the last block as a whole, but only rewrites the meaningful initial part of it, the rest would be left erased, potentially erasing meaningful information. So, as a safety measure, have it rewrite the original content. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Holger Brunck <holger.brunck@keymile.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * spi: mxs_spi: Configure chipselect after block resetMarek Vasut2013-08-27-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | The chipselect must be written into the CTRL0 register after the SSP block is reset, otherwise the block will always use ChipSelect #0. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-09-13-2/+34
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| * | powerpc/mpc85xx: Add workaround for erratum A-005125York Sun2013-09-10-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In a very rare condition, a system hang is possible when the e500 core initiates a guarded load to PCI / PCIe /SRIO performs a coherent write to memory. Please refer to errata document for more details. This erratum applies to the following SoCs and their variants, if any. BSC9132 BSC9131 MPC8536 MPC8544 MPC8548 MPC8569 MPC8572 P1010 P1020 P1021 P1022 P1023 P2020 C29x Signed-off-by: York Sun <yorksun@freescale.com> CC: Scott Wood <scottwood@freescale.com>
| * | powerpc/p2041: fix I2C controller's offsetShaohui Xie2013-09-10-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Without this patch, SPD access will fail which leads to DDR init fail. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Tested-by: Chris Packham <judge.packham@gmail.com> Acked-by: York Sun <yorksun@freescale.com>
* | | Revert "standalone-examples: support custom GCC lib"Tom Rini2013-09-12-13/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After further testing, this patch has two problems. First, examples/standalone/Makefile was already inherting PLATFORM_LIBS from the top-level Makefile so this lead to duplicating the private libgcc. Second, currently the private libgcc has a reference to 'hang' that is not being fulfilled. This reverts commit 4412db46468d5965da736d06f84d13e68a6e0b51. Signed-off-by: Tom Rini <trini@ti.com>
* | | Merge and reformat boards.cfg and MAINTAINERSAlbert ARIBAUD2013-09-12-2631/+1350
| | | | | | | | | | | | | | | | | | | | | | | | Put all informations about targets, including state (active or orphan) and maintainers, in boards.cfg; remove MAINTAINERS; adjust the build system accordingly. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-09-12-45/+766
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| * | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-11-45/+766
| |\ \ | | | | | | | | | | | | | | | | Conflicts: tools/Makefile
| | * | arm:goni:mmc: Add sd card detection and initialization.Przemyslaw Marczak2013-09-11-2/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change allow to use sd card on Goni the same like mmc 0. SD card is mmc dev 1, so it can be used like this: "fatls mmc 1:2". SD card is inited even if eMMC initialization fails. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | arm:mmc:goni/exynos: Fix wrong mmc base register devices offset.Przemyslaw Marczak2013-09-11-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On s5pc1xx mmc devices offset is multiply of 0x100000, wrong value was 0x10000. Register offset always points to mmc 0 before this change. Add macro definition of mmc dev register offset to s5pc1xx and exynos mmc. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Jaehoon Chung <jh80.chung at samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | dts: samsung: arndale: Fix include pathChander Kashyap2013-09-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per new convention ARCH_CPU_DTS is not defined in "dtc/Makefile". Hence Arndale comilation is failing. Fix this by adding proper include file in "board/samsung/dts/exynos5250-arndale.dts". Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | drivers:power:max77686: add function to set voltage and modePiotr Wilczek2013-08-30-0/+218
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add new functions to pmic max77686 to set voltage and mode. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | exynos5250: arndale: Add mmc supportInderpal Singh2013-08-30-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds mmc support to the arndale board. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | exynos5250: Add arndale board supportChander Kashyap2013-08-30-0/+452
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Arndale board is based on samsung's exynos5250 soc. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | arm: goni: remove config.mk fileMinkyu Kang2013-08-28-18/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since config.mk is deprecated, remove this file, and move CONFIG_SYS_TEXT_BASE define to config file. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | arm: smdkc100: remove config.mk fileMinkyu Kang2013-08-28-16/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since config.mk is deprecated, remove this file, and move CONFIG_SYS_TEXT_BASE define to config file. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Wolfgang Denk <wd@denx.de>
| | * | CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and update MakefilesChander Kashyap2013-08-27-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the Makefiles so that all boards can use the same spl generation tool Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | arm:exynos:gpio: fix s5p_gpio_part_max for exynos4x12Piotr Wilczek2013-08-23-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix wrong value returned by 's5p_gpio_part_max' function for Exynos4412. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxTom Rini2013-09-09-1/+12
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| * | | | ppc4xx: Fix GPIO handling in lwmon5 and lcd4_lwmon5 BSPStefan Roese2013-09-07-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LCD4 needs a slightly different GPIO configuration than the original LWMON5 variant. GPIO49 needs to be configured to a default output value of 0 (permanent voltage supply). Additionally lcd4 also needs to enable the LSB transmitter. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-09-09-2/+12
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| * | | | | powerpc/mpc85xx: Fix the I2C bus speed error on p1022Tang Yuantian2013-09-09-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The source clock frequency of I2C bus on p1022 is the platform(CCB) clock, not CCB/2. The wrong source clock frequency leads to wrong I2C bus speed setting. so, fixed it. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
| * | | | | SPL: P1022DS: switch to new multibus/multiadapter supportYing Zhang2013-09-09-1/+10
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Added section "u_boot_list" in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds - Use the function i2c_init_all instead of i2c_init Signed-off-by: Ying Zhang <b40530@freescale.com>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-09-06-453/+8726
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| * | | socfpga: Creating driver for Reset ManagerChin Liang See2013-09-06-31/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * | | socfpga: Adding configuration for development kitChin Liang See2013-09-06-7/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Separating the configuration file for Virtual Target and real hardware Cyclone V development kit Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * | | arm: lds: Remove libgcc eabi exception handling tablesMichal Simek2013-09-05-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove ARM eabi exception handling tables (for frame unwinding). AFAICT, u-boot stubs away the frame unwiding routines, so the tables will more or less just consume space. It should be OK to remove them. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-05-2/+2
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| | * | | ARM: atmel: sama5d3: drop unused CONFIG_NET_MULTIBo Shen2013-09-04-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop unused CONFIG_NET_MULTI Signed-off-by: Bo Shen <voice.shen@gmail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | mtd: atmel_nand: pmecc: fix bug fail to correct bit error in 1024-bytes sectorWu, Josh2013-09-04-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMECC use BCH algorithm to correct error. In BCH algorithm, the primitive polynomial value is GF(2^13) for 512-bytes sector size. And it is GF(2^14) for 1024-bytes sector size. This patch will choose correct degree of the remainders (13 or 14) for different sector size. Tested in AT91SAM9X5-EK with MLC nand flash. More detail can be refered to section 5.4.1 of: AT91SAM ARM-based Embedded MPU Application Note <http://www.atmel.com/Images/doc11127.pdf> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-05-97/+3691
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/serial/serial.c The conflict above was a trivial case of adding one init function in each branch, and manually resolved in merge.
| | * | | | i.MX6: Set and clear the gating bits for Phase Fractional DividersEric Nelson2013-08-31-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This addresses silicon errata ERR006282 as described in this document: https://community.freescale.com/docs/DOC-94581 Also implemented in Freescale's 2009.08-based release: http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/ Commit id: b7c5badf94ffbe6cd0845efbb75e16e05e3af404 Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | | | i.MX6: nitrogen6x: Don't bother setting PLL3(480) PFD1 divisorEric Nelson2013-08-31-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This clock isn't feeding anything under U-Boot, so there's no point in changing it from power-on default. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| | * | | | i.MX6: Correct ANATOP_PFD (Phase Fractional Divider) register declarationsEric Nelson2013-08-31-23/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some _CLKGATE_MASK and _FRAC_MASK macros were wrong for PFD_480 and the PFD_528 macros were missing. Fortunately, the incorrect macros weren't being used. Since both the PFD_480 and PFD_528 registers have the same structure, and the fields are identical for [0..3] in bytes [0..3], so a single set of macros will suffice. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| | * | | | i.MX6: Add convenience macros cpu_type(rev) and is_cpu_type(cpu)Eric Nelson2013-08-31-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | | | ARM: mxs: rename function that sets AUTO_RESTART flagHector Palacios2013-08-31-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AUTO_RESTART flag of HW_RTC_PERSISTENT0 register will power up the chip automatically 180ms after power down. This bit must be enabled by the boot loader to ensure the target can start upon hardware reset or watchdog reset even when powered from a battery. Currently the function named 'mxs_power_clear_auto_restart()' is setting this flag although the 'clear' in its name suggest the opposite. This patch renames the function to 'mxs_power_set_auto_restart()' and removes the comment about EVK revision A which was confusing because the function indeed was setting the flag. Signed-off-by: Hector Palacios <hector.palacios@digi.com>
| | * | | | ARM: Congatec: README updateSARTRE Leo2013-08-31-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | README: U-boot works both on SPI-NOR and SDcard Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
generated by cgit v1.1 at 2024-11-09 20:22:12 +0000