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* Sound: Support for MAX98095 codec in driverRajeshwari Shinde2013-03-08-2/+8
| | | | | | | | | This patchs adds support for MAX98095 codec in sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Sound: MAX98095: Add the driver for codecRajeshwari Shinde2013-03-08-0/+862
| | | | | | | | | This patch adds the driver for codec MAX98095 required by Snow Board Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: Add function to enable XXTI clock sourceRajeshwari Shinde2013-03-08-0/+28
| | | | | | | | This patch adds funtion to enable XXTI clock source required by MAX98095 codec. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK5250: Add PMIC voltage settingsRajeshwari Shinde2013-02-20-2/+143
| | | | | | | | This patch adds required pmic voltage settings for SMDK5250. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: Add function to setup set ps holdRajeshwari Shinde2013-02-20-0/+25
| | | | | | | | | | This patch adds a function to set ps_hold data driving value high. This enables the machine to stay powered on even after the initial power-on condition goes away(e.g. power button). Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'fixes' of git://git.denx.de/u-boot-mipsTom Rini2013-02-15-8/+0
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| * MIPS: board.c: remove manual relocation of env_name_specDaniel Schwierzeck2013-02-15-8/+0
| | | | | | | | | | | | | | | | Remove the manual relocation of env_name_spec. This has been missed in the previous patch series for introducing dynamic relocation on MIPS. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | x86: Remove unused real mode codeSimon Glass2013-02-14-1799/+0
| | | | | | | | | | | | | | This code is pretty old and we want to support only 32-bit systems now. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Rename CONFIG_NO_X86_RESET_VECTOR to CONFIG_X86_RESET_VECTORSimon Glass2013-02-14-7/+6
| | | | | | | | | | | | | | Invert the polarity of this option to simplify the Makefile logic. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gabe Black <gabeblack@chromium.org>
* | x86: Remove unneeded cruft from main MakefileSimon Glass2013-02-14-5/+1
| | | | | | | | | | | | | | | | These lines are dealt with in the x86 Makefile and link script, so punt them. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gabe Black <gabeblack@chromium.org>
* | x86: Remove sc520 cpuSimon Glass2013-02-14-1591/+0
| | | | | | | | | | | | | | | | This x86 CPU variant is no longer required as the boards that use it have been removed. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Remove eNET boardsSimon Glass2013-02-14-1238/+0
|/ | | | | | | These are no longer used and should be removed. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* Merge branch 'next' of git://git.denx.de/u-boot-mipsTom Rini2013-02-12-253/+268
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| * MIPS: add dynamic relocation supportGabor Juhos2013-02-12-12/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code handles relocation entries with the following relocation types only: mips32: R_MIPS_REL32 mips64: R_MIPS_REL+R_MIPS_64 xburst: R_MIPS_REL32 Other relocation entries are skipped without processing. The code must be extended if other relocation types must be supported. Add -pie to LDFLAGS_FINAL to generate the .rel.dyn fixup table, which will be applied to the relocated image before transferring control to it. The CONFIG_NEEDS_MANUAL_RELOC is not needed after the patch, so remove that as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: u-boot.lds: add relocation specific sectionsGabor Juhos2013-02-12-1/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This section contain the table needed for dynamic relocation. Also provide symbols for the relocation code to access the table. Discard all sections which are not needed in the final ELF binary and U-Boot image. Section .dynsym cannot be discarded or GNU ld crashes otherwise. This section will be stripped by GNU objcpy in a later patch. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: start.S: use symbol __image_copy_end for U-Boot image relocationDaniel Schwierzeck2013-02-12-19/+9
| | | | | | | | | | | | | | | | | | Use the newly introduced symbol __image_copy_end as end address for relocation of U-Boot image. This is needed for dynamic relocation added in later patches. This patch obsoletes the symbols uboot_end and uboot_end_data which are removed. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: start.S: optimize BSS initializationDaniel Schwierzeck2013-02-12-28/+35
| | | | | | | | | | | | | | | | | | | | | | | | Get the start and end address for clearing BSS from the newly introduced symbols __bss_start and __bss_end. After GOT is relocated, those symbols are already pointing to the correct addresses. Also optimize the loop by moving the address incrementation to the delay slot to avoid the initial sub instruction. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: board.c: switch to new symbols __bss_end and __image_copy_endDaniel Schwierzeck2013-02-12-2/+3
| | | | | | | | | | | | | | Use the newly introduced symbols __image_copy_end and __bss_end for setting up the memory area for the relocated U-Boot. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: u-boot.lds: introduce symbol __image_copy_endDaniel Schwierzeck2013-02-12-0/+8
| | | | | | | | | | | | | | This symbol is used in later patches as end address for relocation of the U-Boot image into RAM. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: u-boot.lds: merge all BSS sections and introduce symbols __bss_[start|end]Daniel Schwierzeck2013-02-12-5/+18
| | | | | | | | | | | | | | These symbols are used in later patches for as addresses for clearing the BSS area in the relocated U-Boot image. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: compute num_got_entries from .got section's sizeGabor Juhos2013-02-12-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | The '__got_start' and '__got_end' symbols are used only in the linker script to compute the value of the 'num_got_entries' symbol. Remove the symbols and use the SIZEOF(.got) command to get the size of the .got section. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: start.S: unify and simplify reset vector handlingDaniel Schwierzeck2013-02-12-176/+57
| | | | | | | | | | | | Adopt reset vector handling from Yamon. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: start.S: remove obsolete 64 bit handling in setup_c0_statusDaniel Schwierzeck2013-02-12-9/+1
| | | | | | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: xburst: fix broken access to global_dataDaniel Schwierzeck2013-02-12-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix access to global_data which is broken since commits: commit 035cbe99cd2fd4adf9d7fd95aeebb5f814e37eb9 Author: Simon Glass <sjg@chromium.org> Date: Thu Dec 13 20:49:08 2012 +0000 mips: Move per_clk and dev_clk to arch_global_data Move these field into arch_global_data and tidy up. The other CONFIG_JZSOC fields are used by various architectures, so just remove the #ifdef bracketing for these. Signed-off-by: Simon Glass <sjg@chromium.org> commit 582601da2f90b1850aa19f7820b1623c79b3dac6 Author: Simon Glass <sjg@chromium.org> Date: Thu Dec 13 20:48:35 2012 +0000 arm: Move lastinc to arch_global_data Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> commit 66ee69234795c0596f84b25f06b7fbc2e8ed214c Author: Simon Glass <sjg@chromium.org> Date: Thu Dec 13 20:48:34 2012 +0000 arm: Move tbl to arch_global_data Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
* | am335x_evm: Fix CPSW ethernet on GP EVM and EVM-SKTom Rini2013-02-12-0/+27
| | | | | | | | | | | | | | | | In commit cfd4ff6 we implemented part of advisory 1.0.10 (internal delay for RGMII mode not supported). This in turn however requires that we set the tx clock delay feature in the PHY itself. Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-02-12-2798/+14369
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| * arm: fix CONFIG_DELAY_ENVIRONMENT to act like it claims in the READMELucas Stach2013-02-11-1/+1
| | | | | | | | | | | | | | | | | | No one expects to end up in a delayed environment if CONFIG_DELAY_ENVIRONMENT isn't defined. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Allen Martin <amartin@nvidia.com>
| * Tegra114: Add/enable Dalmore build (T114 reference board)Tom Warren2013-02-11-0/+447
| | | | | | | | | | | | | | This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra114: Add generic Tegra114 build supportTom Warren2013-02-11-1/+1
| | | | | | | | | | | | | | This patch adds basic Tegra114 (T114) build support - no specific board is targeted. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra114: Dalmore: Add DT filesTom Warren2013-02-11-0/+18
| | | | | | | | | | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra114: Add common CPU (shared) filesTom Warren2013-02-11-4/+1291
| | | | | | | | | | | | These files are used by both SPL and main U-Boot. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra114: Add CPU (armv7) filesTom Warren2013-02-11-0/+59
| | | | | | | | | | | | | | | | These files are for code that runs on the CPU (A15) on T114 boards. At this time, there is no A15-specific code here. As T114-specific run-time code is added, it'll go here. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra114: Add AVP (arm720t) filesTom Warren2013-02-11-38/+403
| | | | | | | | | | | | | | This provides SPL support for T114 boards - AVP early init, plus CPU (A15) init/jump to main U-Boot. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra114: Add arch-tegra114 include filesTom Warren2013-02-11-5/+1365
| | | | | | | | | | | | | | | | | | | | Common Tegra files are in arch-tegra, shared between T20/T30/T114. Tegra114-specific headers are in arch-tegra114. Note that some of these will be filled in as more T114 support is added (drivers, WB/LP0 support, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra: cardhu: config: enable SPIAllen Martin2013-02-11-0/+11
| | | | | | | | | | | | | | | | Turn on SPI in cardhu config file Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: add SPI SLINK driverAllen Martin2013-02-11-1/+432
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: add addresses of SPI SLINK controllersAllen Martin2013-02-11-0/+6
| | | | | | | | | | | | | | | | Add I/O addresses of SPI SLINK controllers 1-6 Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra30: fdt: add SPI SLINK nodesAllen Martin2013-02-11-0/+77
| | | | | | | | | | | | | | | | Add tegra30 SPI SLINK nodes to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra30: add SBC1 to periph id mapping tableAllen Martin2013-02-11-1/+1
| | | | | | | | | | | | | | | | SBC1 is SPI controller 1 on tegra30 Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: spi: add fdt support to tegra SPI SFLASH driverAllen Martin2013-02-11-2/+45
| | | | | | | | | | | | | | | | | | Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra20: fdt: add SPI SFLASH nodeAllen Martin2013-02-11-0/+17
| | | | | | | | | | | | | | Add node for tegra20 SPI SFLASH controller to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: don't hard-code LCD into default TEGRA_DEVICE_SETTINGSStephen Warren2013-02-11-2/+9
| | | | | | | | | | | | | | | | | | Only add "lcd" into TEGRA_DEVICE_SETTINGS if CONFIG_VIDEO_TEGRA. Otherwise, "lcd" is meaningless. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: rename FUNCMUX_UART2_UARTBStephen Warren2013-02-11-4/+4
| | | | | | | | | | | | | | | | | | FUNCMUX_ defines should be named after the pin groups they affect, not after the module they're muxing onto those pin groups. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra: Move common clock code to arch/arm/cpu/tegra-common/clock.cTom Warren2013-02-11-1188/+768
| | | | | | | | | | | | | | | | | | This 'commonizes' much of the clock/pll code. SoC-dependent code and tables are left in arch/cpu/tegraXXX-common/clock.c Some T30 tables needed whitespace fixes due to checkpatch complaints. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra: T20: Remove unused 'SLOW' SoC ID and PLLX table entryTom Warren2013-02-11-8/+0
| | | | | | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: fdt: add back missing host1x nodeAllen Martin2013-02-11-0/+11
| | | | | | | | | | | | | | | | Add back host1x node to seaboard dts file. This got dropped during the tegra fdt sort. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * am33xx: Drop gpio0_7_pin_mux from phytec pcm051Tom Rini2013-02-07-5/+0
| | | | | | | | | | | | | | | | This mux is not currently used and appears to be a carry-over from the am335x evm code. Acked-by: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com>
| * OMAP3: igep00x0: fix a build warning on IGEP boardsJavier Martinez Canillas2013-02-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | commit b689cd5 OMAP3: use a single board file for IGEP devices introduced the following build warning: igep00x0.h:168:24: warning: backslash-newline at end of file [enabled by default] This patch fixes the issue. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
| * AM335X: Set fdt_high for AM335X devices to enable booting with Device Treehvaibhav@ti.com2013-02-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For AM335X boards, such as the EVM and Bone Linux kernel fails to locate the device tree blob on boot. The reason being is that u-boot is copying the DT blob to the upper part of RAM when booting the kernel and the kernel is unable to access the blob. By setting the fdt_high variable to 0xffffffff (to prevent the copy) the kernel is able to locate the DT blob and boot. This patch is tested on BeagleBone platform. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tom Rini <trini@ti.com>
| * Add DDR3 support for AM335x-EVM (Version 1.5A)Jeff Lance2013-02-07-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the DDR3 chip. [Hebbar Gururaja <gururaja.hebbar@ti.com>] - Resolve merge conflict while rebasing. File structure is changed in the mainline. So re-arrange the code accordingly. - Update commit message to reflect the DDR3 part number Signed-off-by: Jeff Lance <j-lance1@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
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