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* i.MX video: struct fb_videomode can be constEric Nelson2012-10-16-4/+8
| | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX: declare iomux_v3_cfg_t arrays as constEric Nelson2012-10-16-27/+27
| | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX: iomux: input pad array can be constEric Nelson2012-10-16-3/+5
| | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Stefano Babic <sbabic@denx.de>
* mx6qsabreauto: Pass the board revision to the kernelFabio Estevam2012-10-16-2/+52
| | | | | | | | | | | The kernel from Freescale expects that the bootloader passes the board revision. Read the board revision and pass it via get_board_rev(). Without passing the board revision the kernel does not operate properly as the initialization of peripherals are different in revA versus revB boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6qsabreauto: Change mmcroot so it works out of boxOtavio Salvador2012-10-16-2/+4
| | | | | | | | The mmcroot setting vary between mx6qsabreauto and mx6qsabresd so we move this to the board configuration file. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* mxc: Fix SDHC multi-instance clockBenoît Thébaudeau2012-10-16-2/+40
| | | | | | | | | | | | | | | | | | On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not suitable for the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). This patch fixes this issue by adding a configuration field for the SDHC input clock frequency. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Andy Fleming <afleming@gmail.com>
* mx35: Fix eSDHC clocksBenoît Thébaudeau2012-10-16-3/+15
| | | | | | | | | | | | | | Each eSDHC instance has a dedicated clock. gd->sdhc_clk must also be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
* mx35: Clean up lowlevel_initBenoît Thébaudeau2012-10-16-279/+97
| | | | | | | | | | | | Clean up mx35 lowlevel_init: - Indent with tabs. - Fix comments. - Use defined values instead of literal constants. - Use defined macros instead of duplicating code. - Use macro parameters with default values instead of #define'd configs. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* Merge branch 'agust@denx.de-next' of git://git.denx.de/u-boot-stagingTom Rini2012-10-15-19/+517
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| * bootstage: Add new bootstage IDs for board, LCDSimon Glass2012-10-03-0/+5
| | | | | | | | | | | | Add bootstage IDs for board init and LCD. Signed-off-by: Simon Glass <sjg@chromium.org>
| * bootstage: Add bootstage commandSimon Glass2012-10-03-0/+121
| | | | | | | | | | | | | | | | | | Now that there are a few features, add a bootstage command to access them. bootstage report - prints a report bootstage stash/unstash - stashes bootstage records in memory, reads them back Signed-off-by: Simon Glass <sjg@chromium.org>
| * bootstage: Add feature to stash/unstash bootstage infoSimon Glass2012-10-03-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to write the bootstage information to memory for use by a later utility, or the Linux kernel. Provide a function to do this as well as a function to read bootstage information back and incorporate it into the current table. This also makes it possible for U-Boot to chain to another U-Boot and pass on its bootstage information. Signed-off-by: Simon Glass <sjg@chromium.org>
| * bootstage: Store boot timings in device treeSimon Glass2012-10-02-6/+120
| | | | | | | | | | | | | | | | Add an option, CONFIG_BOOTSTAGE_FDT to pass boot timings to the kernel in the device tree, if available. To use this, you must have CONFIG_OF_LIBFDT defined. Signed-off-by: Simon Glass <sjg@chromium.org>
| * bootstage: Add time accumulation featureSimon Glass2012-10-02-3/+60
| | | | | | | | | | | | | | | | | | | | | | Sometimes we want to add up the amount of time spent in a particular activity when it is happening in a number of discrete chunks. Add bootstage_start() to mark the start of an acitivity and bootstage_accum() to accumulate the time since the last start. Calling these function in pairs results in the accumulated time being collected. Signed-off-by: Simon Glass <sjg@chromium.org>
| * bootstage: Export bootstage_add_record() functionSimon Glass2012-10-02-10/+23
| | | | | | | | | | | | | | This function is not static, but not exported either. Add a prototype in the header file and move the required enum to the header also. Signed-off-by: Simon Glass <sjg@chromium.org>
* | tools/env: Fix build failure from missing header includeJoe Hershberger2012-10-15-0/+1
| | | | | | | | | | | | | | | | | | | | This was introduced in: 8679d0ffdcc0beafea8e6942c0c67cf859afa18e - COMMON: Use __stringify() instead of MK_STR() The header is now needed since common.h is not included in this tool. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* | kerneldoc: Add myself to the git-mailrc for kerneldocMarek Vasut2012-10-15-0/+1
| | | | | | | | | | | | | | Add entry for kerneldoc into the git-mailrc pointing to the U-Boot ML and myself. Signed-off-by: Marek Vasut <marex@denx.de>
* | kerneldoc: Implement "Example" section handlingMarek Vasut2012-10-15-0/+3
| | | | | | | | | | | | | | | | The default kernel-doc strips starting spaces from every single line in the Example section. This makes the code look bad. Thus, implement special handling for this section. Signed-off-by: Marek Vasut <marex@denx.de>
* | kerneldoc: Add nicer CSS stylesheet for HTML docsMarek Vasut2012-10-15-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | Import basic CSS stylesheet for the HTML documentation. The base for the stylesheet is taken from: http://ds9a.nl/docbook/minimal-page.html I customized the CSS a bit further, for example to add curvy corners to example section and change the tint of gray. The HTML documentation does not look that crude anymore. Signed-off-by: Marek Vasut <marex@denx.de>
* | kerneldoc: Implant DocBook from Linux kernelMarek Vasut2012-10-15-2/+3430
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull slightly modified version of Documentation/DocBook, the related perl script scripts/kernel-doc and the scripts/docproc.c from Linux kernel and implant it into U-Boot. This will allow smooth generation of kerneldoc style documentation. It was necessary to modify the DocBook/Makefile to work with U-Boot build system. The changes were only minor though and involved replacing the kbuild specific parts. It was also necessary to replace use of variables like KERNEL_VERSION with U_BOOT_VERSION, strings like Linux kernel with U-Boot Bootloader etc. so the generated result actually matches. Finally, it was necessary to adjust docproc.c, since the documentation in U-Boot is located in doc/DocBook instead of Documentation/DocBook as is in case of the Linux kernel. Some parts of the DocBook Makefile are unused, but to allow easier sync with Linux kernel, these parts are still left in. The targets enabled now are "htmldocs" "pdfdocs" "psdocs" "xmldocs" and "cleandocs" to remove the results of documentation build. Linux scripts/docproc.c: commit f0f3ca8d967462dafb815412b14ca3339b9817a6 Date: Wed Jun 15 11:53:13 2011 +0200 Linux scripts/kernel-doc: commit 1b40c1944db445c1de1c47ffd8cd426167f488e8 Date: Sun Aug 12 10:46:15 2012 +0200 Linux Documentation/DocBook: commit bb8187d35f820671d6dd76700d77a6b55f95e2c5 Date: Thu May 17 19:06:13 2012 -0400 Signed-off-by: Marek Vasut <marex@denx.de>
* | configs: mx6qsabre_common.h: Use default clock definitionsFabio Estevam2012-10-15-2/+0
| | | | | | | | | | | | | | Since commit 50d4a707f0 (mx5/6: Define default SoC input clock frequencies) we can use the default clock values. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | mx6qsabreauto: Add Ethernet supportFabio Estevam2012-10-15-0/+75
| | | | | | | | | | | | | | | | mx6qsabreauto has a AR8031 Gigabit PHY. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | mx25: Clean up lowlevel_initBenoît Thébaudeau2012-10-15-53/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up mx25 lowlevel_init: - Add comments. - Do not use write32 repeatedly with the same value in order not to increase code size. - Make register values configurable. - Use macro parameters with default values instead of literal constants. - Use defined macros instead of duplicating code. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: John Rigby <jcrigby@gmail.com> Cc: Matthias Weisser <weisserm@arcor.de>
* | mx31: Fix PDR0_CSI_PODFBenoît Thébaudeau2012-10-15-12/+14
| | | | | | | | | | | | | | | | | | | | The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0 register is actually composed of two bit-fields: one pre-divider and one post-divider. This patch fixes the CCM access macros and the code using them accordingly. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx35: Define MAX and AIPS registersBenoît Thébaudeau2012-10-15-1/+84
| | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx31: Add more CCM access macrosBenoît Thébaudeau2012-10-15-0/+10
| | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5: Optimize lowlevel_init code sizeBenoît Thébaudeau2012-10-15-53/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimize mx5 lowlevel_init.S code size: - Compute values at compile time rather than at runtime where possible. - Assign r4 to hold the zero value rather than setting registers to 0 again and again. - Associate a function to setup_pll rather than expanding its large macro code multiple times. - Allocate constant values in section only if used. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* | mx6qsabreauto: Use ttymxc3 as consoleOtavio Salvador2012-10-15-3/+7
| | | | | | | | | | | | | | | | The mx6qsabreauto console is different than mx6qsabresd so the console configuration is now set in the board file. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
* | mx25: Fix eSDHC supportBenoît Thébaudeau2012-10-15-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MMC driver appropriate for the i.MX25 is fsl_esdhc, which has nothing to do with mxcmmc. Also, each eSDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
* | mx25: Define cpu_eth_init() only if neededBenoît Thébaudeau2012-10-15-4/+6
| | | | | | | | | | | | | | | | The FEC is the only SoC Ethernet support available on i.MX25, so define cpu_eth_init() only for it instead of returning a misleading success code. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx25: Clean up clocks APIBenoît Thébaudeau2012-10-15-9/+6
| | | | | | | | | | | | | | | | Use the standard mxc_get_clock() instead of exporting internal functions and using literal constant values. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx25 clocks: Fix MXC_FEC_CLKBenoît Thébaudeau2012-10-15-3/+2
| | | | | | | | | | | | | | | | | | | | mxc_get_clock(MXC_FEC_CLK) should return the IPG clock, not the AHB clock. Also, imx_get_fecclk() was correct but reimplemented the calculation of the IPG clock, so remove the duplicated code. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx25: Define more standard clocksBenoît Thébaudeau2012-10-15-0/+15
| | | | | | | | | | | | | | Define AHB, IPG and CSPI clocks. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx25: Clean up clock calculationsBenoît Thébaudeau2012-10-15-4/+4
| | | | | | | | | | | | | | | | Avoid possible overflow in clock calculations, and do not waste calls to lldiv() to divide simple ulongs. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx25: Fix decode_pllBenoît Thébaudeau2012-10-15-3/+6
| | | | | | | | | | | | | | | | The MFN bit-field of the PLL registers represents a signed value. See the reference manual. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5/6 clocks: Fix SDHC clocksBenoît Thébaudeau2012-10-15-1/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
* | mx51: Fix I2C clock ID checkBenoît Thébaudeau2012-10-15-1/+5
| | | | | | | | | | | | | | There are only 2 I²C instances on i.MX51, but 3 on i.MX53. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5 clocks: Fix MXC_FEC_CLKBenoît Thébaudeau2012-10-15-3/+2
| | | | | | | | | | | | | | | | | | The FEC clock does not come from PLL1, but from the IPG clock. The previous code was even inconsistent with itself, returning the IPG clock as expected for imx_get_fecclk(), but the PLL1 clock for mxc_get_clock(MXC_FEC_CLK). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5 clocks: Simplify imx_get_cspiclk()Benoît Thébaudeau2012-10-15-20/+3
| | | | | | | | | | | | | | | | | | The code handling the dividers was duplicated for each possible input clock, and this function can benefit from the newly introduced get_standard_pll_sel_clk() function instead of duplicating this mux handling code. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5 clocks: Fix get_uart_clk()Benoît Thébaudeau2012-10-15-12/+24
| | | | | | | | | | | | | | | | | | | | | | | | This function returned 66500000 instead of the correct lp_apm clock frequency if the CCM.CSCMR1.uart_clk_sel mux is set to 3. This patch fixes this issue by introducing the get_standard_pll_sel_clk() function that will be used by future patches to handle identical muxes used by many other clocks. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5 clocks: Fix get_ipg_per_clk()Benoît Thébaudeau2012-10-15-3/+7
| | | | | | | | | | | | | | | | | | | | | | This fixes the "IPG PERCLK" frequency printed by the clocks command. The issue was that get_ipg_per_clk() used periph_clk instead of lp_apm in the case CCM.CBCMR.perclk_lp_apm_sel is set. It also fixes I²C support. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5 clocks: Fix get_periph_clk()Benoît Thébaudeau2012-10-15-20/+22
| | | | | | | | | | | | | | | | | | | | In the case periph_clk comes from periph_apm_clk, the latter is selected by the CCM.CBCMR.periph_apm_sel mux, which can source the lp_apm clock from its input ♯2. get_periph_clk() returned 0 instead of the lp_apm clock frequency in this case. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5 clocks: Fix get_lp_apm()Benoît Thébaudeau2012-10-15-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | If CCM.CCSR.lp_apm is set, the lp_apm clock is not necessarily 32768 Hz x 1024. In that case: - on i.MX51, this clock comes from the output of the FPM, - on i.MX53, this clock comes from the output of PLL4. This patch fixes the code accordingly. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5 clocks: Add and use CCSR definitionsBenoît Thébaudeau2012-10-15-11/+46
| | | | | | | | | | | | | | This fixes config_pll_clk(), which used 0x20 instead of 0x200 for PLL4_CLOCK. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx51: Fix USB PHY clocksBenoît Thébaudeau2012-10-15-9/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX51 has a single USB PHY clock, while the i.MX53 has two. These 3 clocks have different clock gate control bit-fields. The existing code was correct only for i.MX53, so this patch fixes the i.MX51 use case. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Jana Rapava <fermata7@gmail.com> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il>
* | mx5: Fix clock gate valuesBenoît Thébaudeau2012-10-15-12/+18
| | | | | | | | | | | | | | | | | | The clock gate values are 2-bit bit-fields. Hence, setting or clearing only one of these bits like what was done is wrong and can lead to unpredictable behavior depending on the original value of these bit-fields. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5: Use explicit clock gate namesBenoît Thébaudeau2012-10-15-12/+284
| | | | | | | | | | | | | | | | Use clock gate definitions having names showing clearly the gated clock instead of names giving only a register field index. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5 clocks: CleanupBenoît Thébaudeau2012-10-15-152/+184
| | | | | | | | | | | | | | | | | | | | Clean up the i.MX5 clock driver: - Use readl() and writel() instead of their __raw_ counterparts. - Use the clr/setbits_le32() family of macros rather than expanding code. - Use accessor macros for bit-fields instead of _MASK and _OFFSET. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | mx5/6: Define default SoC input clock frequenciesBenoît Thébaudeau2012-10-15-64/+64
| | | | | | | | | | | | | | | | | | | | | | Define default SoC input clock frequencies for i.MX5/6 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | imx: Use MXC_I2C_CLK in imx i2c driverMatthias Weisser2012-10-15-2/+10
| | | | | | | | | | | | | | | | i2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now using MXC_I2C_CLK on all imx systems using i2c. Signed-off-by: Matthias Weisser <weisserm@arcor.de> Acked-by: Stefano Babic <sbabic@denx.de>
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