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* ENGR00264076-5 i.mx6:shutdown vddpu and pcie phy to save powerJason Liu2013-05-24-0/+30
| | | | | | | shutdown vddpu and pcie phy to save power Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00264076-3 i.mx6:gate/ungate PFD before using itJason Liu2013-05-24-0/+38
| | | | | | | | | Per the IC design, we need to gate/ungate all the unused PFDs to make sure PFD is working correctly, otherwise, PFDs may not not output clock after reset. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00264076-2 i.mx6:Add the CPU temperature supportJason Liu2013-05-24-3/+692
| | | | | | | | The patch add the CPU thermal temperature support. Use universal equation for all i.MX6 series SOCs. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00264076-1 i.mx6:reset LDOs step_timeJason Liu2013-05-24-1/+9
| | | | | | | | | | | | | ROM may modify CORE's LDO step_time settings according to the fuse setting for safe, reset them to the default value.Reset it to 0'b00. 0'b00: 64 cycles of 24M clock; 0'b01: 128 cycles of 24M clock; 0'b02: 256 cycles of 24M clock; 0'b03: 512 cycles of 24M clock; Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00263306 imx6q: put CONFIG_SYS_NAND out of the common configJason Liu2013-05-22-2/+2
| | | | | | | Since Sabresd board does not have NAND, we need put CONFIG_SYS_NAND into the Sabreauto board only. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00263305-14 i.mx6:sabreauto: Add the GPMI nand supportJason Liu2013-05-21-4/+102
| | | | | | Add the GPMI nand support Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00263305-13 mtd: mxs_nand: Add support for i.MX6Stefan Roese2013-05-21-2/+26
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* ENGR00263305-12 dma: Add i.MX6 support to drivers/dma/apbh_dma.cStefan Roese2013-05-21-2/+33
| | | | | | | | | This will be used by the i.MX6 NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* ENGR00263305-11 imx: Move some i.MX common functions into the imx-common ↵Stefan Roese2013-05-21-64/+102
| | | | | | | | | | | | | | | | | | | | directory This patch moves the following functions into the imx-common directory: - mxs_wait_mask_set() - mxs_wait_mask_clr() - mxs_reset_block() These are currently used by i.MX28. But the upcoming GPMI NAND port for i.MX6 will also use these functions. So lets move them to a common location to re-use them. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* ENGR00263305-10 imx: Move some header files from arch-mxs to imx-commonStefan Roese2013-05-21-24/+27
| | | | | | | | | | | | | | | | | | | The following headers are moved to a i.MX common location: - regs-common.h - regs-apbh.h - regs-bch.h - regs-gpmi.h - dma.h This way this header can be re-used also by other i.MX platforms. For example the i.MX6 which will need it for the upcoming NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* ENGR00263305-9 i.mx6q/dl/solo:sabreauto: Add the WEIM-NOR supportJason Liu2013-05-21-3/+119
| | | | | | Add the WEIM-NOR support Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00263305-8 i.mx6q/dl/solo: sabresd/sabreauto: Add the SPI-NOR supportJason Liu2013-05-21-15/+107
| | | | | | | | | This patch adds the SPI-NOR support for the i.mx6q/dl/solo:sabresd/auto board: - Support the SPI-NOR function with sf command, - Support the enviroment from SPI-NOR when CONFIG_SYS_BOOT_SPINOR Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00263305-7 i.mx6:sabreauto: Add the i.MX6solo sabreauto supportJason Liu2013-05-21-0/+123
| | | | | | | | | | | | This patch is to add the i.MX6solo sabreauto support, The i.MX6solo sabreauto board configuration has the following difference with i.MX6dl sabreauto: - DDR bus width: 32bit - DDR capacity: 1024M Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00263305-6 i.mx6:sabreauto: Add the i.MX6DL sabreauto board supportJason Liu2013-05-21-2/+149
| | | | | | | | | | | | This patch is to add the i.MX6DL sabreauto board support. i.MX6DL sabreauto board share the same design with i.MX6Q sabreauto board except the SOC difference. The DDR script has been updated to the v0.2 version from ddr-scripts-rel.git, the commit based on is: bfd157a Updated MX6DL and MX6DQ ARD and SabreSD scripts Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00263305-5 i.mx6q:sabreauto: rename the imximage.cfg to i.mx6q.cfgJason Liu2013-05-21-2/+2
| | | | | | | Rename the imximage.cfg to i.mx6q.cfg. No function change at all. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00263305-4 i.mx6:sabresd: Add the i.MX6solo sabresd supportJason Liu2013-05-21-0/+123
| | | | | | | | | | | | This patch is to add the i.MX6solo sabre-sd support, The i.MX6solo sabre-sd board configuration has the following difference with i.MX6dl sabre-sd: - DDR bus width: 32bit - DDR capacity: 512M Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00263305-3 i.mx6:sabresd: Add the initial i.MX6dl sabresd board supportJason Liu2013-05-21-133/+1810
| | | | | | | | | | This patch is to add the initial Freescale i.MX6dl sabresd board support. - The DDR script has been updated to the v1.5 version from ddr-scripts-rel commit: bfd157a Updated MX6DL and MX6DQ ARD and SabreSD scripts. - i.mx6dl sabre-sd board shared the same design with i.mx6q sabre-sd board except the SOC is different.Thus, we can use the same board file. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00263305-2 i.mx:i.mx6q: factor out the common iomux pad ctrl definitionJason Liu2013-05-21-27/+29
| | | | | | | This patch is to factor out the common iomux pad ctrl definition. No function change at all. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00263305-1 i.mx:i.mx6q: make preparation for the i.mx6dl supportJason Liu2013-05-21-15/+12
| | | | | | | | | | | | | | This patch is to make preparation for the i.mx6dl support - Move CONFIG_MX6Q definition out of the mx6qsabre_common.h file - Include the mx6_pins.h instead of the mx6q_pins.h in board file, - Make the CPU configure by using the boards.cfg file - Make the DDR size configurable based on the boards.cfg. - Make the FDT file configurable based on the boards.cfg. There is no function change with this patch. Signed-off-by: Jason Liu <r64343@freescale.com>
* Prepare v2013.04Tom Rini2013-04-19-1/+1
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* crc32: Correct endianness of crc32 resultSimon Glass2013-04-19-1/+4
| | | | | | | | | | | | | | | | | | | When crc32 is handled by the hash library, it requires the data to be in big-endian format, since it reads it byte-wise. Thus at present the 'crc32' command reports incorrect data. For example, previously we might see: Peach # crc32 40000000 100 CRC32 for 40000000 ... 400000ff ==> 0d968558 but instead with the hash library we see: Peach # crc32 40000000 100 CRC32 for 40000000 ... 400000ff ==> 5885960d Correct this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@google.com>
* patman: fix gitutil for decorationsAndreas Bießmann2013-04-18-4/+7
| | | | | | | | | The git config parameter log.decorate is quite useful when working with git. Patman, however can not handle the decorated output when parsing the commit. To prevent this use the '--no-decorate' switch for git-log. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-arm into HEADTom Rini2013-04-18-92/+467
|\ | | | | | | | | | | | | | | | | | | Quick manual fixup to merge the USB boot related defines and TPM related defines. Conflicts: include/configs/exynos5250-dt.h Signed-off-by: Tom Rini <trini@ti.com>
| * exynos: fdt: Add TMU node for snowSimon Glass2013-04-17-0/+14
| | | | | | | | | | | | | | | | Snow is missing a TMU node, and with TMU support this is not allowed, so it fails to boot. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: Correct use of 64-bit divisionSimon Glass2013-04-17-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | The current code is causing errors like this on my toolchains: /usr/x86_64-pc-linux-gnu/armv7a-cros-linux-gnueabi/binutils-bin/2.22/ ld.bfd.real: failed to merge target specific data of file /usr/lib/gcc/ armv7a-cros-linux-gnueabi/4.7.x-google/libgcc.a(_divdi3.o) Use do_div() to avoid this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos5: Add support for USB download boot modeVivek Gautam2013-04-17-2/+43
| | | | | | | | | | | | | | | | | | | | | | | | Exynos5250 supports secondary USB device boot mode. If the iROM fails to download u-boot from the primary boot device (such as SD or eMMC), it will try to retrieve from the secondary boot device (such as USB). Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Tegra: T30: Beaver board support.Tom Warren2013-04-15-0/+149
| | | | | | | | | | | | | | | | Beaver is a Tegra30 board that is nearly 100% compatible w/Cardhu. Add a Beaver build so it can begin to be differentiated, if need be. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * Tegra: Split tegra_get_chip_type() into soc & sku funcsTom Warren2013-04-15-37/+84
| | | | | | | | | | | | | | | | | | | | | | As suggested by Stephen Warren, use tegra_get_chip() to return the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true function, i.e. tegra_get_chip_sku(), which returns an ID like TEGRA_SOC_T25, TEGRA_SOC_T33, etc. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * Tegra: Fix MSELECT clock divisors for T30/T114.Tom Warren2013-04-15-8/+6
| | | | | | | | | | | | | | | | | | A comparison of registers between our internal NV U-Boot and u-boot-tegra/next showed some discrepancies in the MSELECT clock divisor programming. T20 doesn't have a MSELECT clk src reg. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * Tegra114: Initialize System Counter (TSC) with osc frequencyTom Warren2013-04-15-0/+72
| | | | | | | | | | | | | | | | | | T114 needs the SYSCTR0 counter initialized so the TSC can be read by the kernel. Do it in the bootloader since it's a write-once deal (secure/non-secure mode dependent). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * Tegra: Configure L2 cache control reg properly.Tom Warren2013-04-15-8/+52
| | | | | | | | | | | | | | | | | | | | Without this change, kernel fails at calling function cache_clean_flush during kernel early boot. Aprocryphally, intended for T114 only, so I check for a T114 SoC. Works (i.e. dalmore 3.8 kernel now starts printing to console). Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra: TEC: Enable boot script supportThierry Reding2013-04-15-7/+3
| | | | | | | | | | | | | | | | | | | | Boot script support brings TEC in line with other Tegra boards. To enable booting a Linux kernel with initial ramdisk, also include support for the new FIT image type. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * Tegra: Plutux: Enable NAND and boot script supportThierry Reding2013-04-15-7/+11
| | | | | | | | | | | | | | | | | | | | Boot script support brings Plutux in line with other Tegra boards. In order to enable booting a Linux kernel with initial ramdisk, also add support for the new FIT image type. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * Tegra: Medcom-Wide: Enable NAND and boot script supportThierry Reding2013-04-15-9/+12
| | | | | | | | | | | | | | | | | | | | Boot script support brings Medcom-Wide in line with other Tegra boards. In order to enable booting a Linux kernel with initial ramdisk, also add support for the new FIT image type. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * Tegra: All Tamonten-derived boards use onboard NANDThierry Reding2013-04-15-11/+11
| | | | | | | | | | | | | | | | | | Move the nand-controller node to the tegra20-tamonten.dtsi so that it can be shared between all derived boards. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * Tegra: Restore cp15 VBAR _start vector write for ARMv7Tom Warren2013-04-15-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | A start vector fix was added by AneeshV for OMAP4 (commit 0d479b53), and caused the old monilithic Tegra builds to hang due to an undefined instruction trap. Previously, the code needed to run on both the AVP (ARM7TDI) and A9, and the AVP doesn't have a CP15 register. I corrected this in commit 6d6c0bae w/#ifndef CONFIG_TEGRA, but now that we use SPL, and boot the AVP w/o any ARMv7 code, I can revert my change, and make Aneesh's change apply to Tegra. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Tegra: enable verify support for the crc32 commandTom Warren2013-04-15-0/+2
| | | | | | | | | | | | | | Some 3rd-party flash tools use the -v (verify) option of crc32 command. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * ARM: tegra: support T33 SKU of Tegra30Stephen Warren2013-04-15-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make U-Boot aware of the T33 SKU of Tegra30, and treat it identically to any other Tegra30. An alternative would be to simply remove the SKU checking from tegra_get_chip_type(); most use of the value most likely simply wants to know the current chip, not the specific SKU. Or, the function could be split into separate tegra_get_chip() and tegra_get_sku() for the cases where differentiation really is required. I wonder whether tegra_get_chip_type() should printf() whenever any unkown chip/SKU is found, although perhaps the function is called so early that the printf() wouldn't actually make it to the UART anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | fdt: Ensure that libfdt_env.h comes from U-BootSimon Glass2013-04-17-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When building host utilities, we include libfdt.h from the host, not from U-Boot. This in turn brings in libfdt_env.h from the host, which can mess up the types and cause a build failure, depending on the host environment. To fix this, force inclusion of U-Boot's libfdt_env.h so that the types are correct. Another way to fix this is to use -nostdinc and -idirafter to ensure that system includes are included after U-Boot ones. Unfortunately this means that U-Boot's errno.h gets included instead of the system one. This in turn requires a hack to errno.h to redirect things, so all in all the solution in this patch is probably cleaner. Signed-off-by: Simon Glass <sjg@chromium.org>
* | mmc: check the revision for sd3.0Jaehoon Chung2013-04-17-0/+3
| | | | | | | | | | | | | | | | Support to check whether the SD3.0 or not. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Rommel Custodio <sessyargc@gmail.com>
* | mmc: support the correct card version for eMMCJaehoon Chung2013-04-17-9/+32
| | | | | | | | | | | | | | | | | | | | | | eMMC vesrion is supported up to v4.5. But bootloader isn't saw the exact eMMC version. After applied this patch, if use the mmcinfo command, then can see the exactly mmc version. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Rommel Custodio <sessyargc@gmail.com>
* | printenv: Correct out-of-memory condition check.Maxime Larocque2013-04-17-1/+2
| | | | | | | | | | | | | | | | | | | | | | In common/cmd_nvedit.c, en env_print(), the wrong type is used for len. hexport_r() returns -1 on error (like OOM), which is converted to 0xffffffff when put in an unsigned. Said value is obviously bigger then 0, and as a result an uninitialized string is then displayed. Other usages of hexport_r() in the code correctly uses ssize_t to keep its return value. Signed-off-by: Maxime Larocque <maxmtl2002@yahoo.ca>
* | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2013-04-16-7/+9
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| * | x86: config: Init PCI before SPISimon Glass2013-04-15-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since the ICH SPI controller uses PCI, we must ensure that PCI is available before it is inited. This fixes the current "ICH SPI: Cannot find device" message on boot. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Allow setup code to manage its own global dataSimon Glass2013-04-15-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently x86 has its own means of managing the global data and board data (bd_t), and this code resides in start.S. With generic board, we need to ensure that we leave this alone - i.e. don't clear it as we do on other archs. This fixes a problem where the memory init data is cleared which causes the video driver to operate very slowly. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Fix DRAM bank size init with generic boardSimon Glass2013-04-15-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The intention of the memory init code is that it should work the same with CONFIG_SYS_GENERIC_BOARD and without. This is tricky because dram_init() is called prior to relocation with generic board (matching other archs) and after relocation without generic board. Adjust the init sequence so that dram_init() is not called in the generic board case, which seems like the easiest fix for now. Also ensure that relocation addresses are still calculated. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-04-16-3/+7
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| * ARMv7: start.S: stay in HYP mode if u-boot is entered in itAndre Przywara2013-04-15-3/+7
| | | | | | | | | | | | | | | | | | | | The KVM and Xen hypervisors for the Cortex-A15 virtualization implementation need to be entered in HYP mode. Should the primary board firmware already enter HYP mode (Calxeda firmware does that), we should not deliberately drop back to SVC mode. Since U-boot does not use the MMU, running in HYP mode is just fine. Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
* | Prepare v2013.04-rc3Tom Rini2013-04-15-1/+1
| | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-04-15-5369/+4058
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