| Commit message (Collapse) | Author | Age | Lines |
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This patch add the support to load/save env to the slot which
was used as the boot media by dynamic detection.
The slot(usdhcx) vs real mmc dev number is board dependent:
on imx6q/dl sabresd board, the map is as the followings:
slot(USDHCx) mmc dev number
SD2(USDHC2) 0
SD3(USDHC3) 1
SD4(USDHC4) 2
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch add the support to load/save env to the slot which
was used as the boot media by dynamic detection.
Signed-off-by: Jason Liu <r64343@freescale.com>
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current the fdt_addr is just 16MB offset from the ddr base address, which
will cause the dtb will be overritten by linux kernel(include .bss section)
if the linux kernel is bigger than 16MB, which cause setup_machine_fdt
failed and thus kernel failed to boot.
This patch change the defaut fdt_addr to 128MB offset from the ddr base
address, which should be enough for common user case. user can change it
to other value according to their system needs.
Signed-off-by: Jason Liu <r64343@freescale.com>
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We need include asm/arch/mx6-pins.h now
Signed-off-by: Jason Liu <r64343@freescale.com>
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- add I2C support on Sabresd ,Sabreauto board.
- add pfuze init code based on I2C transfer in Sabre* board file.
Signed-off-by: Robin Gong <b38343@freescale.com>
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CONFIG_SYS_MMC_ENV_PART: was used to tell the u-boot which
emmc (boot)partition to be used for the env_mmc.Usually, the
emmc card will have 2 boot partitions, boot1 and boot2.
0: means user area
1: means boot partition 1
2: means boot partition 2
The patch fix the abuse of CONFIG_SYS_MMC_ENV_PART, which detached
the emmc boot partition number and the mmc partition to store the
boot image such as uImage/dtb or bootscripts.
If user want to use the boot partition to store the u-boot env, please
change the CONFIG_SYS_MMC_ENV_PART to which boot partition you want.
This patch also fixed 2 small display format issue for CONFIG_LOADADDR
and CONFIG_SYS_TEXT_BASE.
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch update the DDR script to the ddr-scripts-rel.git
based on the top of the following commit:
7cd1c3b Removed the duplicate script files
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch update the DDR script to the ddr-scripts-rel.git
based on the top of the following commit:
7cd1c3b Removed the duplicate script files
Signed-off-by: Jason Liu <r64343@freescale.com>
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- change the CONFIG_MMCROOT to SDHC3(sd3)
- make the mmcdev/part independent of ENV_IS_IN_MMC
Signed-off-by: Jason Liu <r64343@freescale.com>
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shutdown vddpu and pcie phy to save power
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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Per the IC design, we need to gate/ungate all the unused PFDs
to make sure PFD is working correctly, otherwise, PFDs may not
not output clock after reset.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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The patch add the CPU thermal temperature support.
Use universal equation for all i.MX6 series SOCs.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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ROM may modify CORE's LDO step_time settings according to the fuse
setting for safe, reset them to the default value.Reset it to 0'b00.
0'b00: 64 cycles of 24M clock;
0'b01: 128 cycles of 24M clock;
0'b02: 256 cycles of 24M clock;
0'b03: 512 cycles of 24M clock;
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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Since Sabresd board does not have NAND, we need put CONFIG_SYS_NAND
into the Sabreauto board only.
Signed-off-by: Jason Liu <r64343@freescale.com>
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Add the GPMI nand support
Signed-off-by: Jason Liu <r64343@freescale.com>
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Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
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This will be used by the i.MX6 NAND support.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
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directory
This patch moves the following functions into the imx-common
directory:
- mxs_wait_mask_set()
- mxs_wait_mask_clr()
- mxs_reset_block()
These are currently used by i.MX28. But the upcoming GPMI NAND port
for i.MX6 will also use these functions. So lets move them to a
common location to re-use them.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
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The following headers are moved to a i.MX common location:
- regs-common.h
- regs-apbh.h
- regs-bch.h
- regs-gpmi.h
- dma.h
This way this header can be re-used also by other i.MX platforms.
For example the i.MX6 which will need it for the upcoming NAND
support.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
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Add the WEIM-NOR support
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch adds the SPI-NOR support for the i.mx6q/dl/solo:sabresd/auto board:
- Support the SPI-NOR function with sf command,
- Support the enviroment from SPI-NOR when CONFIG_SYS_BOOT_SPINOR
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch is to add the i.MX6solo sabreauto support,
The i.MX6solo sabreauto board configuration has the following
difference with i.MX6dl sabreauto:
- DDR bus width: 32bit
- DDR capacity: 1024M
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch is to add the i.MX6DL sabreauto board support.
i.MX6DL sabreauto board share the same design with i.MX6Q
sabreauto board except the SOC difference.
The DDR script has been updated to the v0.2 version from
ddr-scripts-rel.git, the commit based on is:
bfd157a Updated MX6DL and MX6DQ ARD and SabreSD scripts
Signed-off-by: Jason Liu <r64343@freescale.com>
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Rename the imximage.cfg to i.mx6q.cfg.
No function change at all.
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch is to add the i.MX6solo sabre-sd support,
The i.MX6solo sabre-sd board configuration has the following
difference with i.MX6dl sabre-sd:
- DDR bus width: 32bit
- DDR capacity: 512M
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch is to add the initial Freescale i.MX6dl sabresd board support.
- The DDR script has been updated to the v1.5 version from ddr-scripts-rel
commit: bfd157a Updated MX6DL and MX6DQ ARD and SabreSD scripts.
- i.mx6dl sabre-sd board shared the same design with i.mx6q sabre-sd board
except the SOC is different.Thus, we can use the same board file.
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch is to factor out the common iomux pad ctrl definition.
No function change at all.
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch is to make preparation for the i.mx6dl support
- Move CONFIG_MX6Q definition out of the mx6qsabre_common.h file
- Include the mx6_pins.h instead of the mx6q_pins.h in board file,
- Make the CPU configure by using the boards.cfg file
- Make the DDR size configurable based on the boards.cfg.
- Make the FDT file configurable based on the boards.cfg.
There is no function change with this patch.
Signed-off-by: Jason Liu <r64343@freescale.com>
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Signed-off-by: Tom Rini <trini@ti.com>
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When crc32 is handled by the hash library, it requires the data to be in
big-endian format, since it reads it byte-wise. Thus at present the 'crc32'
command reports incorrect data. For example, previously we might see:
Peach # crc32 40000000 100
CRC32 for 40000000 ... 400000ff ==> 0d968558
but instead with the hash library we see:
Peach # crc32 40000000 100
CRC32 for 40000000 ... 400000ff ==> 5885960d
Correct this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@google.com>
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The git config parameter log.decorate is quite useful when working with git.
Patman, however can not handle the decorated output when parsing the commit.
To prevent this use the '--no-decorate' switch for git-log.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Quick manual fixup to merge the USB boot related defines and TPM related
defines.
Conflicts:
include/configs/exynos5250-dt.h
Signed-off-by: Tom Rini <trini@ti.com>
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Snow is missing a TMU node, and with TMU support this is not allowed, so it
fails to boot. Add it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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The current code is causing errors like this on my toolchains:
/usr/x86_64-pc-linux-gnu/armv7a-cros-linux-gnueabi/binutils-bin/2.22/
ld.bfd.real: failed to merge target specific data of file /usr/lib/gcc/
armv7a-cros-linux-gnueabi/4.7.x-google/libgcc.a(_divdi3.o)
Use do_div() to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Exynos5250 supports secondary USB device boot mode. If the iROM fails
to download u-boot from the primary boot device (such as SD or eMMC),
it will try to retrieve from the secondary boot device (such as USB).
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Beaver is a Tegra30 board that is nearly 100% compatible w/Cardhu.
Add a Beaver build so it can begin to be differentiated, if need be.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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As suggested by Stephen Warren, use tegra_get_chip() to return
the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for
Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true
function, i.e. tegra_get_chip_sku(), which returns an ID like
TEGRA_SOC_T25, TEGRA_SOC_T33, etc.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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A comparison of registers between our internal NV U-Boot and
u-boot-tegra/next showed some discrepancies in the MSELECT
clock divisor programming. T20 doesn't have a MSELECT clk src reg.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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T114 needs the SYSCTR0 counter initialized so the TSC can be
read by the kernel. Do it in the bootloader since it's a write-once
deal (secure/non-secure mode dependent).
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Without this change, kernel fails at calling function cache_clean_flush
during kernel early boot.
Aprocryphally, intended for T114 only, so I check for a T114 SoC.
Works (i.e. dalmore 3.8 kernel now starts printing to console).
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Boot script support brings TEC in line with other Tegra boards. To
enable booting a Linux kernel with initial ramdisk, also include support
for the new FIT image type.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Boot script support brings Plutux in line with other Tegra boards. In
order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Boot script support brings Medcom-Wide in line with other Tegra boards.
In order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Move the nand-controller node to the tegra20-tamonten.dtsi so that it
can be shared between all derived boards.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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A start vector fix was added by AneeshV for OMAP4 (commit 0d479b53),
and caused the old monilithic Tegra builds to hang due to an undefined
instruction trap. Previously, the code needed to run on both the
AVP (ARM7TDI) and A9, and the AVP doesn't have a CP15 register.
I corrected this in commit 6d6c0bae w/#ifndef CONFIG_TEGRA, but
now that we use SPL, and boot the AVP w/o any ARMv7 code, I can
revert my change, and make Aneesh's change apply to Tegra.
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Some 3rd-party flash tools use the -v (verify) option of crc32 command.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Make U-Boot aware of the T33 SKU of Tegra30, and treat it identically
to any other Tegra30.
An alternative would be to simply remove the SKU checking from
tegra_get_chip_type(); most use of the value most likely simply wants
to know the current chip, not the specific SKU. Or, the function could
be split into separate tegra_get_chip() and tegra_get_sku() for the
cases where differentiation really is required.
I wonder whether tegra_get_chip_type() should printf() whenever any
unkown chip/SKU is found, although perhaps the function is called so
early that the printf() wouldn't actually make it to the UART anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
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When building host utilities, we include libfdt.h from the host, not from
U-Boot. This in turn brings in libfdt_env.h from the host, which can mess
up the types and cause a build failure, depending on the host environment.
To fix this, force inclusion of U-Boot's libfdt_env.h so that the types
are correct.
Another way to fix this is to use -nostdinc and -idirafter to ensure that
system includes are included after U-Boot ones. Unfortunately this means
that U-Boot's errno.h gets included instead of the system one. This in
turn requires a hack to errno.h to redirect things, so all in all the
solution in this patch is probably cleaner.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Support to check whether the SD3.0 or not.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Rommel Custodio <sessyargc@gmail.com>
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eMMC vesrion is supported up to v4.5.
But bootloader isn't saw the exact eMMC version.
After applied this patch,
if use the mmcinfo command, then can see the exactly mmc version.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Rommel Custodio <sessyargc@gmail.com>
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