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* ENGR00174055: i.mx6dl: ddr: update ddr script to 400M_64bit_v1.1Jason Liu2012-02-09-14/+14
| | | | | | | | | The script we get from the following link: http://compass.freescale.net/livelink/livelink/225193471/MX6DL_init_ DDR3_400MHz_64bit_1.1.inc.txt?func=doc.Fetch&nodeid=225193471 Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00173966-4: ARM2: add initial support for i.mx6sdlJason Liu2012-02-07-28/+489
| | | | | | | | | | | | | | | | | This patch add the initial support for i.mx6dl ARM2 board -SD/MMC basic -DDR 400Mhz, -FEC,basic Due to i.mx6dl shares the same board with i.mx6q on ARM2, the most common code should be the same as the i.mx6q ARM2 So, no need to create one seperate board file for i.mx6dl. But We can't simply resue anything from the board file since the i.mx6dl iomux is changed and thus we have to deal with the difference between i.mx6q and i.mx6dl for the pad setting part. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00173966-3: ARM2: i.mx6dl: add the DDR scriptJason Liu2012-02-07-3/+133
| | | | | | | | | integrate DDR script http://compass.freescale.net/livelink/ livelink/225147268/rigel_temp.inc.txt?func=doc.Fetch &nodeid=225147268 Signed-off-by: Lily Zhang <r58066@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00173966-2: fec: add i.mx6dl supportJason Liu2012-02-07-5/+5
| | | | | | | This patch add i.mx6dl support for fec driver i.mx6dl and i.mx6dq shares the same ENET IP. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00173966-1: i.mx6dl: add the iomux head fileJason Liu2012-02-07-0/+3717
| | | | | | | | | | | Checkpatch will throw some warnings in iomux-mx6dl.h file as: WARNING: line over 80 characters But for the readable, I intend not to fix these warnings, and linux/uboot upstream also has so many such kind of cases Acked-by: Lily Zhang <r58066@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00173659 MX6Q_UART Change Phyisical to Virtural Port MappingEric Sun2012-02-03-12/+12
| | | | | | | For ARM2 and Sabreauto, change TTY0 to TTY3 (which is physical UART4) For SabreSD, Change TTY3 to TTY0 (which is physical UART1) Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00173579 Revert FEC: Fix FEC cannot load kernel accroding tftp.Alan Tull2012-02-02-3/+0
| | | | | | | | | | Revert "ENGR00162937 - FEC: Fix FEC cannot load kernel accroding tftp." That commit only worked on specific networks. It broke BOOTP on other networks. This reverts commit 51aa554b0655fb10cb7904071e7bb141042390b2. Signed-off-by: Alan Tull <r80115@freescale.com>
* ENGR00172343 Add suport for i.MX 6Q Sabre Smart DeviceNancy Chen2012-01-24-3/+1920
| | | | | | | | Add suport for i.MX 6Quad SABRE Smart Device. Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com> Signed-off-by: Tony Lin <tony.lin@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com>
* ENGR00172541 Delete bootcmd_base from the MX6 Sabre-lite configMahesh Mahadevan2012-01-23-4/+2
| | | | | | | Update the config to delete bootcmd_base from the default env settings for Sabre-lite Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00172490: FIX: PMIC registers may not be accessible in u-boot via SPIRobby Cai2012-01-20-2/+6
| | | | | | | | | | | | | | | | The system PMIC registers may not be accessible in u-boot via SPI if function pmic_reg() is called in the latter part of boot up process in u-boot. It is because the imx_spi_slave structure is allocated from malloc() in the spi_setup_slave() function. However, this structure is not completely initialized, which may result in using a dirty control register value at CSPI during transfer. memset() the imx_spi_slave structure after malloc() can resolve this problem Please refer to CT39243849. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00171968 mx6q sabrelite: fixup the sabrelite default bootargs typoXinyu Chen2012-01-13-1/+1
| | | | | | change default console to ttymxc1 Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
* ENGR00171771 [MX6]Need to power down PCIe by defaultAnson Huang2012-01-12-1/+7
| | | | | | | PCIe is power on by defaultt, we need to power down it in u-boot, it can save more than 1mW during suspend. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00171872 Android: update sabrelite default config fix a typo.Zhang Jiejing2012-01-12-1/+1
| | | | | | Fix a typo in default config. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00171633 MX6Q: config: android: update default config.Zhang Jiejing2012-01-12-10/+10
| | | | | | | | | | 1. C macro don't eval, so the rd_loadaddr will be (CONFIG_LOADADDR + 0x300000) rather then number, will cause uboot can't boot, change this to a number which make default boot env correct. 2. update android mx6q saberlite config to align lastest code status. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00171622 - FEC : workaround for Gb enet in sabrelite board.Fugang Duan2012-01-11-3/+3
| | | | | | | | Micrel phy KSZ9021 Gb speed cannot work well in i.MX6 sabrelite board. Advertise phy is not 1000Base-T capable, and enet can work well at 100Mbps mode in 1000M environment(1G cable & 1G hub). Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00171115 add fec support in mx6q sabreauto boardHake Huang2011-12-31-38/+28
| | | | | | | | | | Add fec support for sabreauto board Need hardware rework: 1. Add R450 10.0k 2. Remove R1105 1k 3. short Pin 1,2 of u516, will impact CAN1 Signed-off-by: Hake Huang <b20222@freescale.com>
* ENGR00171091 [MX6]Remove workaround for reset issueAnson Huang2011-12-30-25/+0
| | | | | | | The root cause is the L1 I-cache need invalidation, now we don't need this workaround, so remove it. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00171008 MX6Q/MFGTOOL : disable the workaround for MFGTOOLHuang Shijie2011-12-28-7/+4
| | | | | | Disable the uboot workaround. It will crash the MFGTOOL. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00170876 Android: align boot commands with user guide.Zhang Jiejing2011-12-23-3/+3
| | | | | | Align latest boot command with user guide. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00170837 [MX6]Add temperatuer check into ubootAnson Huang2011-12-22-0/+103
| | | | | | | | | We need to check CPU temperature in uboot, if cpu is too hot, we will let it waiting there until cpu temperature drop to save region, then go on boot up. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00170768 Android: Fix fastboot can't used on MX6Q SL MMC1 device.Zhang Jiejing2011-12-21-3/+13
| | | | | | | | | | | Fix fastboot can't used on mmc1 device on android. caused by the mmc part number use strtoul but it need the partition number < 0 . So this caused such error. Fixed by change strtoul to strtol. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00162642: Fix bug in setting VDDSOC voltageRanjani Vaidyanathan2011-12-20-2/+2
| | | | | | Fix incorrect VDDSOC voltage setting in uboot. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
* ENGR00160621 [MX6]Workaround for reset issueAnson Huang2011-12-20-0/+25
| | | | | | | | | | | | | | | | | | | Add workaround for POR/wdog reset issue, we need to do a CORE LDO reset everytime POR/wdog reset, otherwise kernel will crash or hang when we booting more than 2 cores. Root cause is still under investigation, it is analog/power related issue, may take long time to identify the root cause, we need to add workaround to make function ready first. The flow of workaround is as below: 1. Check CORE LDO reset flag, currently stored in SNVS_LPGPR[0]; 2. If it is there, clear it, go on boot up system; If not, Set the flag, configure wdog to timeout in 0.5 seconds, then disable CORE LDO and wait for wdog timeout; This workaround will bring 0.5~1 seconds delay of booting. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00163697 - FEC : Adjust MX53 Network stream throughput.Fugang Duan2011-12-20-0/+550
| | | | | | | | | | | | | | | | | | | | | - When the system is very busy(such as play 1080p streaming in local) the WIFI & FEC performance were very low. - Enable the patch in uboot for WIFI and FEC performance: If WIFI connect to PORT2, enable the config: CONFIG_ADJUST_WIFI_FEC_PERFORMANCE CONFIG_WIFI_SDHC_PORT2 If WIFI connect to port3, enable the config: CONFIG_ADJUST_WIFI_FEC_PERFORMANCE CONFIG_WIFI_SDHC_PORT3 - The solution of the patch: I. Changing M4IF dynamic jump value to zero, which can guarantee FEC the high rate of accessing bus. II. Increase Master 4 priority for FEC. Increase Master 2 and AHBMAX priority for WIFI. - Test result: i.MX53 FEC bandwidth (1080p streaming playback in local): 47.1 Mbits/sec. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00169544 - FEC : fix "imx5x bootp command cannot work well".Fugang Duan2011-12-20-59/+55
| | | | | | | | | - "bootp" command sometime cannot work well in i.MX53 platform. - Cause: Phy detect cable link need some time, so need wait the complete of cable detect. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00170644: Enlarge mmc read size to 4M in default envTerry Lv2011-12-20-4/+4
| | | | | | | For uImage's size of mx6q is larger than 3M, we enlarge mmc read size to 4M in default env. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00170516 Enable the master mode for ENET PHY on MX6 SabreliteMahesh Mahadevan2011-12-16-2/+2
| | | | | | Fix the ENET PHY settings on MX6 Sabre-lite to enable Master mode Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00170405 Android: MX6Q_SL: Fix recovery key detectionZhang Jiejing2011-12-15-2/+1
| | | | | | | Fix recovery key detection, the VOL_DN key is low assert. Or it will always enter recovery mode. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00170372 mx6q sabrelite: make TF card as default boot mediaXinyu Chen2011-12-15-2/+2
| | | | | | | As we want TF to be default boot media. Then SD slot can be used by WIFI dongle. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
* ENGR00170299-3 Android: add android board configure file.Zhang Jiejing2011-12-15-0/+319
| | | | | | add android mx6q sabrelite configure file. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00170299-2 Android:MX6Q_SL: add board support for recovery and fastboot.Zhang Jiejing2011-12-15-0/+175
| | | | | | | add mx6q sabrelite board support for fastboot and recovery. add recovery key check, same key as in MX53_SMD. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00170299-1 Android: add support fastboot functionZhang Jiejing2011-12-15-4/+651
| | | | | | add support for otg in MX6Q uboot to enable fastboot function. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00169919 MX6Q ARM2 U-Boot : Support Pop CPU BoardEric Sun2011-12-13-3/+539
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for MX6Q ARM2 LPDDR2 POP CPU Board. Change thing include - TEXT_BASE - RAM address and size - Initialization DCD - MMU related code Use mx6q_arm2_lpddr2pop_config as the build config. After u-boot.bin is generated, set the board to serial download mode, use sb loader to run the bootloader. There is one line in the original DDR initialization script setmem /32 0x00B00000 = 0x1 however this address can not be accessed by DCD. A try to add it later in "dram_init" block the boot up. Waiting for IC team to give an explanation on it. Hold temperorily The MMU Change can be concluded as the following - Cacheable and Uncacheable SDRAM allocation changes to Phys Virtual Size Property ---------- ---------- -------- ---------- 0x10000000 0x10000000 256M cacheable 0x80000000 0x20000000 16M uncacheable 0x81000000 0x21000000 240M cacheable - TEXT_BASE change to 0x10800000, which reserves 8MB of memory at the start of SDRAM. This address makes sure that the text section of U-boot have the same Physical and Virtural address, thus the PC don't need to change when MMU is enabled. Also the text section is all allocated in cacheable memory, which may increase excecution performance. - Since this SDRAM allocation avoid overlap in physical memory between cacheable and uncacheable memory, the implementation of __ioremap can be ignored Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00169741 UBOOT : DDR3 initialization based on the MX6Q ARDPrabhu Sundararaj2011-12-12-386/+84
| | | | | | | Fix for DDR3 initialization based on the MX6Q ARD. This will reflect 2GB of RAM onboard. Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@freescale.com>
* ENGR00169655 pcba : merge i2c recovery patch to pcbaRobin Gong2011-12-09-0/+274
| | | | | | add i2c recovery function in board_lateinit,merge the patch of ENGR00163704 Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00169654 mx53_pcba: enable DDR auto-calibrationRobin Gong2011-12-07-178/+620
| | | | | | | Enabled the functioon of DDR auto-calibration in flash_header.S of HW PCBA. Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00169500 mc34708 mx53_loco: 4s power off in QS boardRobin Gong2011-12-06-0/+1
| | | | | | Implement the power off function when push the PWR key for 4s Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00163704: MX5X: add i2c recovery function in board_lateinit.Zhang Jiejing2011-12-05-0/+530
| | | | | | | | | | | | | | | | | | This patch add a i2c bus recovery function, the i2c bus busy because some device pull down the I2C SDA line. This happens when Host is reading some byte from slave, and then host is reset/reboot. Since in this case, device is controlling i2c SDA line, the only thing host can do this give the clock on SCL and sending NAK, and STOP to finish this transaction. To fix this issue: when we found SDA is low, we generate 8 clock to let device send data, then send a NAK, and STOP to finish this I2C transaction , after this the clock will be clean. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00163513 MX6Q-UBOOT : Add download_mode cmdEric Sun2011-11-30-0/+59
| | | | | | | | | | | | | Add "download_mode" command to U-Boot. It will force a system reset and let boot running in "boot from serial rom" mode, which can be used by manufacturing tool. The command will triggle a write to SRC_GPR9 and SRC_GPR10, then triggle a watchdog reset. GPR9 and GPR10 can maintain their value during the reset, the value in it make ROM to start in "boot from serial rom" mode. After that GPR9 and GPR10 are written by their original value for normal boot. Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00163370 Android: uboot: mx53_smd fix warnning messageZhang Jiejing2011-11-29-2/+2
| | | | | | Fix minor error when adding recovery related code. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00163239-2 mc34708: enable extra charging circuitRobby Cai2011-11-28-0/+11
| | | | | | | | | current schema is to enable this extra charging circuit, and then enable or disable it by checking VBatt is less or more than 3.4v. If VBatt is less than 3.4v, enable it; otherwise disable it. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00163239-1 mc34708: fix not charging issue in ubootRobby Cai2011-11-28-3/+13
| | | | | | there's some incorrect setting in spi mode, fixed in this patch. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00163040 - FEC : Fix ethernet cannot work after system sleep.Fugang Duan2011-11-25-6/+26
| | | | | | | | | | | | - Descript: Ethernet can't work in uboot and kernel DHCP throught press 'reset' key when send sleep command 'echo mem > /sys/power/state' - Cause: FEC driver will power down phy when system sleep. If just reset the board, FEC driver cannot run resume function. So, need power on phy in uboot and linux driver. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00162717 mx53_smd/mx53_loco DA9053: reset da9053 i2c and add dummy writeWayne Zou2011-11-25-66/+164
| | | | | | | | mx53_smd, mx53_loco DA9053: reset da9053 i2c by sending 9 dummy clock and start/stop when bootup and add dummy write when accessing da9053 registers. Signed-off-by: Wayne Zou <b36644@freescale.com>
* ENGR00162937 - FEC: Fix FEC cannot load kernel accroding tftp.Fugang Duan2011-11-24-0/+3
| | | | | | | | | | | - Issue description: Fec can not get ip address to download kernel if insert the cable after powering up the board more than 20 seconds. - Patch: Restart init FEC interface when net cannot get packets. The cause maybe cabel are unplugin or FEC are not ready. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00162938 MX5: Add download_mode command in uboot to enter MFG download mode.Zhang Jiejing2011-11-23-0/+49
| | | | | | | | | | | | Add download_mode command in uboot to enter MFG dowload mode , you can try download mode command in uboot and enter download mode. it first set srtc register, then before enter linux, it will clear these register to prevent the up comming watchdog reset will enter mfgtool mode. only add mx53 now. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00162874: Add enet clk change support for mx6Terry Lv2011-11-23-7/+75
| | | | | | Add enet clk change support for mx6. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00162709 Add Support for MX6Q Sabre AutoEric Sun2011-11-21-1/+2182
| | | | | | | 1. Change RAM size from 2GB to 1GB 2. Default boot from MMC Dev 2 Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00162491 Android: MX53_SMD: enter recovery mode by key.Zhang Jiejing2011-11-18-1/+16
| | | | | | | | | | | Implement a key press check on recovery mode check. User can press Vol- key to enter recovery mode when boot. Idealy, should be a combo key press together, but on SMD it only can Vol+ or Vol- but it can't press together. More usuful for user and less bug. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00162570: MX6-Increase VDDSOC_CAP voltage to 1.2VRanjani Vaidyanathan2011-11-17-0/+7
| | | | | | | | Set the VDDSOC LDO to increase the VDDSOC cap to 1.2V. This is required for correct functioning of GPU and when the ARM LDO is set to 1.225V (when ARM core is at 1GHz). Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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