| Commit message (Collapse) | Author | Age | Lines |
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The PCI ID select values on the Arcadia main board differ depending
on the version of the hardware. The standard configuration supports
Rev 3.1. The legacy target supports Rev 2.x.
Signed-off-by Randy Vinson <rvinson@mvista.com>
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Author: Randy Vinson <rvinson@linuxbox.(none)>
Enable the PCI-to-ISA bridge in the VIA Southbridge located on the
Arcadia main board.
Signed-off-by: Randy Vinson <rvinson@mvista.com>
Signed-off-by: York Sun <yorksun@freescale.com>
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Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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This patch is against u-boot-mpc85xx.git of www.denx.com
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
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This patch is against u-boot-mpc85xx.git of www.denx.com
Setting cpo to 0x9 for frequencies higher than 333MHz is verified on
both MPC8548CDS board and MPC8568MDS board, especially for supporting
533MHz DDR2.
Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for
DDR2 on all current board versions especially ver 1.92 or later to bring
up.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
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On e500 when we leave the 4k boot page we should use an absolute address since
we don't know where the board code may want us to be really running at.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The current implementation does not set the number of bank address bits
(BA) in the processor. The default assumes 2 logical bank bits. This
works fine for a DIMM that uses devices with 4 internal banks (SPD
byte17 = 0x4) but needs to be set appropriately for a DIMM that uses
devices with 8 internal banks (SPD byte17 = 0x8).
Signed-off-by: Greg Davis <DavisG@embeddedplanet.com>
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Some patches had inserted warnings into the build:
* mpc8560ads declared data without using it
* cpu_init declared ecm and immap without using it in all CONFIGs
* MPC8548CDS.h had its default filenames changed so that they contained
"\m" in the paths. Made the defaults not Windows-specific (or
anything-specific)
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Make the early L1 cache stack region guarded to prevent speculative
fetches outside the locked range.
Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions.
init.S whitespace cleanup.
Allow TEXT_BASE value to be specified on command line. This allows it
to be set to 0xfffc0000 which cuts the uboot binary in half.
Clear and enable lbc and ecm errors.
Update last_busno in device-tree for pci and pcie.
Remove load of obsolete cpu/mpc85xx/pci.0
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address.
Enable LBC and ECM errors and clear error registers.
Add tftpflash env var to get uboot from tftp server and flash it.
Add pci/pcie convenience env vars to display register space:
"run pcie3regs" to see all pcie3 ccsr registers
"run pcie3cfg" to see all cfg registers
Whitespace cleanup and MPC8544DS.h
Enable CONFIG_INTERRUPTS.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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From: Ed Swarthout <Ed.Swarthout@freescale.com>
Support external interrupts from platform to eliminate system hangs.
Define CONFIG_INTERRUPTS board configure option to enable.
Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC.
Remove extra cpu initialization redundant with hardware initialization.
Whitespace cleanup.
Define and use _START_OFFSET consistent with other processors using
ppc_asm.tmpl
Move additional code from .text to boot page to make room for
exception vectors at start of image.
Handle Machine Check, External and Critical exceptions.
Fix e500 machine check error determination in traps.c
TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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Signed-off-by: Andy Fleming <afleming@freescale.com>
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Only check for mpc8548 rev 1 when compiled for 8548.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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Allow debugger to override flash cs0/cs1 settings to enable alternate
boot regions
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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Always define MCK_EXCEPTION macro - so e500 can use it too.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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Implemented IETF RFC2090, Multicast TFTP. Initial implementation
on Realtek RTL8139 and Freescale TSEC.
Signed-off-by: David Updegraff <dave@cray.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
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Added CONFIG_BOOTP_SERVERIP to allow the tftp server to be different
from the bootp server
Signed-off-by: Wilson Callan <wcallan@savantav.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
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Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
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Merge git://www.denx.de/git/u-boot
Conflicts:
drivers/bcm570x.c
drivers/tigon3.c
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Conflicts:
MAKEALL
With any luck, this is the last MAKEALL merge conflict!
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PCI-Express sockets 1 and 2 verified working with Intel Pro/1000 PT
adapter.
Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com>
Signde-off-by: Jon Loeliger <jdl@freescale.com>
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Add support for Wind River's SBC8641D reference board.
Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Jon Loeliger <jdl@freescale.com>
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Add support for Wind River's SBC8641D reference board.
Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Jon Loeliger <jdl@freescale.com>
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Do not enable normal errors created during probe (master abort, perr,
and pcie Invalid Configuration access).
Add CONFIG_PCI_NOSCAN board option to prevent bus scan.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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Passing bars_num=0 to pciauto_setup_device should assign no bars.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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When I rebased Ed's patch and cleaned up a few compilation
problems, I apparently rebased my brain on crack first.
Fix that by doing (char *) sized pointer math as needed.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.
Include MSSSR0 in error message.
Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Calculate the data timeout based on values from the CSD instead of
just using a hardcoded DTOR value. This is a backport of a similar fix
in BSP 2.0, with one additional fix: the DTOCYC value is rounded up
instead of down.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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include/asm-avr32/div64.h was recently moved to include/div64.h, but
cpu/at32ap/interrupts.c wasn't properly updated (an earlier version of
the patch was merged perhaps?)
This patch updates cpu/at32ap/interrupts.c so that the avr32 port
compiles again.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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Also update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Wolfgang Denk
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The update procedure was modified to turn off the USB subsystem
before exit for MCC200 and TRAB. This is necessary as otherwise the
USB controller continues to write periodically to system memory!
MCC200-specific notes:
- the patch disables the magic key check for MCC200
- the patch contains the configuration changes made
for the new revision of the board.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
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protect fdt_env and fdt_bd_t invocations, fix codingstyle while in the
area.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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The last fdt patch to bootm did board setup based on the address
specified by a prior fdt address command invocation. The bootm
code, as its call to fdt_chosen does, should use the fdt specified
by the user on the bootm command. Note this restores full
functionality for the 8360's existing default boot environment
values, e.g. 'run nfsboot' (i.e. no having to 'fdt addr $fdtaddr'
before booting a kernel).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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In the patch titled "Create new fdt boardsetup command..." I removed the
call to ft_board_setup() from the routine fdt_chosen(), but I forgot
to add a direct call back into cmd_bootm.c
This fixes the oversight by adding the direct call to the bootm command.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
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Previously ft_board_setup() was called by fdt_chosen() which was not
really correctly structured. This splits ft_board_setup() out by creating
a new fdt boardsetup command.
Fix a bug when parsing fdt set command values which have the square
bracket form [00 11 22 33] - the length was updated incorrectly in when
parsing that form.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
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Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
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Tighten up the error messages, split overlength lines.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
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