| Commit message (Collapse) | Author | Age | Lines |
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This patch is to fix mx35 TVIN flicker issue.
It will change AIPS, M3IF, MAX, DBG and esdctl settings.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Update MX35 DDR2 scripts for that when enabling 256MB, the CSD1 is not
stable.
1. Add CSD1 configs to support 256M RAM.
2. Add mx35 TO2 256M RAM configs.
3. Update DDR init code in lowlevel_init.S for external boot.
Signed-off-by: Terry Lv <r65388@freescale.com>
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The USB boot mode does not invalidate the D-CACHE,
so the uboot will DEAD when it tries to invalidate the random data in
the cache line.
The MMC boot will do the MMU init which will do the D-CACHE invalidation.
So the MMC boot will ok in the boot procedure.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add the MFGTOOL support for mx6q.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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The env_embedded module is a built-in module.
So add the module when the CONFIG_ENV_IS_NOWHERE is enabled.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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For lpddr2 board.
1. Put mmdc into power saving mode;
2. Do the necessary setting for AXI cache and IPU Qos.
Signed-off-by: Anson Huang <b20788@freescale.com>
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enlarge max image size to 148MB from 128MB. since android become bigger.
so 128M not enough.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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And new config to enable lpddr2 board with
H9TKNNN4KDMPQR-NDM chip.
Signed-off-by: Anson Huang <b20788@freescale.com>
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mx53 smd: use highest value for unknown board revision value
Signed-off-by: Wayne Zou <b36644@freescale.com>
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According to the datasheet, VDIG_PLL needs to be increased
to 1.3v for TO2.0. This operation has been done in the
low_level_init.S. Remove the duplicated code here.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Some semicolons are missed after "mmc dev 0".
They need to be added to make default environment work.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Default environment in mx6q uses mmc device 0.
We should use mmc device 3.
Signed-off-by: Terry Lv <r65388@freescale.com>
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reduce the time of global reset to 4s in the boards of loco and pcba
Signed-off-by: Robin Gong <B38343@freescale.com>
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Need to send RCA when sending CMD13.
Cannot use print_size function when displaying card capacity
because it expects a 32 bit integer as input, while mmc->capacity
is a 64 bit integer. There is loss of information leading to incorrect
capacities being displayed for "mmcinfo" cmd. Changed it to simply
print the entire 64 bit integer, which is the number of bytes.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Removed delay of 10 ms before each command. There should not be
a need to have this delay after the ENGR00156405 patch that polls
until card is not busy anymore before proceeding to next cmd.
Added poll on reset bits of controller after the bits are set to
wait until they clear before proceeding further.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Anish Trivedi <anish@freescale.com>
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The errata, not applicable to USDHC, causes ESDHC to shut off clock to
the card when auto-clock gating is enabled for commands with busy
signalling and no data phase. The card might require the clock to exit
the busy state, so the workaround is to disable the auto-clock gate
bits in SYSCTL register for such commands. The workaround also entails
polling on DAT0 bit in the PRSSTAT register to learn when busy state is
complete. Auto-clock gating is re-enabled at the end of busy state.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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In addition to ensuring that PERCLK remains at least 2.5 times slower
than the AHB clock, certain steps need to be followed to ensure robust
operation of PERCLK when reconfiguring the PERCLK clock source.
To properly configure the PERCLK clock source, the following steps are
required:
1.In the CCGR registers, gate the clocks to all PERCLK-dependent
modules.
2.Select the desired input clock for the PERCLK root clock (to be either
source from the peripherals main source clock or the
lp_apm clock source). Refer to the CMCBR register,
perclk_lp_apm_sel bit.
3.Configure the perclk_pred1, perclk_pred2, and perclk_podf dividers
to the desired setting. Refer to the CBCDR register for details.
4.In the CCGR registers, enable the desired clocks for the
PERCLK-dependent module clocks.
Certain steps are required to reconfigure perclk_root.
If don't follow these steps, GPT timer may stop and the kernel stops
at " "Calibrating delay loop".
Signed-off-by: Terry Lv <r65388@freescale.com>
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After enabling boot partition on an eMMC using "mmc bootpart" command, the
partition configuration variable that is supposed to track this value on the
eMMC is not updated. This leads to stale and possibly inaccurate boot partition
number being printed when "mmcinfo" command is used, thereby confusing the user.
The fix is to update the part_config variable of mmc struct with the new value
that was just written to the eMMC.
Also removed condition that restricted boot_bus_width programming (for fastboot)
to eMMC with DDR support only. Now, even non-DDR capable eMMCs can be programmed
for fastboot (in SDR mode).
Signed-off-by: Anish Trivedi <anish@freescale.com>
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For DA9053 I2C SDA stuck low issue: the I2C block in DA9053 may not correctly
receive a Power On Reset and device is in unknown state during start-up.
The only way to get the chip into known state before any communication
with the Chip via I2C is to dummy clock the I2C and bring it in a state
where I2C can communicate. Dialog suggested to provide 9 clock on SCL.
Dialog don't know the exact reason for the fault and assume it is because
some random noise or spurious behaviour.
This has to been done in host platform specific I2C driver during
start-up when the I2C is being configured at platform level to supply with
dummy 9 clock on SCL. Dialog I2C driver has no control to provide dummy 9
clock on SCL.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Fix mx53 evk build error.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Only support LVDS0 splash screen.
Enable splash process:
1.define CONFIG_SPLASH_SCREEN in mx6q_sabreauto.h
2.Config U-boot with followed command:()
setenv splashimage '0x30000000'
#Set splash position as Center
setenv splashpos 'm,m'
#Set LVDS via LVDS bridge 0
setenv lvds_num 0
Signed-off-by: Sandor Yu <r01008@freescale.com>
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1. Set dpgdck0_2_en to 0 when required freq is lower than 300Mhz.
2. When dpgdck0_2_en is 0, the formula to calculate output freq
will be changed to 2 * freq * [].
Signed-off-by: Terry Lv <r65388@freescale.com>
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In mx35, when testing TVIN, the screen will flick.
We find that flickers will get better when using ESDCTL_0x82226080
against ESDCTL_0x82228080 for register SCDCTL0.
The origin value ESDCTL_0x82228080 in lowlevel_init.S will be called in
external boot which will reduce the bandwidth.
Signed-off-by: Terry Lv <r65388@freescale.com>
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mx53 evk mmu wrong mapped two csd slots.
Actually evk only has one slot.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Change fastboot code for that fastboot uses mmc command to access card.
Thus the code need to be modified to new mmc command.
Signed-off-by: Terry Lv <r65388@freescale.com>
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This patch will enhance mmc command.
1. Add erase command.
2. Abandon dev_no in mmc command. User need to switch slot with "mmc
dev" command.
3. Add mmc part switch command. Enhance partition switch support.
4. Add mmc bootpart. Boot partition support is more flexible.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Trivial change to remove build warnings.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Modifications on config files.
1. Remove CONFIG_BOOT_PARTITION_ACCESS.
2. Change all mmc read command in default env configs.
Signed-off-by: Terry Lv <r65388@freescale.com>
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MX53 SMD hangs if reset many times with lower possibility.
If doing I2C access in early time, I2C may cause system hangs.
So moving I2C access to late phase to make system hang issue disappear.
QA Test result: QA raised 6 full rounds of CTS one-round test
Totally ran for 6 rounds about 27 hours, reboot for 56*6=336 times,
no reboot failure occurred.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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to fix we should amend systemrev in uboot, add new board RevB for it
Signed-off-by: Robin Gong <B38343@freescale.com>
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1. As customer required, we change to use rom plugins for mx53 boards.
Tested pass with latest mfg tools.
2. Update DDR3 script based on MX53_TO2_DDR3_LCB_SMD_ARDb_v2.inc.
Got from
http://compass.freescale.net/livelink/livelink?func=ll
&objId=221058910&objAction=browse&viewType=1.
3. Fix a tiny build error in mx53_smd.c.
This error will happen when building mx53_smd_mfg.
Signed-off-by: Terry Lv <r65388@freescale.com>
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remove printf() because serial interface is not ready in board_init()
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Init clocks, phy and pll for sata.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Kernel stops at USB driver initialization if suspending,
resuming and resetting the board.
It's because VUSB_2V5 voltage is disabled after suspend.
Need to re-enable it mannually into U-boot
Signed-off-by: Lily Zhang <r58066@freescale.com>
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1. ENET don't need to enable ENET pll clock;
2. Enable cpu debug clock in case of using JTAG;
3. Clean up some debug info during bring up.
Signed-off-by: Anson Huang <b20788@freescale.com>
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when board boots up, during the iMX53 SOC does DA9053 Read/Write
operation, it writes slave address and wait for ACK . Instead of ACK
PMIC sends NAK. A workaround fix is provided as a part of retries to
fix I2C NAK for very first access.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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set Ripley AUX input current limit to 950mA and
set charge termination current to 400mA
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Default boot up with the 7' LCD on.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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We should disabel some clocks in uboot to save
power, or when we download from enet to boot up
kernel, the power consumption could be up 800mA@5V,
may damage the chip.
After apply it, we can save more then 200mA@5V.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Change env size to 8K and change gpmi nand env offset to 2M.
This will reduce boot time and fix gpmi nand env problem.
Signed-off-by: Terry Lv <r65388@freescale.com>
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update Ripley USB and AUX/DC charger settings for pcba revB board
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Add DC-IN power supply support for revB board when booting from EMMC.
set both AUX&USB current limit to 1.5A for Ripley 2.1 only
Change CC current to 950mA
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Update DDR DCD configuration
Open all the clocks during boot
Change CV voltage to 4.2V
Signed-off-by: Weihua Zou <wayne.zou@freescale.com>
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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to avoid ipu starvation issue.
1. enable IPU AXI cache in uboot
2. set Qos to 7 for IPU to highest priority in uboot.
3. set AXI id to 0 for high priority IDMA channel in linux.
Signed-off-by: Jason Chen <b02280@freescale.com>
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In mx51 configuration, CONFIG_BOOT_PARTITION_ACCESS is not defined.
This cause build error to fastboot.c
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Add new machine type for pcba.
Add UART, I2C, SD/MMC, PMIC, DDR initial support.
Add MFG tool support.
Add support for MC34708 on revB pcba board.
Update VDDGP setting on MC34708 PMIC for revB board.
Close unused clock, for fastboot it will enable usb_phy
usb_oh3 clock by itself, still need to verify this work
or not when revB bootup.
Signed-off-by: Wayne Zou <b36644@freescale.com>
Signed-off-by: Lily Zhang <r58066@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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uboot image cannot be burned to boot partition for eMMC 4.3. This
patch will fix it.
Signed-off-by: Sammy He <r62914@freescale.com>
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Enable auto self-refresh of MMDC to save power
when memory idle.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Change DCDC_3V15's GPIO setting for REV-D.
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit 28a8e166c6a8fa001325f88ef06e5a81f6ed82a9)
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This patch is used to support watchdog timeout in SMD RevA, RevB
board.
1. Revert "ENGR00143469 mx53 smd: pull down GPIO_9 to reset the
board".
2. Force warm reset as cold reset.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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