| Commit message (Collapse) | Author | Age | Lines |
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Added code for reading and writing Mac addresses to/from ID EEPROM(0x57).
With attached patch, we can use command "mac/mac read/mac save/"
to read and write EEPROM under u-boot prompt.
U-boot will calculate the checksum of EEPROM while bootup,
if it is right, then u-boot will check whether the mac address
of eTSEC0/1/2/3 is availalbe (non-zero).
If there is mac address availabe in EEPROM, u-boot will use it,
otherewise, u-boot will use the mac address defined in
MPC8641HPCN.h. This matches the requirement to set unique mac address
for each TSEC port.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
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Signed-off-by:Jason Jin <Jason.jin@freescale.com>
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when booting filesystem from ramdisk.
Signed-off-by:Jason Jin <Jason.jin@freescale.com>
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Signed-off-by: Jason Jin <Jason.jin@freescale.com>
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signed-off-by: Jason Jin <Jason.Jin@freescale.com>
signed-off-by: Wei Zhang <wei.zhang@freescale.com>
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When tftp a non-exist file from the tftp server, u-boot will check
the link of all eth port. The original file will return wrong link
state on the no link ports.
signed-off-by: Jason Jin <Jason.Jin@freescale.com>
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During the pci scan process, Some devices return bar_reponse with the
highest bytes 0, such as the pci bridge in uli1575 return bar_response
with 0xffffff, So the bar_size should be manually set under 64K.
Signed-off-by: Jason Jin <jason.jin@freescale.com>
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Signed-off-by: Jason Jin <Jason.jin@freescale.com>
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Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
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Do not set up BATs on secondary CPUs. Let Linux do the nasty.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Jon Loeliger <jdl@jdl.com>
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Signed-off-by: Jon Loeliger <jdl@jdl.com>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Some 80-column cleanups.
Convert printf() to puts() where possible.
Use #include "spd_sdram.h" as needed.
Enhanced reset command usage message a bit.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Jon Loeliger <jdl@jdl.com>
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First cut at moving the PIXIS platform code out of
the 86xx cpu directory and into board/mpc8641hpcn
where it belongs.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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"reset altbank" will reset another bank WITHOUT watch dog timer enabled
"reset altbank wd" will reset another bank WITH watch dog enabled
"diswd" will disable watch dog after u-boot boots up successfully
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
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Fix ECC setup bug.
Enable 1T/2T based on number of DIMMs present.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
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Signed-off-by: Jon Loeliger <jdl@jdl.com>
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Updated ethernet interrupt mappings (moved up 48).
Cleaned up a few comments.
Signed-off-by: Jon Loeliger <jdl@jdl.com>
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Signed-off-by: Jon Loeliger <jdl@jdl.com>
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Correctly tracks r29 as global data pointer now.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
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Enable the CFI driver.
Remove bogus LAWBAR7 cruft.
Use correct TEXT_BASE, Fixup load script.
Enable SPD EEPROM during DDR setup.
Use generic RFC 1918 IP addresses by default.
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Removed //-style comments.
Use 80-column lines.
Remove trailing whitespace.
Remove dead code and debug cruft.
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Signed-off-by: dzu@denx.de <dzu@denx.de>
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Signed-off-by: dzu@denx.de <dzu@eddie.localdomain>
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Signed-off-by: dzu@denx.de <dzu@denx.de>
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is configured; othrwise DMA accesses aren't cache coherent which
causes for example USB to fail.
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- Fix dbau1x00 boards broken by dbau1550 patch
PLL:s were not set for boards other than 1550.
Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST.
Default boot is now bootp for cards other than 1550.
Patch by Thomas Lange Aug 10 2005
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- fix some compiler/parser error, if using m68k tool chain
- optical fix for protect on/off all messages, if using more
then one bank
Patch by Jens Scharsig, 28 July 2005
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Some more NAND cleanup and small fixes.
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Necessary defines and data structures were copied to DoC specific files
so that legacy NAND code could be entirely removed from u-boot tree
in the near future.
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