| Commit message (Collapse) | Author | Age | Lines |
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Add m25p32 spi_nor support for mx53_smd.
Signed-off-by: Terry Lv <r65388@freescale.com>
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A typo is in last commit, will cause android recovery not
work.
Add a space between two string.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Add android recovery related config and code.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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mx53: update vddgp according to new data sheet
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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MX53 TO 2.0 requires 1.25V for VDDGP instead of 1.2V
in order for the core to operate at 1 GHz.
Signed-off-by: Anish Trivedi <anish@freescale.com>
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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Assembled With new PMIC chip - MC34708 (Ripley),
and new SPI NOR - M25P32 as well.
Add new config file for RD3.
Signed-off-by: Robby Cai <R63905@freescale.com>
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MMC driver may wrongly regconize some 2GB eMMC as high capacity card.
This patch is picked from community.
A non-zero value of SEC_COUNT does not indicate that the card is sector
addressed. According to the MMC specification, cards
with a densitygreater than 2GiB are sector addressed.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Enable fastboot support for mx50 rdp.
Signed-off-by: Sammy He <r62914@freescale.com>
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Add mx53 to2.1 chip id recognition.
Signed-off-by: Terry Lv <r65388@freescale.com>
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So far, it's supposed to be on MX50 RD3 and MX53 SMD
Signed-off-by: Robby Cai <R63905@freescale.com>
(cherry picked from commit 0e3d67cd1a2dc30af80e5119b626d997be254991)
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As now mx51 DDR frequency is derived from PLL1.
We need to get DDR frequency from PLL1.
Mx53 don't use PLL1 for ddr clock source,
so just the precision is adjusted.
Mx50 don't support clk command yet.
DDR config function is modified according to
mx50 spec, but not tested yet.
Signed-off-by: Terry <r65388@freescale.com>
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Decrease the default DDR size to 512MB in the default android
uboot configuration file. This can align with most customers'
hardware design, and help us to find more issues before release.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Added a new config file, the DDR setup is similar to the MX53 Quick
Start & MX53 SABRE-Tablet ref design boards.
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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1. update new style ldb per kernel update.
2. update the default boot command is from eMMC
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Parameter of calling to memalign is wrong.
Thus need to modify it.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Read fuse to distinguish between mx53 revA and revB.
Now SoC efuse is used for board id.
Thus we now check fuse value for board rev and id.
Signed-off-by: Terry Lv <r65388@freescale.com>
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set bootup vdd GP to 1.2v for mx53 smd &loco
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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Correct CONFIG_CMD_MMC to CONFIG_CMD_IIM for iim.
Signed-off-by: Terry Lv <r65388@freescale.com>
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New LPDDR2 initialization script from designer includes
controller changes as well as very important PHY changes that increase
internal sampling window to detect DQS edge. This increase
compensates for possible jitter.
The script, Codex_LPDDR2_266MHz.inc v7, is found at
http://compass.freescale.net/livelink/
livelink?func=ll&objId=218722501&objAction=browse&viewType=1
Also removed ARM2 LPDDR2 init section since the settings for that
board are the same as the RDP (EVK).
Signed-off-by: Anish Trivedi <anish@freescale.com>
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New mDDR (LPDDR1) initialization script from designer includes
controller changes as well as very important PHY changes that increase
internal sampling window to detect DQS edge. This increase
compensates for possible jitter.
The script, Codex_LPDDR1_200MHz.inc v4, is found at
http://compass.freescale.net/livelink/
livelink?func=ll&objId=218722501&objAction=browse&viewType=1
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Support eMMC4.4 storage on imx53_smd android fastboot, using
environment to control it, the command is:
> setenv fastboot_dev mmc1
Signed-off-by: Sammy He <r62914@freescale.com>
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The android uImage is greater than 3M, so we need to change the
boot command.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Disable splashimage support defaultly for MX51 BBG/MX53 SMD/
MX53 ARD platforms.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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Pass mmc/sata block offset from fastboot driver to cmd_fastboot, not byte.
Signed-off-by: Sammy He <r62914@freescale.com>
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Add SATA storage support for android fastboot.
Signed-off-by: Sammy He <r62914@freescale.com>
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Increase memory alignment to fix usb connection failure issue
if do sata init, and support MMU disable case in imx_udc driver.
Signed-off-by: Sammy He <r62914@freescale.com>
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This patch enables splashimage support for MX53 SMD/ARD and
MX51 BBG pdk platforms.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch fixes the kernel bootup random hang issue by disabling
DP/DC/DI/IDMAC before we go to kernel. This is a workaround.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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Kernel image is bigger than 3M, the 0x1800 will not enough.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Change uramdisk from 6M byte offset of android fastboot due to
kernel image size more than 3M now.
Signed-off-by: Sammy He <r62914@freescale.com>
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Disable splashimage support for mx53 smd, mx53 ard
and mx51 bbg.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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Disable for BBG and SMD
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Change the default core frequency as 1GHZ for MX53 TO2.0 EVK
board
Signed-off-by: Lily Zhang <r58066@freescale.com>
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This patch protects splashimge related stuffs by config
option for mx51 bbg, mx53 ard and mx53 smd.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch supports splashimage for MX51 BBG Android.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch supports splashimage for MX53 SMD Android.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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The norminal voltage of VDDGP for 1GHZ is 1.2V in MX53
TO2.0 datasheet (RevD). So set the CPU frequency
as 800MHZ firstly since VDDGP is 1.1V after power on.
After increasing VDDGP as 1.2V, increase CPU as 1GHZ.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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This patch supports to use pwm wave to control
backlight. The pwm rate is 20KHz and the pwm
duty is 50%. Only lvds panel is supported.
Use 'lvds_num' env variable to choose to use
lvds0 or lvds1. However, only lvds1 is tested
as the lvds cable cannot be plugged into lvds0
connector. Note that you need to add 'splashimage'
env variable to set the memory address of the
bmp image.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch supports to use pwm wave to control
backlight. The pwm rate is 200Hz and the pwm
duty is 50%. Use 'lvds_num' env variable to
choose to use lvds0 or lvds1. Note that you
need to add 'splashimage' env variable to
set the memory address of the bmp image.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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1) Change MX51 related function names to IPUv3 related names.
2) Change MX51 related comments to IPUv3 related comments.
3) Do not set panel_info.cmap to be NULL pointer.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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1) Remove MX51 related comments in ipu drivers.
2) Add di clocks.
3) Support pixel clock being deprived from external clock.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch adds ipu base address and ipu clock.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch adds imx pwm driver support as
a misc device.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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- Add MFG tool support for MX53 SMD and MX53 LOCO
boards
- Update mx53 ARD MFG defconfig to pass compile
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Add saving environment to sata device support.
Signed-off-by: Terry Lv <r65388@freescale.com>
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SATA device can't init and a typo in sata help.
Add delay in sata detect proceduce.
Currently, I have met 3 problems for this issue.
1. Seagate HD. It needs 1000 for timeout.
2. Hitachi HD. It needs 10000 for timeout.
3. In sata env case, it needs 100000 for timeout.
10000000 for timeout is just to avoid a dead loop,
And suppose this timeout should be enough for all normal
case.
It doesn't mean all HD need to wait this long time,
If tfd is ok, the loop will be breaked immediately.
Signed-off-by: Terry Lv <r65388@freescale.com>
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When we use splashpos command to set the display position
of a bmp image, the x value means the number of pixels
from the left boundary of the screen, so we should consider
the bits of every pixel when we calculate fb address offset.
Signed-off-by: Liu Ying <b17645@freescale.com>
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This patch corrects the fbi->screen_base value and fbi->fix.smem_start
value when MMU is disabled.
Reported-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Liu Ying <b17645@freescale.com>
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This patch allocates cmap for panel_info, otherwise,
cmap_base in common/lcd.c will be NULL pointer.
Signed-off-by: Liu Ying <b17645@freescale.com>
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Given that an example mac addr is 00-11-22-33-44-55,
it should be fused into the IIM at the following locations:
0xC24 - 00
0xC28 - 11
0xC2C - 22
0xC30 - 33
0xC34 - 44
0xC38 - 55
Then, when reading the bytes into a mac array, it should be read as follows:
mac[0] - 00
mac[1] - 11
mac[2] - 22
mac[3] - 33
mac[4] - 44
mac[5] - 55
Previously, it was read into the array in reverse order.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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