| Commit message (Collapse) | Author | Age | Lines |
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Add MMC configs to mx35 3stack config file.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Disable NAND driver interleave mode support
Signed-off-by:Jason Liu <r64343@freescale.com>
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Add support for programming ubifs image on nand flash
Signed-off-by:Jason Liu <r64343@freescale.com>
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Remove Watchdog disable codes in MX51 uboot.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add FEC support for BBG2.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add auto-complete and platform prompt for each platform.
Signed-off-by: Terry Lv <r65388@freescale.com>
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BBG2, enable SPI NOR and MMC in one image.
Signed-off-by: Terry Lv <r65388@freescale.com>
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1. Add build option to uboot for different media type
2. fix the spi-nor link error
Signed-off-by:Jason Liu <r64343@freescale.com>
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spi nor boot support for BBG2.
Signed-off-by: Terry Lv <r65388@freescale.com>
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BBG2: MMC boot support.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Basic boot on BBG2 board.
Signed-off-by: r65388 <r65388@freescale.com>
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Add freescale copyright.
Signed-off-by: r65388 <r65388@freescale.com>
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Add nand driver for MX51 uboot
Signed-off-by:Jason Liu <r64343@freescale.com>
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These patches add functional support to iMX25PDK.
Currently only the internal FEC is supported.
Signed-off-by: Alan Carvalho de Assis <alan.assis@freescale.com>
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This patch add support on U-Boot to i.MX25 processor.
Signed-off-by: Alan Carvalho de Assis <alan.assis@freescale.com>
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Support i.MX51 TO2.0 3stack board. And enable LAN9217 support.
NAND is not supported in this patch.
Signed-off-by: Fred Fan <r01011@freescale.com>
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Modify and Verfiy MX31 & MX35 3stack according to the changes in V2009.01
Signed-off-by: Fred Fan <r01011@freescale.com>
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uboot can not boot kernel.
There are no more messages excepts uncompression message.
The root cause is wrong romfile version offset.
Signed-off-by: Fred Fan <r01011@freescale.com>
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1. Check Soc version
2. Check Board version based on TO2 pmic chip version.
3. Based on soc version, skips To1 workaround code
4. based on board version, enables FEC power and select pin mux.
Signed-off-by: Fred Fan <r01011@freescale.com>
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1. Change NAND driver Makefile to bulild individual nand driver on i.MX31
and i.MX35.
2. Remove CONFIG_NAND_BOOT to common boot code which supports boot from nand
and nor.
Signed-off-by: Fred Fan <r01011@freescale.com>
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1. Support boot from NAND
Changes link script to separate initial code to multiple sections.
2. One binary support boot from NOR and NAND
Changes common file start.S to support multiple sections.
Signed-off-by: Fred Fan <r01011@freescale.com>
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Add nand driver for mx35
Signed-off-by:Jason Liu <r64343@freescale.com>
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Support boot from NAND Flash
Add driver for i.MX31 NFC
Upgate U-Boot to support NAND boot
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Update .gitignore configure file to ignore vim swap and ctags file
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Support boot from NOR flash
Support Multiple ethernet:LAN9217 and FEC
Support upgrade u-boot
Signed-off-by: Fred Fan <r01011@freescale.com>
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Update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
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This fixes current build failure.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
mvblm7.c: fix warning: implicit declaration of function
'mv_reset_environment'
Signed-off-by: Wolfgang Denk <wd@denx.de>
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The "console: unify printing current devices" patch goofed:
CONFIG_SYS_CONSOLE_INFO_QUIET is supposed to *REMOVE* boot
time noise, not add it. Said patch changed the #ifndefs
to #ifdef; this one restores them to the proper sense.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Clean up existing boards (mvBC-P/MPC5200 and mvBL-M7/MPC8343) by
using common code.
Signed-off-by: André Schwarz <andre.schwarz@matrix-vision.de>
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apparently the ITX was missed last round.
Also make bootdelay consistent with other boards, so as to give on the
opportunity to fix mistakenly set bootcmd without having checked for an
bootdelay zero setting first.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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kernel
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Fix ECC Correction bug where the byte offset location were double
flipped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
/* The NDFC uses Smart Media (SMC) bytes order */
ecc_code[0] = p[2];
ecc_code[1] = p[1];
ecc_code[2] = p[3];
But in the Correction algorithm when calculating the byte offset
location, the s1 is used as the upper part of the address. Which
again reverse the order making the final byte offset address
location incorrect.
byteoffs = (s1 << 0) & 0x80;
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byteoffs |= (s0 >> 4) & 0x08;
The order is change to read it in straight and let the correction
function to revert it to SMC order.
Signed-off-by: Feng Kan <fkan@amcc.com>
Acked-by: Victor Gallardo <vgallardo@amcc.com>
Acked-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Newer revisions of these boards have slightly larger flashes, so increase
the configured number of sectors so that U-Boot works on all revisions.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The SPI controller on the S3C24X0 has 8 bit registers, not 32 bit.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Start a common header file for common linker script code (such as
workarounds for older linkers) rather than doing this in the build system.
As fallout, we no longer execute the linker every time config.mk is
included by a build file (which can easily be 70+ times), but rather only
execute it once.
This also fixes a bug in the major version checking by creating a macro to
easily compare versions and keep people from making the same common
mistake (forgetting to check major and minor together).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Now that the common code preprocesses the linker script, the Blackfin code
no longer needs to do it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
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Update CHANGELOG, minor Coding Style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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linux mpc83xx_defconfig kernels are getting bigger, accommodate for
their growth by adjusting default load and fdt addresses.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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when using Linus' 83xx_defconfig, the mpc8377rdb would hang at boot
at either:
NET: Registered protocol family 16
or the
io scheduler cfq registered
message. Fixing up these DDR settings appears to fix the problem.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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commit 9993e196da707a0a1cd4584f1fcef12382c1c144 "mpc83xx: convert all
remaining boards over to 83XX_GENERIC_PCI" remapped pci windows on
tqm834x to make it more consistent with the other 83xx boards. During
that time however, the author failed to realize that FLASH_BASE was
occupying the same range as what PCI1_MEM_BASE was being assigned.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tested-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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This was introduced with the MPC8349EMDS board, and then copied to
a couple other boards by nature of being the reference implementation.
u-boot$git grep CONFIG_SYS_MID_FLASH_JUMP
include/configs/MPC8349EMDS.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
include/configs/sbc8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
include/configs/vme8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
u-boot$
It currently isn't used, so delete it before it spreads further.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Prior to this commit, to enable PCI, you had to go manually
edit the board config header, which isn't really user friendly.
This adds the typical PCI make targets to the toplevel Makefile
in accordance with what is being done with other boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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