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* ENGR00140089 MX53_SMD: update command line.Zhang Jiejing2011-03-14-3/+3
| | | | | | | 1. update new style ldb per kernel update. 2. update the default boot command is from eMMC Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00138533: Fix sata write operation random failure issueTerry Lv2011-03-02-1/+3
| | | | | | | Parameter of calling to memalign is wrong. Thus need to modify it. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00139747: Read fuse to distinguish between mx53 revA and revBTerry Lv2011-03-02-7/+43
| | | | | | | | | Read fuse to distinguish between mx53 revA and revB. Now SoC efuse is used for board id. Thus we now check fuse value for board rev and id. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00139924 mx53 smd &loco: set bootup vdd GP to 1.2vZhou Jingyu2011-03-01-0/+6
| | | | | | set bootup vdd GP to 1.2v for mx53 smd &loco Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
* ENGR00139120: Correct CONFIG_CMD_MMC to CONFIG_CMD_IIM for iimTerry Lv2011-02-14-8/+8
| | | | | | Correct CONFIG_CMD_MMC to CONFIG_CMD_IIM for iim. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00138689 MX50 Update LPDDR2 script to use more optimized settingsAnish Trivedi2011-01-31-315/+42
| | | | | | | | | | | | | | | | New LPDDR2 initialization script from designer includes controller changes as well as very important PHY changes that increase internal sampling window to detect DQS edge. This increase compensates for possible jitter. The script, Codex_LPDDR2_266MHz.inc v7, is found at http://compass.freescale.net/livelink/ livelink?func=ll&objId=218722501&objAction=browse&viewType=1 Also removed ARM2 LPDDR2 init section since the settings for that board are the same as the RDP (EVK). Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00138635 MX50 Update mDDR script to use more optimized settingsAnish Trivedi2011-01-28-55/+55
| | | | | | | | | | | | | New mDDR (LPDDR1) initialization script from designer includes controller changes as well as very important PHY changes that increase internal sampling window to detect DQS edge. This increase compensates for possible jitter. The script, Codex_LPDDR1_200MHz.inc v4, is found at http://compass.freescale.net/livelink/ livelink?func=ll&objId=218722501&objAction=browse&viewType=1 Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00138549 Android fastboot: Support eMMC4.4 on imx53_smdrel_imx_2.6.35_11.01.00Sammy He2011-01-28-28/+64
| | | | | | | | Support eMMC4.4 storage on imx53_smd android fastboot, using environment to control it, the command is: > setenv fastboot_dev mmc1 Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00118558 MX51/MX53: change the boot command of android boards.Zhang Jiejing2011-01-27-10/+14
| | | | | | | The android uImage is greater than 3M, so we need to change the boot command. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00138534 Disable splashimage support defaultly for PDKLiu Ying2011-01-26-3/+0
| | | | | | | Disable splashimage support defaultly for MX51 BBG/MX53 SMD/ MX53 ARD platforms. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00138422-3 Android fastboot: Pass block offset to cmd_fastbootSammy He2011-01-27-28/+28
| | | | | | Pass mmc/sata block offset from fastboot driver to cmd_fastboot, not byte. Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00138422-2 Add SATA storage support for android fastbootSammy He2011-01-26-106/+138
| | | | | | Add SATA storage support for android fastboot. Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00138422-1 Fix usb connection failure if do sata initSammy He2011-01-26-8/+19
| | | | | | | Increase memory alignment to fix usb connection failure issue if do sata init, and support MMU disable case in imx_udc driver. Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00138468-2 Enable splashimage support for several platformsLiu Ying2011-01-25-0/+3
| | | | | | | This patch enables splashimage support for MX53 SMD/ARD and MX51 BBG pdk platforms. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00138468-1 MX5 video:Disable DP/DC/DI/IDMAC before go to kernelLiu Ying2011-01-25-0/+8
| | | | | | | This patch fixes the kernel bootup random hang issue by disabling DP/DC/DI/IDMAC before we go to kernel. This is a workaround. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00138390 android recovery, enlarge uImage sizeZhang Jiejing2011-01-24-2/+2
| | | | | | Kernel image is bigger than 3M, the 0x1800 will not enough. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00138359 Change uramdisk from 6M byte offset of android fastbootSammy He2011-01-22-5/+5
| | | | | | | Change uramdisk from 6M byte offset of android fastboot due to kernel image size more than 3M now. Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00138240 Disable splashimage support for PDKLiu Ying2011-01-20-3/+0
| | | | | | | Disable splashimage support for mx53 smd, mx53 ard and mx51 bbg. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00138191 disable the SPLASH SCREEN for androidXinyu Chen2011-01-19-2/+0
| | | | | | Disable for BBG and SMD Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
* ENGR00138148 MX53 TO2.0 EVK: change the default core as 1GHZLily Zhang2011-01-18-9/+18
| | | | | | | Change the default core frequency as 1GHZ for MX53 TO2.0 EVK board Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00138040-3 Protect splashimage related stuffs by configLiu Ying2011-01-17-3/+5
| | | | | | | This patch protects splashimge related stuffs by config option for mx51 bbg, mx53 ard and mx53 smd. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00138040-2 MX51 BBG Android:Support splashimageLiu Ying2011-01-17-0/+19
| | | | | | This patch supports splashimage for MX51 BBG Android. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00138040-1 MX53 SMD Android:Support splashimageLiu Ying2011-01-17-0/+23
| | | | | | This patch supports splashimage for MX53 SMD Android. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00137552 MX53: increase VDDGP as 1.2V for 1GHZLily Zhang2011-01-15-3/+30
| | | | | | | | | The norminal voltage of VDDGP for 1GHZ is 1.2V in MX53 TO2.0 datasheet (RevD). So set the CPU frequency as 800MHZ firstly since VDDGP is 1.1V after power on. After increasing VDDGP as 1.2V, increase CPU as 1GHZ. Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00137894-6 MX53 SMD:Support splashimageLiu Ying2011-01-14-1/+150
| | | | | | | | | | | | | | This patch supports to use pwm wave to control backlight. The pwm rate is 20KHz and the pwm duty is 50%. Only lvds panel is supported. Use 'lvds_num' env variable to choose to use lvds0 or lvds1. However, only lvds1 is tested as the lvds cable cannot be plugged into lvds0 connector. Note that you need to add 'splashimage' env variable to set the memory address of the bmp image. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00137894-5 MX53 ARD:Support splashimageLiu Ying2011-01-14-0/+230
| | | | | | | | | | | This patch supports to use pwm wave to control backlight. The pwm rate is 200Hz and the pwm duty is 50%. Use 'lvds_num' env variable to choose to use lvds0 or lvds1. Note that you need to add 'splashimage' env variable to set the memory address of the bmp image. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00137894-4 IPUv3 FB: IPUv3 FB driver enhancementLiu Ying2011-01-14-7/+10
| | | | | | | | 1) Change MX51 related function names to IPUv3 related names. 2) Change MX51 related comments to IPUv3 related comments. 3) Do not set panel_info.cmap to be NULL pointer. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00137894-3 IPU driver enhancementLiu Ying2011-01-14-31/+61
| | | | | | | | 1) Remove MX51 related comments in ipu drivers. 2) Add di clocks. 3) Support pixel clock being deprived from external clock. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00137894-2 MX53: Add ipu base addr and ipu clockLiu Ying2011-01-13-0/+48
| | | | | | This patch adds ipu base address and ipu clock. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00137894-1 Add imx pwm driver supportLiu Ying2011-01-13-0/+158
| | | | | | | This patch adds imx pwm driver support as a misc device. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00137791 MX53: Update for MFG toolLily Zhang2011-01-11-9/+504
| | | | | | | | - Add MFG tool support for MX53 SMD and MX53 LOCO boards - Update mx53 ARD MFG defconfig to pass compile Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00137358: Add saving environment to sata device supportTerry Lv2011-01-11-5/+190
| | | | | | Add saving environment to sata device support. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00136869: SATA device can't init and a typo in sata helpTerry2011-01-11-2/+2
| | | | | | | | | | | | | | | | | | SATA device can't init and a typo in sata help. Add delay in sata detect proceduce. Currently, I have met 3 problems for this issue. 1. Seagate HD. It needs 1000 for timeout. 2. Hitachi HD. It needs 10000 for timeout. 3. In sata env case, it needs 100000 for timeout. 10000000 for timeout is just to avoid a dead loop, And suppose this timeout should be enough for all normal case. It doesn't mean all HD need to wait this long time, If tfd is ok, the loop will be breaked immediately. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00137841 splashimage:Correct horizontal display positionLiu Ying2011-01-11-1/+2
| | | | | | | | | When we use splashpos command to set the display position of a bmp image, the x value means the number of pixels from the left boundary of the screen, so we should consider the bits of every pixel when we calculate fb address offset. Signed-off-by: Liu Ying <b17645@freescale.com>
* ENGR00137767 IPUv3 video:Support splashimage with MMU disabledLiu Ying2011-01-10-2/+6
| | | | | | | | This patch corrects the fbi->screen_base value and fbi->fix.smem_start value when MMU is disabled. Reported-by: Terry Lv <r65388@freescale.com> Signed-off-by: Liu Ying <b17645@freescale.com>
* ENGR00137766 BBG splashimage:Allocate cmap for panel_infoLiu Ying2011-01-10-1/+10
| | | | | | | This patch allocates cmap for panel_info, otherwise, cmap_base in common/lcd.c will be NULL pointer. Signed-off-by: Liu Ying <b17645@freescale.com>
* ENGR00137713 MX53 Uboot SMSC Fix order in which mac addr bytes are read from IIMAnish Trivedi2011-01-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Given that an example mac addr is 00-11-22-33-44-55, it should be fused into the IIM at the following locations: 0xC24 - 00 0xC28 - 11 0xC2C - 22 0xC30 - 33 0xC34 - 44 0xC38 - 55 Then, when reading the bytes into a mac array, it should be read as follows: mac[0] - 00 mac[1] - 11 mac[2] - 22 mac[3] - 33 mac[4] - 44 mac[5] - 55 Previously, it was read into the array in reverse order. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00137603 Add mx53_smd_android config for androidSammy He2011-01-08-4/+330
| | | | | | Add mx53_smd_android config for android build. Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00137604: Change PLL4 to 455MHz for mx53Terry Lv2011-01-07-6/+33
| | | | | | | Required by display to set ldb. We need to set PLL4 to 455MHz. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00137642 MX53 Uboot Align DDR3 script for Loco and SMD boardsAnish Trivedi2011-01-05-4/+4
| | | | | | | | | | | | | Changed the value of one register, offset 0x88, of the ESDCTL controller to match the official script for the boards, entitled "MX53_TO2_DDR3_LCB.inc", found at http://compass.freescale.net/livelink/livelink/221435668/ MX53_TO2_DDR3_LCB.inc.txt?func=doc.Fetch&nodeid=221435668 The register value sets read delay lines. The change is minor. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00137596 MX53 Uboot SMC911X driver needs to get mac addr from IIMAnish Trivedi2011-01-05-0/+25
| | | | | | | If the MAC addr read from the controller's ADDRH and ADDRL registers is invalid, then try to read MAC address programmed in MX53's IIM. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00137497-2 MX53: Add LOCO board supportLily Zhang2010-12-30-2/+1477
| | | | | | | | | | | Add MX53 LOCO board support The following functions are tested in the board: - Micro SD boot - MMC/SD read/write. - clk command - fuse command Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00137497-1 Import new mach-type header fileLily Zhang2010-12-30-33/+2387
| | | | | | | | Import new mach-type header file for MX53 LOCO board Signed-off-by: Lily Zhang <r58066@freescale.com> Acked-by: Lily Zhang <r58066@freescale.com>
* ENGR00136075 MX53: Add SMD board supportLily Zhang2010-12-30-0/+1530
| | | | | | | | | | | | | | | | | | | | | | | Add MX53 SMD support: - Use DDR3 script for SMD board from Mike Kjar: "Rita_init_LCB_CMOS.inc" - Set the default CPU core frequency as 1GHZ. The following functions are tested on SMD board: - SD/MMC boot, read, write via SDHC1 - eMMC4.4 boot, read, write via SDHC3. - SATA boot, read, write. To support SATA boot via internal clock, please ensure the fuse "SATA_ALT_CLK_REF" was blown. - FEC - UART - clk command - iim command Signed-off-by: Liu Ying <b17645@freescale.com> Signed-off-by: Jason Chen <b02280@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Anish Trivedi <anish@freescale.com> Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00137410 MX53 split board files into different foldersLily Zhang2010-12-29-337/+1444
| | | | | | Split different MX53 board files into different folder. Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00136863-2: Fix mx53 CMD12 issue.Terry Lv2010-12-29-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | As in mx53 and lster socs, when using CMD12, cmdtype need to be set to ABORT, otherwise, next read command will hang. This is a software Software Restrictions in spec 29.7.8. For pre-defined multi-block read operation, i.e., The number of blocks to read has been defined by previous CMD23 for MMC, or pre-defined number of blocks in CMD53 for SDIO/SDCombo, or whatever multi-block read without abort command at card side, an abort command, either automatic or manual CMD12/CMD52, is still required by ESDHCV2 after the pre-defined number of blocks are done, to drive the internal state machine to idle mode. In this case, the card may not respond to this extra abort command and ESDHCV2 gets Response Timeout. It is recommended to manually send an abort command with RSPTYP[1:0] both bits cleared. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00136863-1: Change mmc framework architecture.Terry Lv2010-12-29-200/+137
| | | | | | | | | | Change mmc framework architecture. Mainly for code clean and restructure. Mainly merge our code with community code. Based on commit 17b4c8e9eb30e3eb305baef98eb23325e61db592. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00137408: Add FAT32 supportTerry Lv2010-12-29-553/+702
| | | | | | | | Add FAT32 support. The code is got from community. Based on hash number 71aab09b2c1edd1b6e00819abd1e31c04db04f36. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00137372 MX53: Switch back to use DCD and update DDR scriptsLily Zhang2010-12-28-1022/+259
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. This patch is used to switch back to use DCD for flash header instead of plug-in. This change request is due to the following reasons: 1) U-boot community doesn't accept current plug-in solution when upstreaming. 2) Plug-in isn't supported by MX53 ROM serial download mode. No effective workaround is found now. To use the same code base to support normal U-Boot and MFG tool better, adopt DCD solution firstly. 3) Current MX53 DDR scripts don't exceed the length limitation of DCD. For MX53 TO2.0 EVK/ARM2 board, raise DDR frequency to 400MHZ after VCC and VDDA voltages are raised as 1.3V. Since ARM2 CPU2 board share the same script with EVK, delete ARM2 CPU2 config files. ARM2 CPU2 board can share the same bootloader with EVK. 2. Update MX53 DDR2 scripts for TO1.0/TO2.0 EVK/ARD/ARM2 boards The script "MX53_TO2_DDR2_EVK_ARD.inc" is located under http://compass.freescale.net/livelink/livelink? func=ll&objId=221058910&objAction=browse&viewType=1 This script is published by ATX and FIL team on Dec 16th, 2010 3. Update MX53 ARM2 CPU3 DDR3 script "MX53_TO2_DDR3_CPU3.inc" under the same compass folder Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00137390 UBOOT:NAND: BBT not found on MX53 boardJason Liu2010-12-27-0/+7
| | | | | | | | | | BBT table can't be found on MX53 board, which is due to that the BBT table flag has been written to the ECC area which cause the BBT flag lost. This patch also fix the BBT version not correct issue. Signed-off-by: Jason Liu <r64343@freescale.com>
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