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* Blackfin: bf518f-ezbrd: enable SST SPI flash driverMike Frysinger2009-06-14-0/+1
| | | | | | | The BF51xF parts have an internal SST SPI flash, so make sure the driver is enabled by default so we can access it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: convert specific pre/post config headers to common methodMike Frysinger2009-06-14-231/+166
| | | | | | | | | | The Blackfin port was using asm/blackfin-config-{pre,post}.h to setup common Blackfin board defines. The common method now is to use config.h, so convert blackfin-config-post.h to that. Rename the still Blackfin specific blackfin-config-pre.h to config-pre.h so the naming conventions at least line up. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: enable LZMA for all ADI boardsMike Frysinger2009-06-14-0/+5
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: make default ADI env more flexibleMike Frysinger2009-06-14-5/+25
| | | | | | | | Allow boards to easily override the root= and default bootcmd, allow people to tweak the file used in default bootcmds at runtime via one env var, and add a stock nandboot command. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: ibf-dsp561: new board portHoan Hoang2009-06-14-0/+408
| | | | | Signed-off-by: Hoan Hoang <hnhoan@i-syst.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: blackstamp: new board portMike Frysinger2009-06-14-2/+562
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-srv1: new board portMike Frysinger2009-06-14-2/+498
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-minotaur: new board portMike Frysinger2009-06-14-1/+504
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-pnav: new board portMike Frysinger2009-06-14-1/+465
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf527: new board portMike Frysinger2009-06-14-2/+581
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf548: new board portMike Frysinger2009-06-14-2/+782
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: tcm-bf537: new board portMike Frysinger2009-06-14-2/+531
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf561: new board portMike Frysinger2009-06-14-2/+374
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf537e: new board portMike Frysinger2009-06-14-2/+525
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf533: new board portMike Frysinger2009-06-14-0/+373
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: new spibootldr commandMike Frysinger2009-06-14-0/+65
| | | | | | | Newer Blackfin parts can an on-chip ROM that can boot LDRs over SPI flashes, so add a new 'spibootldr' command to take advantage of it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: support embedding the environment into loader files (LDRs)Mike Frysinger2009-06-14-0/+8
| | | | | | | | For the most part, the Blackfin processor boots files in the LDR format rather than binary/ELF files. So we want to export the environment as a raw blob to the LDR utility so it can embed it at the right location. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* add %.c->%.i and %.c->%.s rulesMike Frysinger2009-06-14-0/+4
| | | | | | | | | | | The Linux kernel has some helper rules which allow you to quickly produce some of the intermediary files from C source. Specifically, you can create .i files which is the preprocessed output and you can create .s files which is the assembler output. This is useful when you are trying to track down header/macro expansion errors or inline assembly errors. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* make sure toplevel $(SUBDIRS) is always declaredMike Frysinger2009-06-14-8/+8
| | | | | | | | | The $(SUBDIRS) variable is only declared when U-Boot has been configured, but it gets used all the time. In the non-configured case, it is used to generate a helpful error message, but it needs to be set properly for that to occur. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* allow boards to customize compiler options on a per-file/dir basisMike Frysinger2009-06-14-3/+5
| | | | | | | | | | | | | | With our Blackfin boards, we like to build the compression routines with -O2 as our tests show a pretty good size/speed tradeoff. For the rest of U-Boot though, we want to stick with the default -Os as that is mostly control code. So in our case, we would add a line like so to the board specific config.mk file: CFLAGS_lib_generic += -O2 Now all files under lib_generic/ will have -O2 appended to their build. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Merge branch 'next' of ../masterWolfgang Denk2009-06-14-17280/+15003
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| * xes: Update Freescale clock code to work with 86xx processorsPeter Tyser2009-06-12-1/+10
| | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * xes: Update Freescale DDR code to work with 86xx processorsPeter Tyser2009-06-12-2/+8
| | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * xes: Update Freescale PCI code to work with 86xx processorsPeter Tyser2009-06-12-10/+73
| | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Add PORBMSR and PORDEVSR shift definesPeter Tyser2009-06-12-0/+2
| | | | | | | | | | | | | | | | | | Add defines similar to those already used for the the 86xx architecture. This will ease sharing of PCI code between the 85xx and 86xx architectures. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fsl/85xx, 86xx: Sync up DMA codePeter Tyser2009-06-12-10/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following changes were made to sync up the DMA code between the 85xx and 86xx architectures which will make it easier to break out common 8xxx DMA code: 85xx: - Don't set STRANSINT and SPCIORDER fields in SATR register. These bits only have an affect when the SBPATMU bit is set. - Write 0xffffffff instead of 0xfffffff to clear errors in the DMA status register. We may as well clear all 32 bits of the register... 86xx: - Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers - Add clearing of errors in the DMA status register when initializing the controller - Clear the channel start bit in the DMA mode register after a transfer Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fsl: Create common fsl_dma.h for 85xx and 86xx cpusPeter Tyser2009-06-12-172/+89
| | | | | | | | | | | | | | | | Break out DMA structures for the Freescale MPC85xx and MPC86xx cpus to reduce a large amount of code duplication Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Add UEC6 and UEC8 at SGMII mode for MPC8569MDSHaiying Wang2009-06-12-0/+25
| | | | | | | | | | | | | | | | | | On MPC8569MDS board, UCC6 and UCC8 can be configured to work at SGMII mode via UEM on PB board. Since MPC8569 supports up to 4 Gigabit Ethernet ports, we disable UEC6 and UEC8 by default. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * drivers/qe: add sgmii support in for UEC driverHaiying Wang2009-06-12-2/+46
| | | | | | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * qe: Pass in uec_info struct through uec_initializeHaiying Wang2009-06-12-222/+65
| | | | | | | | | | | | | | | | | | | | | | The uec driver contains code to hard code configuration information for the uec ethernet controllers. This patch creates an array of uec_info structures, which are then parsed by the corresponding driver instance to determine configuration. It also creates function uec_standard_init() to initialize all UEC interfaces for 83xx and 85xx. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fsl: Update the number of ethxaddr in reading system eepromHaiying Wang2009-06-12-5/+18
| | | | | | | | | | | | | | | | | | We support up to 8 mac addresses in system eeprom, so we define the macro MAX_NUM_PORTS to limit the mac_count to 8, and update the number of ethxaddr according to mac_count. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Add RMII support for MPC8569MDSHaiying Wang2009-06-12-7/+144
| | | | | | | | | | | | | | | | | | This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to enalbe_mpc8569mds_qe_uec which is more accurate. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Add UEC3 and UEC4 support for MPC8569MDSHaiying Wang2009-06-12-0/+57
| | | | | | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * drivers/qe: Add more SNUM number for QEHaiying Wang2009-06-12-5/+16
| | | | | | | | | | | | | | | | | | Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII- 1000 mode. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * drivers/qe: Change QE RISC ALLOCATION to support 4 RISCsHaiying Wang2009-06-12-12/+52
| | | | | | | | | | | | | | | | | | Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and define MAX_QE_RISC for QE based silicons. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Add QE clk supportHaiying Wang2009-06-12-1/+21
| | | | | | | | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <Timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Added MPC8535/E identifiersKumar Gala2009-06-12-0/+4
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Always attempt ethernet device tree fixupKumar Gala2009-06-12-3/+0
| | | | | | | | | | | | | | | | | | | | | | Its reasonable that we may have ethernet devices but dont have drivers or support enabled for them in u-boot and want the device tree fixed up. Unconditionally calling the ethernet fixup is fine since if we dont have ethernet nodes that match (or aliases) we will not attempt to do anything. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Timur Tabi <timur@freescale.com>
| * drivers/qe: Rename the camel-case identifiers in uecHaiying Wang2009-06-12-18/+18
| | | | | | | | | | | | Rename riscRx/riscTx to risc_rx/risc_tx to comply with Codingstyle. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
| * 85xx: Add P2020DS supportSrikanth Srinivasan2009-06-12-0/+1882
| | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds support for P2020DS reference platform. DDR3 interface uses hard-coded initialization rather than SPD for now and was tested at 667Mhz. Some PIXIS register definitions and associated code sections need to be fixed. TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all tested under u-boot. Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * mpc512x: MPC5121ADS: Add NAND supportStefan Roese2009-06-12-8/+55
| | | | | | | | | | | | | | | | | | | | This patch adds NAND support to the MPC5121ADS board. Please note that the image size increased since NAND support didn't fit in the current image size (256k). Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Wolfgang Denk <wd@denx.de>
| * nand/mpc512x: Add MPC512x NAND support (NFC)Stefan Roese2009-06-12-0/+693
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds NAND Flash Controller driver for MPC5121 revision 2. All device features, except hardware ECC and power management, are supported. This NFC driver replaces the one orignally posted by John Rigby: "[PATCH] Freescale NFC NAND driver" It's a port of the Linux driver version posted by Piotr Ziecik a few weeks ago. Using this driver has the following advantages (from my point of view): - Compatibility with the Linux NAND driver (e.g. ECC usage) - Better code quality in general - Resulting U-Boot image is a bit smaller (approx. 3k) - Better to sync with newer Linux driver versions The only disadvantage I can see, is that HW-ECC is not supported right now. But this could be added later (e.g. port from Linux driver after it's supported there). Using HW-ECC on the MCP5121 NFC has a general problem because of the ECC usage in the spare area. This collides with JFFS2 for example. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Piotr Ziecik <kosmo@semihalf.com> Cc: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com> Cc: Scott Wood <scottwood@freescale.com>
| * mpc512x: Add esd gmbh mecp5123 board supportStefan Roese2009-06-12-0/+917
| | | | | | | | | | | | | | MECP5123 is a MPC5121E based module by esd gmbh. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
| * mcp512x: Add macros for SCFR LPC divisor accessStefan Roese2009-06-12-0/+3
| | | | | | | | | | | | Thos macros will be used by the esd mecp5123 board. Signed-off-by: Stefan Roese <sr@denx.de>
| * mpc512x: Fix problem with I2C access before relocationStefan Roese2009-06-12-1/+1
| | | | | | | | | | | | | | | | | | This is needed for the upcoming esd MECP5123 board port which uses I2C EEPROM for environment storage. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Acked-by: Heiko Schocher<hs@denx.de>
| * 74xx_7xx: CPCI750: Add CPCI adapter/target supportStefan Roese2009-06-12-15/+49
| | | | | | | | | | | | | | | | The CPCI750 can be built as CPCI host or adapter/target board. This patch adds support for runtime detection of those variants. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
| * 74xx_7xx: CPCI750: Enable access to PCI function > 0Stefan Roese2009-06-12-8/+22
| | | | | | | | | | | | | | | | The Marvell bridge 64360 supports serveral PCI functions, not only 0. This patch enables access to those functions. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
| * 74xx_7xx: CPCI750: Minor coding style cleanup of cpci750.cStefan Roese2009-06-12-6/+5
| | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
| * 74xx_7xx: CPCI750: Add loadpci commandStefan Roese2009-06-12-0/+76
| | | | | | | | | | | | | | | | This command is used to load/boot an OS-image which is transferred from the CPCI host to the CPCI target/adapter. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
| * 74xx_7xx: CPCI750: Add commandline editing/historyStefan Roese2009-06-12-1/+2
| | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
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