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* ppc4xx: Add README entry for CONFIG_PCI_DISABLE_PCIEDirk Eibach2009-02-12-0/+4
| | | | | Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix initialization of the SDRAM_CODT registerCarolyn Smith2009-02-12-5/+2
| | | | | | | | | This fixes the initialization of the SDRAM_CODT register in the ppc4xx DDR2 initialization code. It also removes use of the SDRAM_CODT_FEEDBACK_RCV_SINGLE_END and SDRAM_CODT_FEEDBACK_DRV_SINGLE_END #define's since they are reserved bits. Signed-off-by: Carolyn Smith <carolyn.smith@tektronix.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix problem with board_eth_init() vs cpu_eth_init() on AMCC boardsStefan Roese2009-02-12-0/+4
| | | | | | | | Some AMCC eval boards do have a board_eth_init() function calling pci_eth_init(). These boards need to call cpu_eth_init() explicitly now with the new eth_init rework. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Autocalibration can set RDCC to over aggressive value.Adam Graham2009-02-12-36/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The criteria of the AMCC SDRAM Controller DDR autocalibration U-Boot code is to pick the largest passing write/read/compare window that also has the smallest SDRAM_RDCC.[RDSS] Read Sample Cycle Select value. On some Kilauea boards the DDR autocalibration algorithm can find a large passing write/read/compare window with a small SDRAM_RDCC.[RDSS] aggressive value of Read Sample Cycle Select value "T1 Sample". This SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of "T1 Sample" proves to be to aggressive when later on U-Boot relocates into DDR memory and executes. The memory traces on the Kilauea board are short so on some Kilauea boards the SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of "T1 Sample" shows up as a potentially valid value for the DDR autocalibratiion algorithm. The fix is to define a weak default function which provides the minimum SDRAM_RDCC.[RDSS] Read Sample Cycle Select value to accept for DDR autocalibration. The default will be the "T2 Sample" value. A board developer who has a well defined board and chooses to be more aggressive can always provide their own board specific string function with the more aggressive "T1 Sample" value or stick with the default minimum SDRAM_RDCC.[RDSS] value of "T2". Also put in a autocalibration loop fix for case where current write/read/compare passing window size is the same as a prior window size, then in this case choose the write/read/compare result that has the associated smallest RDCC T-Sample value. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix problem with CONFIG_MAX_MEM_MAPPED in include/asm-ppc/config.hStefan Roese2009-02-12-3/+2
| | | | | | | | | | CONFIG_SDRAM_PPC4xx_IBM_DDR2 is not set when include/asm-ppc/config.h is included. So for katmai, CONFIG_MAX_MEM_MAPPED will get set to 256MB. It makes perfect sense to set CONFIG_MAX_MEM_MAPPED to 2GB for all PPC4xx boards right now. Signed-off-by: Stefan Roese <sr@denx.de>
* Coding style cleanup; update CHANGELOGWolfgang Denk2009-02-12-54/+2440
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add feature-removal-schedule.txtPeter Tyser2009-02-11-0/+37
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* 8xx serial, smc: Coding-Style cleanup serial SMC driverHeiko Schocher2009-02-11-48/+24
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* 8xx serial, smc: add configurable SMC Rx buffer lenHeiko Schocher2009-02-11-38/+58
| | | | | | | | | | | | | | This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN. With this option it is possible to allow the receive buffer for the SMC on 8xx to be greater then 1. In case CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the old version. When defining CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE must be defined to setup the maximum idle timeout for the SMC. Signed-off-by: Heiko Schocher <hs@denx.de>
* common/{hush, kgdb, serial}.c: build by COBJS-$(...) in MakefileMike Frysinger2009-02-11-16/+3
| | | | | | | | Move global '#ifdef CONFIG_xxx .... #endif' out of the .c files and into the COBJS-$(CONFIG_xxx) in the Makefile. Also delete unused var in kgdb code in the process. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* bzip2: move ifdef handling to Makefile COBJS-$(...)Mike Frysinger2009-02-11-20/+5
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Fix whitespace damage: double space changed to a tabJerry Van Baren2009-02-11-6/+6
| | | | | | | | | | At some point an intentional double space at the end of the sentence got changed into a tab in the GPL header line: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the This patch fixes the damage. Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
* Merge branch 'master' of git://git.denx.de/u-boot-cfi-flashWolfgang Denk2009-02-11-1/+4
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| * cfi: make flash_get_info() non staticHeiko Schocher2009-02-11-1/+4
| | | | | | | | | | | | | | | | | | | | | | If on your board is more than one flash, you must know the size of every single flash, for example, for updating the DTS before booting Linux. So make this function flash_get_info() extern, and you can have all info about your flashes. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | net: removed board-specific CONFIGs from MPC5xxx FEC driverBen Warren2009-02-09-52/+48
| | | | | | | | | | | | | | Added new CONFIG options for the three type of MAC-PHY interconnect and applied them all relevant board config files Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | net/sntp.c: move ifdef into Makefile COBJS-$(...)Mike Frysinger2009-02-09-5/+1
| | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | tsec: Fix a bug in soft-resettingAndy Fleming2009-02-09-0/+1
| | | | | | | | | | | | | | | | | | | | SOFT_RESET must be asserted for at least 3 TX clocks. Usually, that's about 30 clock cycles, so it's been mostly working. But we had no guarantee, and at slower bitrates, it's just over a microsecond (over 1000 clock cycles). This enforces a 2 microsecond gap between assertion and deassertion. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Fix 100Mbs ethernet operation on sh7763 based boardsSimon Munton2009-02-09-1/+1
| | | | | | | | | | | | | | | | 100Mbs ethernet does not work on sh7763 chips due to the wrong value being used in the GECMR register. Following diff fixes the problem Signed-off-by: Simon Munton <simon@nidoran.m5data.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Fix MPC8260 with ethernet on SCCksi@koi8.net2009-02-09-1/+1
|/ | | | | | | | This fixes MPC8260 compilation with ethernet on SCC. Probably was a typo or something... Signed-off-by: Sergey Kubushyn <ksi@koi8.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* 82xx serial, smc: Coding-Style cleanup serial SMC driverHeiko Schocher2009-02-10-36/+18
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* 82xx serial, smc: add configurable SMC Rx buffer lenHeiko Schocher2009-02-10-37/+68
| | | | | | | | | | | | | | This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN. With this option it is possible to allow the receive buffer for the SMC on 82xx to be greater then 1. In case CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the old version. When defining CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE must be defined to setup the maximum idle timeout for the SMC. Signed-off-by: Heiko Schocher <hs@denx.de>
* ppc: Fix roll over bug in flush_cache()Kumar Gala2009-02-10-2/+4
| | | | | | | | If we call flush_cache(0xfffff000, 0x1000) it would never terminate the loop since end = 0xffffffff and we'd roll over our counter from 0xfffffe0 to 0 (assuming a 32-byte cache line) Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc: Move CONFIG_MAX_MEM_MAPPED to common config.hKumar Gala2009-02-10-6/+8
| | | | | | | | Moved CONFIG_MAX_MEM_MAPPED to the asm/config.h so its kept consistent between the two current users (lib_ppc/board.c, 44x SPD DDR2). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Stefan Roese <sr@denx.de>
* Add an architecture specific config.h for common definesKumar Gala2009-02-10-0/+289
| | | | | | | | | | We have common defines that we duplicate in various ways. Having an arch specific config.h gives us a common location for those defines. Eventually we should be able to replace this when we have proper Kconfig support. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8641hpcn: Change PCI MEM pci bus addressBecky Bruce2009-02-10-1/+10
| | | | | | | | | | Now that the rest of u-boot can support it, change the PCI bus address of the PCI MEM regions from 0x80000000 to 0xc0000000, and use the same bus address for both PCI1 and PCI2. This will maximize the amount of PCI address space left over to map RAM on systems with large amounts of memory. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* drivers/block/ahci: Fix pci mapping bugBecky Bruce2009-02-10-5/+2
| | | | | | | | The code assumes that the pci bus address and the virtual address used to access a region are the same, but they might not be. Fix this assumption. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* MPC8641HPCN: Enable CONFIG_ADDR_MAPBecky Bruce2009-02-10-0/+2
| | | | Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* mpc8641hpcn: Clean up PCI mapping conceptsBecky Bruce2009-02-10-11/+16
| | | | | | | | | Clean up PCI mapping concepts in the 8641 config - rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* mpc86xx: Add support to populate addr map based on BATsBecky Bruce2009-02-10-4/+69
| | | | | | | If CONFIG_ADDR_MAP is enabled, update the address map whenever we write a bat. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* powerpc: Move duplicated BAT defines to mmu.hBecky Bruce2009-02-10-183/+64
| | | | | | | | | | | The BAT fields are architected; there's no need for these to be in cpu-specific files. Drop the duplication and move these to include/asm-ppc/mmu.h. Also, remove the BL_xxx defines that were only used by the alaska board, and switch to using the BATU_BL_xxx defines used by all the other boards. The BL_ defines previously in use had to be shifted into the proper position for use, which was inefficient. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* drivers/pci: Create pci_map_bar functionBecky Bruce2009-02-10-4/+43
| | | | | | | | It is no longer always true that the pci bus address can be used as the virtual address for pci accesses. pci_map_bar() is created to return the virtual address for a pci region. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* mpc8641hpcn: Set up outbound pci windows before inboundBecky Bruce2009-02-10-6/+6
| | | | | | | | | | Because the inbound pci windows are mapped generously, set up the more specific outbound windows first. This way, when we search the pci regions for something, we will hit on the more specific region. This can actually be a problem on systems with large amounts of RAM. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* mpc8641hpcn: Use physical address in flash banks defintionBecky Bruce2009-02-10-1/+1
| | | | | | | If the VA and PA of the flash aren't the same, the banks list should be initialized to hold the physical address. Correct this. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/masterWolfgang Denk2009-02-07-359/+1364
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| * pci: give preference to non-PCI_REGION_SYS_MEMORY regions when matchingKumar Gala2009-02-07-24/+78
| | | | | | | | | | | | | | | | | | | | When we search for an address match in pci_hose_{phys_to_bus,bus_to_phys} we should give preference to memory regions that aren't system memory. Its possible that we have over mapped system memory in the regions and we want to avoid depending on the order of the regions. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * pci: Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY for clarityKumar Gala2009-02-07-43/+43
| | | | | | | | | | | | | | | | | | | | The PCI_REGION_MEMORY and PCI_REGION_MEM are a bit to similar and can be confusing when reading the code. Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY to clarify its used for system memory mapping purposes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2009-02-07-4/+27
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| | * NAND: Add timeout for reset commandPeter Tyser2009-02-06-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | Without the timeout present an infinite loop can occur if the NAND device is broken or not present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * NAND: Silence warning when CONFIG_SYS_NAND_QUIET_TESTPeter Tyser2009-02-06-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit cfa460adfdefcc30d104e1a9ee44994ee349bb7b removed support for disabling the "No NAND device found!!!" warning when CONFIG_SYS_NAND_QUIET_TEST was defined. This re-adds support for silencing the warning. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * NAND: Fixed invalid pointers to static relocated chip namesValeriy Glushkov2009-02-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dear Wolfgang, You are right, the patch was ugly. The new one seems to be better. Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * env_nand: fix env memory releasederek@siconix.com2009-02-06-2/+4
| | | | | | | | | | | | | | | | | | | | | This fixes a bug that tmp environment memory not being released. Signed-off-by: Derek Ou <dou@siconix.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-coldfireWolfgang Denk2009-02-07-26/+147
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| | * | Coldfire: M527x: Add missing GPIO register address definesRichard Retanubun2009-02-06-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | Add missing GPIO registers address definition for Coldfire M5271. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
| | * | Coldfire: mcfmii: Allow non-autonegotiating PHYs to use mii commandRichard Retanubun2009-02-06-8/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modified mii_init to support boards with PHYs that are not set to autonegotiate, but still want to use u-boot's mii commands to probe the smi bus. Such PHYs will not set the Autonegotiate-done bit. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
| | * | Coldfire: Applied baudrate formula of serial_init to serial_setbrgRichard Retanubun2009-02-06-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Applied the patch for baudrate divider value truncation for serial_init to serial_setbrg as well. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
| | * | Coldfire: M5271EVB: Board header update (dependencies)Richard Retanubun2009-02-06-10/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup for M5271EVB: Added clarification on the use of CONFIG_SYS_CLOCK. Modified to use u-boot's HUSH parser. Cleanup on environment settings. Removed compiler warning by defining CONFIG_SYS_CS0_* Dependencies: Added the use of CONFIG_SYS_MCF_SYNCR for clock multiplier. This depends on a patch to include/asm-m68k/m5271.h that defines the multiplier and divider ratios. Removed the definition of CONFIG_SYS_FECI2C. This depends on a patch that removes the use of it in cpu/mcf52x2/cpu_init.c Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
| | * | Coldfire: M5271: Allow board header file to specify clock multiplierRichard Retanubun2009-02-06-3/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | M5271 dynamic clock multiplier. It is currently fixed at 100MHz. Allow the board header file to set their own multiplier and divider. Added the #define for the multiplier and divider to the cpu header file. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
| | * | Coldfire: M5271EVB: Remove usage of CONFIG_SYS_FECI2CRichard Retanubun2009-02-06-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Discontinue the use of CONFIG_SYS_FECI2C (only used by M5271EVB). Use read-modify-write to activate the FEC pins without disabling I2C. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
| | * | Coldfire: cmd_bdinfo cleanupRichard Retanubun2009-02-06-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_M68K bdinfo cleanup: Fixed compiler warning about baudrate printing. format '%d' expects type 'int', but argument 2 has type 'long unsigned int'. Added printing of "cpufreq" Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
| | * | Coldfire: Fix half-baud UART by adding M5271 to Coldfire v2 core listRichard Retanubun2009-02-06-1/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | Added the CONFIG_M5271 to the list of Coldfire V2 processor. This was causing the bus clock (not CPU clock) to be declared twice as fast as it actually is. This causes UARTS to operate at half the specified baudrate. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
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