summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* net: Fix download command parsingPeter Tyser2008-12-04-8/+12
| | | | | | | | | | | | | | | | When CONFIG_SYS_HUSH_PARSER is defined network download commands with 1 argument in the format 'tftp "/path/file"' do not work as expected. The hush command parser strips the quotes from "/path/file" which causes the network commands to interpret "/path/file" as an address instead of the intended filename. The previous check for a leading quote in netboot_common() was replaced with a check which ensures only valid numbers are treated as addresses. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-at91Wolfgang Denk2008-12-05-16/+15
|\
| * at91rm9200dk: Fix typoJean-Christophe PLAGNIOL-VILLARD2008-12-02-1/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * AT91: remove non supported board AT91RM9200DF macroJean-Christophe PLAGNIOL-VILLARD2008-12-02-2/+2
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * mtd/dataflash.c: fix a problem with the last partitionIlko Iliev2008-12-02-1/+1
| | | | | | | | | | | | | | | | | | This patch fix the problem that only the [NB_DATAFLASH_AREA - 1] dataflash partition can be defined to use the area to the end of dataflash size. Now it is possible to have only one dataflash partition from 0 to the end of of dataflash size. Signed-off-by: Ilko Iliev <iliev@ronetix.at>
| * fix some coding style violations.Ilko Iliev2008-12-02-13/+12
| | | | | | | | | | | | This patch fix some coding style violations. Signed-off-by: Ilko Iliev <iliev@ronetix.at>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2008-12-05-429/+477
|\ \
| * | Remove non-ascii characters from fat codeRemy Bohmer2008-12-04-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code contains some non-ascii characters in comment lines and code. Most editors do not display those characters properly and editing those files results always in diffs at these places which are usually not required to be changed at all. This is error prone. So, remove those weird characters and replace them by normal C-style equivalents for which the proper defines were already in the header. Signed-off-by: Remy Bohmer <linux@bohmer.net>
| * | Remove obsolete command (apply afte USB style patch, 80 chars strict)Michael Trimarchi2008-11-28-9/+0
| | | | | | | | | | | | | | | | | | | | | Remove USB obsolete commmand Signed-off-by: Michael Trimarchi <trimarchi@gandalf.sssup.it> Signed-off-by: Remy Böhmer <linux@bohmer.net>
| * | USB style patch, 80 chars strictMichael Trimarchi2008-11-28-392/+465
| | | | | | | | | | | | | | | | | | | | | USB Code style patch Signed-off-by: Michael Trimarchi <trimarchi@gandalf.sssup.it> Signed-off-by: Remy Böhmer <linux@bohmer.net>
| * | drivers/usb: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-11-28-29/+13
| |/ | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Remy Böhmer <linux@bohmer.net>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2008-12-05-155/+79
|\ \
| * | 85xx: fix the wrong DDR settings for MPC8572DSDave Liu2008-12-04-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | The default DDR freq is 400MHz or 800M data rate, the old settings is pure wrong for the default case. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | 85xx: init gd as early as possibleKumar Gala2008-12-04-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | Moved up the initialization of GD so C code like set_tlb() can use gd->flags to determine if we've relocated or not in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
| * | 85xx: Fix relocation of CCSRBARKumar Gala2008-12-04-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the virtual address for CCSRBAR is the same after relocation but the physical address is changing we'd end up having two TLB entries with the same VA. Instead we new us the new CCSRBAR virt address + 4k as a temp virt address to access the old CCSRBAR to relocate it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
| * | FSL: Moved BR_PHYS_ADDR for localbus to common headerKumar Gala2008-12-04-9/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BR_PHYS_ADDR macro is useful on all machines that have local bus which is pretty much all 83xx/85xx/86xx chips. Additionally most 85xx & 86xx will need it if they want to support 36-bit physical addresses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
| * | 85xx: Add PORDEVSR_PCI1 definePeter Tyser2008-12-04-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | drivers/fsl_pci_init: Fix inbound window mapping bugBecky Bruce2008-12-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code will cause the creation of a 4GB window starting at 0 if we have more than 4GB of RAM installed, which overlaps with PCI_MEM space and causes pci_bus_to_phys() to return erroneous information. Limit the size to 4GB - 1; which causes the code to create one 2GB and one 1GB window instead. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
| * | Removed unused CONFIG_L1_INIT_RAM symbol.Jon Loeliger2008-12-03-30/+0
| | | | | | | | | | | | | | | | | | | | | | | | Prevent further viral propogation of the unused symbol CONFIG_L1_INIT_RAM by just removing it. Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | fsl ddr skip interleaving if not supported.Ed Swarthout2008-12-03-12/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | Removed while(1) hang if memctl_intlv_ctl is set wrong. Remove embedded tabs from strings. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
| * | 85xx: socrates: fix DDR SDRAM tlb entry configurationAnatolij Gustschin2008-12-03-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | since commit be0bd8234b9777ecd63c4c686f72af070d886517 tlb entry for socrates DDR SDRAM will be reconfigured by setup_ddr_tlbs() from initdram() causing an inconsistency with previously configured DDR SDRAM tlb entry from tlb_table: socrates>l2cam 7 9 IDX PID EPN SIZE V TS RPN U0-U3 WIMGE UUUSSS 7 : 00 00000000 256MB V 0 -> 0_00000000 0000 -I-G- ---RWX 8 : 00 00000000 256MB V 0 -> 0_00000000 0000 ----- ---RWX 9 : 00 10000000 256MB V 0 -> 0_10000000 0000 ----- ---RWX This patch makes the presence of the DDR SDRAM tlb entry in the tlb_table dependent on CONFIG_SPD_EEPROM to avoid this inconsistency. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Andy Fleming <afleming@freescale.com>
| * | 85xx: Add CPU 2 errata workaround to all 8548 boardsPeter Tyser2008-12-03-19/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | 85xx: the DDR tlb is missed for the !CONFIG_SPD_EEPROM caseDave Liu2008-12-03-8/+4
| | | | | | | | | | | | | | | | | | | | | we need TLB entry for DDR at !SPD case. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | 85xx: remove the unused ddr_enable_ecc in the board fileDave Liu2008-12-03-77/+5
| |/ | | | | | | | | | | | | | | | | | | The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2008-12-05-0/+1
|\ \
| * | OneNAND: Add missing mtd info struct before calling onenand_erase()Stefan Roese2008-12-02-0/+1
| |/ | | | | | | | | | | | | | | Without this patch "saveenv" crashes when MTD partitions are enabled (e.g. for use in UBI) via CONFIG_MTD_PARTITIONS. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | mpc8641: Fix error in READMEBecky Bruce2008-12-01-5/+5
| | | | | | | | | | | | | | I made some updates to the code that didn't make it into the README - fix this Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* | Removed unused CONFIG_L1_INIT_RAM symbol.Jon Loeliger2008-12-01-30/+0
| | | | | | | | | | | | | | Prevent further viral propogation of the unused symbol CONFIG_L1_INIT_RAM by just removing it. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | 86xx: Fix non-64-bit compilation problems.Jon Loeliger2008-12-01-0/+28
|/ | | | | | | | | | | Introducing 64-bit (36-bit) support for the MPC8641HPCN failed to accomodate the other two 86xx boards. Introduce definitions for CONFIG_SYS_CCSRBAR_PHYS_{LOW,HIGH} CONFIG_SYS_CCSR_DEFAULT_DBAT{U,L} and CONFIG_SYS_CCSR_DEFAULT_IBAT{U,L} with nominal 32-bit values. Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Becky Bruce <becky.bruce@freescale.com>
* NAND: Fix misplaced return statement in nand_{read,write}_skip_bad().Scott Wood2008-11-25-6/+6
| | | | | | | | This caused the operation to be needlessly repeated if there were no bad blocks and no errors. Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2008-11-25-68/+65
|\
| * ARM: OMAP: Convert IO macrosDirk Behme2008-11-21-67/+64
| | | | | | | | | | | | Convert IO macros to readx/writex. Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
| * lib_arm: do_bootm_linux() - correct a small mistakeIlko Iliev2008-11-21-1/+1
| | | | | | | | | | | | | | | | | | This patch corrects a small bug in the "if" condition: the parameter "flag" is 0 and the "if" condition is always true. The result is - the boom command doesn't start the kernel. Affected targets: all arm based. Signed-off-by: Ilko Iliev <iliev@ronetix.at>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2008-11-25-1479/+167
|\ \
| * | ppc4xx: ml300 remove Xilinx BSP from ml300 folderMichal Simek2008-11-25-432/+0
| | | | | | | | | | | | | | | | | | | | | | | | This BSP should be outside u-boot source tree. The second reason is that xilinx ppc405 was moved to generic platform. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Remove unused featuresMatthias Fuchs2008-11-25-50/+7
| | | | | | | | | | | | | | | | | | | | | | | | This patch disables some unused features from the PCI405 configuration to keep U-Boot image size below 192k. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Use correct io accessors for PCI405Matthias Fuchs2008-11-25-35/+16
| | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Remove unused code from PCI405 codeMatthias Fuchs2008-11-25-871/+0
| | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: ML2 shouldn't include the 4xx EMAC driverStefan Roese2008-11-21-1/+0
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: katmai: Change default configYuri Tikhonov2008-11-21-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables support for EXT2, and increases the CONFIG_SYS_BOOTMAPSZ size for the default configuration of the katmai boards to use them as the RAID-reference AMCC setups. EXT2 enabling allows one to boot kernels from the EXT2 formatted Compact Flash cards. CONFIG_SYS_BOOTMAPSZ increasing allows one to boot the Linux kernels, which use PAGE_SIZE of 256KB. Otherwise, the memory area with DTB file (which is placed at the end of the bootmap area) will turn out to be overlapped with the BSS segment of the 256KB kernel, and zeroed in early_init() of Linux. Actually, increasing of the bootmap size could be done via setting of the bootm_size U-Boot variable, but it looks like the current U-Boot implementation have some bootm_size- related functionality lost. In many places through the U-Boot code the CONFIG_SYS_BOOTMAPSZ definition is used directly (instead of trying to read the corresponding value from the environment). The same is truth for the boot_jump_linux() function in lib_ppc/bootm.c, where U-Boot transfers control to Linux passing the CONFIG_SYS_BOOTMAPSZ (not bootm_size) value to the booting kernel. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initializationDave Mitchell2008-11-21-9/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Expanded OCM TLB to allow access to 64K OCM as well as 256K of internal SRAM. Adjusted internal SRAM initialization to match updated user manual recommendation. OCM & ISRAM are now mapped as follows: physical virtual size ISRAM 0x4_0000_0000 0xE300_0000 256k OCM 0x4_0004_0000 0xE304_0000 64k A single TLB was used for this mapping. Signed-off-by: Dave Mitchell <dmitch71@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRsDave Mitchell2008-11-21-70/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and L2 cache DCRs from ppc440.h to this new header. Also converted these DCR defines from lowercase to uppercase and modified referencing modules to use them. Signed-off-by: Dave Mitchell <dmitch71@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Delete unused definitions for SDR0_DDRCFG from ppc4xx.hSteven A. Falco2008-11-21-12/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The definitions of bits in SDR_CFG are incorrect, and not used within U-Boot. Therefore, they can be removed. The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions, and are unused, so they can be removed too. A definition for SDR0_DDRCFG is added. Signed-off-by: Steven A. Falco <sfalco@harris.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Clear all potentially pending exceptions in MCSRStefan Roese2008-11-20-0/+4
| |/ | | | | | | | | | | | | | | This is needed on Canyonlands which still has an exception pending while running relocate_code(). This leads to a failure after trap_init() is moved to the top of board_init_r(). Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2008-11-25-7/+9
|\ \
| * | powerpc: 83xx: add missing TIMING_CFG1_CASLAT_* definesHeiko Schocher2008-11-19-1/+3
| | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: Improve the performance of DDR memoryHoward Gregory2008-11-19-6/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | modify the CAS timings. my understanding is that these settings decrease various wait times in the DDR interface. Because these wait times are in clock cycles, and the DDR clock on the 8315 RDB runs slower than on some other 83xx platforms, we can dial down these values without a problem, thereby decreasing the latency of memory a little. Signed-off-by: Howard Gregory <Greg.Howard@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ubiWolfgang Denk2008-11-25-99/+13630
|\ \
| * | UBI: Add proof-of-concept CFI flash supportPiotr Ziecik2008-11-24-1/+9
| | | | | | | | | | | | | | | | | | | | | With this patch UBI can be used on CFI flash chips. Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | mtd: Remove a printf() from add_mtd_device().Piotr Ziecik2008-11-24-2/+0
| | | | | | | | | | | | | | | | | | | | | Remove a printf() from add_mtd_device(), which produces spurious output. Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
generated by cgit v1.1 at 2024-11-29 23:39:20 +0000