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* ENGR00255481 mx6: Update equation for thermal sensorrel_imx_3.0.35_1.1.3imx_v2009.08_1.1.0Anson Huang2013-03-27-1/+22
| | | | | | | Use universal equation and 25C's calibration data to get thermal sensor's ratio. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00243038: make get_mmc_env_devno to be a generic functionJason Liu2013-02-04-85/+17
| | | | | | | | | | | | | Currently, each board has one same function called get_mmc_env_devno, this will make the code a little bit duplication. We can make the get_mmc_env_devno to be a generic function, thus we can remove all the scattered function definition in each board file. And the patch also remove the boot check. Firstly, this check is needless, secondly, this will break the second boot support,for example: first boot from SPI, then switch to SD/MMC boot. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00235821 mx6: correct work flow of PFDsrel_imx_3.0.35_1.1.1rel_imx_3.0.35_1.1.0Anson Huang2012-12-13-0/+31
| | | | | | | | | | PFDs need to be gate/ungate after PLL lock to reset PFDs to right state. Otherwise PFDs may lose correct state in state-machine, then no output clock. For i.MX6DL and i.MX6SL, ROM have taken care of PFD396 already since the bus clock needs it. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00235817 mx6: use SNVS LPGPR register to store boot mode value.Zhang Jiejing2012-12-12-4/+7
| | | | | | | | | | | | | | | | | After using POR reset, the content in SRC will be reset. See RM: 63.5.1.2.3 IPP_RESET_B(POR) Because POR reset will reset most of register in IC, so use SNVS_LP General Purpose Register (LPGPR) to store the boot mode value. Below copy from SNVS_BlockGuide.pdf: The SNVS_LP General Purpose Register provides a 32 bit read write register, which can be used by any application for retaining 32 bit data during a power-down mode This Patch will use [7,8] bits of this register. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00235564: i.mx6 u-boot: change plugin to use ROM API table for code jumpEric Sun2012-12-12-12/+21
| | | | | | | | | | | | | | The original plugin code uses hard coded assembly address for the code jump to "pu_irom_hwcnfg_setup", it can only works for specific chip version, for a new TO, the assembly address will change, and the plugin code simply fails. In fact there is an API entry table in a fixed ROM location, it contains the entry to the "pu_irom_hwcnfg_setup". This patch retrieve the jump address from this API table, thus avoid the limitation for current implementation. Apply to all plugin enabled platforms, MX6Q/DL ARM2, MX6SL ARM2/EVK Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00236337: mx6/clock: emi_slow clock rate is not printed out correctlyJason Liu2012-12-10-1/+1
| | | | | | | This issue due to PODF is not used correcly, need use the following instead: ACLK_EMI_SLOW_PODF_OFFSET, the original used ACLK_EMI_PODF_OFFSET was wrong. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR000234991 MX6DL/ARD: Two boards met kernel dump during boot upJason Liu2012-12-06-8/+8
| | | | | | | | | | | | The issue is caused by DDR script changed io pads to DDR differential mode but forget to do the calibration data update. This patch updated the DDR script on MX6DL ARD board based on the commit on the ddr-scripts-rel: 53121e0 Updated MX6DL and MX6DQ ARD and SabreSD scripts with new calibration values for IO pads set to differential mode; Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00233168 - U-Boot fails to boot from eMMCOliver Brown2012-11-29-197/+81
| | | | | | Aligning the flash header to remove the boot plugin as in previous release. Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
* ENGR00234353-3: mx6q_sabreauto remove EIM_A24 nor padsAdrian Alonso2012-11-29-2/+0
| | | | | | | | | | * Remove EIM_A24 nor pads as this are used for io steer control and are not connectted to NOR flash memory. * Fix conflict access when it's used as io control gpio. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00234353-2: mx6q_sabreauto_weimnor fix redundant env offsetAdrian Alonso2012-11-29-6/+9
| | | | | | | | | | | | | | | | | | | | * Fix redundant enviroment offset * Disable I2C support as they share pads * Enable flash empty information * weim-nor partition layout +-----------------+ 0x08000000 + u-boot + +-----------------+ 0x08040000 (256k) + u-boot env + +-----------------+ 0x08060000 (128k) + u-boot redundat + +-----------------+ 0x08080000 (128k) + Kernel + +-----------------+ 0x08480000 (4M) + Rootfs + +-----------------+ (~27M) Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00234353-1: mx6_sabreauto fix weim-nor bootAdrian Alonso2012-11-29-21/+27
| | | | | | | | | | | | | * Fix weim-nor boot failure * Group weim-nor conflict modules If not defined CONFIG_CMD_WEIMNOR enable SPI-NOR and I2C (default) else enable weim-nor * Remove FLASH_SIZE macro, size is query by CFI driver * Enable flash empty information Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00233928 i.mx6q/sabresd: update the DDR script for i.MX6Q sabresd boardJason Liu2012-11-26-108/+102
| | | | | | | | This commit update the DDR script for i.MX6Q sabresd board based on the top of the following commit on ddr-scripts-rel: 02b8a73 removed some verbage (comments) from init, no changes to actual init Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00233366-5 Anatop PFUZE: move LDO bypass code to kernelRobin Gong2012-11-19-125/+3
| | | | | | | move LDO bypass code and one PFUZE1.0 workaround code to kernel. Remove CONFIG_MX6_INTER_LDO_BYPASS in u-boot Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00233933 i.mx6dl/sabresd: update the DDR script for i.MX6DL sabresd boardJason Liu2012-11-16-96/+90
| | | | | | | | This patch update the DDR script for the i.MX6DL sabresd board The script is based on top the commit on ddr-scripts-rel: 02b8a73 removed some verbage (comments) from init, no changes to actual init Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00233709-2 i.mx6q/sabreauto: update the DDR script for i.mx6q AI board:Jason Liu2012-11-16-110/+105
| | | | | | | | | This commit update the DDR script for i.MX6Q Sabreauto(AI) board. The script is based on top the commit on ddr-scripts-rel: 02b8a73 removed some verbage (comments) from init, no changes to actual init Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00233709-1 i.mx6dl/sabreauto: update the DDR script for i.mx6dl AI board:Jason Liu2012-11-16-18/+17
| | | | | | | | | This commit update the DDR script for i.MX6DL Sabreauto(AI) board. The script is based on top the commit on ddr-scripts-rel: 02b8a73 removed some verbage (comments) from init, no changes to actual init Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00233881 Camera mx6q_sabresd:swap VGEN5&VGEN3 to fix camera streaks issueRobin Gong2012-11-16-0/+27
| | | | | | | | | On mx6q_sabresd RevC board, there is camera streaks issue, after HW check, they think there is current limit risk because VDDHIGH_IN and camera 2.8V power share the same VGEN5, they suggest seprate them, so we use VGEN5 as VDDHIGH_IN and use VGEN3 as camera 2.8V power supply. Also increase VDDHIG_IN from 2.8V to 3.0V to align with latest datasheet Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00233716-2: mx6q_sabreauto flash u-boot into spi-nor fails to bootAdrian Alonso2012-11-15-28/+24
| | | | | | | | | | * Fix spi-nor boot failure * Fix unconfigured gpio pad setting when spi-nor or weim-nor on steer control gpios * Group gpio access only when I2C is enabled and restore route paths to avoid conflicts on shared pads Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00233716-1: mx6q_sabreauto aling spi-nor environment offssetAdrian Alonso2012-11-15-12/+12
| | | | | | | | | | | | | | | * Aling spi-nor environment offsset to 256k this allows a partition layout +-----------------+ 0x0 + bootloader + +-----------------+ 0x40000 (256k) + boot env + +-----------------+ 0x42000 (8k) + kernel + +-----------------+ Remaining space (~3.7M) Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00233730 PFUZE mx6q_sabresd: remove extra increase for PFUZE toleranceRobin Gong2012-11-15-14/+0
| | | | | | | There is no more tolerance issue on PFUZE, it will be only 25mV, so that we no need increase VDDSOC_IN from 1.375V to 1.425V. Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00233307 Need secure/encrypted boot for Widevine support.Dan Douglass2012-11-12-12/+107
| | | | | | | | | | | | | | | | | | | | * Adding the config option CONFIG_SECURE_BOOT to the SabreSD board, but defaulting it to be disabled. Removed the CONFIG_SECURE_BOOT key from mx6q_arm2_android.h so that it is only in one file, include/configs/mx6q_arm2.h * Fixed up an address alignment check in authenticate_image(). The test would fail in the event the address is already aligned. Also, added some debug code which can be enabled to assist in testing secure images. * Added support for authenticating an image when using booti. * Adding support for secure boot to the Sabre SD board. * Added support for encrypted boot to mx6q arm2 board linker script. Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
* ENGR00232682 mx6sl snvs: fix long press ONOFF failed issue in u-bootLin Fuzhen2012-11-09-0/+27
| | | | | | | | | the same as TKT104835 reported on MX6Q/DL Need set Power Supply Glitch to 0x41736166 and clear Power Supply Glitch Detect bit when POR or reboot or power on, otherwise system could not be power off anymore, it will power up auto agian. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00230364 - imx6sl: FEC: fix cycle reboot fail in EVK platform for bootp.Fugang Duan2012-11-08-2/+9
| | | | | | | | | | | In some imx6sl evk boards, fec cannot work fine while doing cycle reboot via to execute command "reboot" in kernel. The root cause: phys clock source is closed when reboot system, and LAN8720 status machine is in disorder. So it needs to do phy hardware reset to make phy enter normal state machine. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR002232258 MX6Q-ARM2: add a NAND boot config for ubootHuang Shijie2012-11-02-0/+273
| | | | | | add a new config for NAND boot in the mx6q-arm2 board. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00231891-2 gpmi: fix the 4k page size limitHuang Shijie2012-10-31-2/+2
| | | | | | | We may use the 8K page nand now. So expand the page size from 4k to 8K. Also expand the oobsize to 1K size. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00231891-1 gpmi: replace the hardcodeHuang Shijie2012-10-31-9/+3
| | | | | | | We have get the right infomation when we call the set_geometry(). So we replace the hardcode with the proper gpmi_info's values. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00231781 fsl common:Align reversed color logo to standardLiu Ying2012-10-31-612/+612
| | | | | | | | | This patch removes the 'semiconductor' word in the freescale reversed color logo to align with the standard(preferred) one which can be found at the link: http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-logosdisclaim Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00231581 BCH: fix the wrong data size macros in BCHimx-android-13.5.0-gaHuang Shijie2012-10-30-3/+8
| | | | | | | | | | | | | In the mx23/mx28, the DATA0_SIZE/DATAN_SIZE of the BCH's HW_BCH_FLASH1LAYOUT0/HW_BCH_FLASH0LAYOUT1 should be the real bytes length of the data chunk 0 and data chunk 1. But in the mx6q/mx50, the DATA0_SIZE/DATAN_SIZE of the BCH's HW_BCH_FLASH1LAYOUT0/HW_BCH_FLASH0LAYOUT1 should be multiple of 4 bytes. this patch fixes the wrong macros. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00230967 Enable recovery mode by keys when bootLiGang2012-10-30-23/+92
| | | | | | | | | | 1. Add matrix key support 2. Add recovery mode support by pressing power key and volume down key when boot SW10 on MX6SL-EVK board configed as volume down key. SW1 on MX6SL-EVK board configed as power key Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00231553: MX6SL: Uncovered an issue for I2C parent clockTerry Lv2012-10-30-2/+7
| | | | | | We need to check reg bit to decide I2C parent clock. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00230981-1 pfuze:set all switches to PFM mode in standbyRobin Gong2012-10-26-78/+75
| | | | | | | | | | | To save power, set all switches to PFM mode in standby,although PFM mode need 6% tolerance.But it will be implemented in kernel, and move the workaround which all buck switches need be configured PWM mode on PF100 1.0 Another two change is: 1. u-boot will print PFUZE device id and revision id. 2. add value check for i2c write and read. Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00231155 add enable_wait_mode=off for all the mx6q/dl mfg ubootTony LIU2012-10-25-11/+20
| | | | | | | | | - currently only a work around can be applied, the root cause is not identified yet The workaround is to disable wait mode, so all the mfgtool uboot need to add "enable_wait_mode=off" in the cmd line pass to kernel Signed-off-by: Tony LIU <junjie.liu@freescale.com>
* ENGR00230391: Fix build fail issue of sataTerry Lv2012-10-19-3/+5
| | | | | | | | | | | | | | | | | | | | | Fix build fail issue of sata. mx6q_arm2.c: In function 'sata_initialize': mx6q_arm2.c:261:6: error: 'sata_curr_device' undeclared (first use in this function) mx6q_arm2.c:261:6: note: each undeclared identifier is reported only once for each function it appears in mx6q_arm2.c:299:2: warning: implicit declaration of function '__sata_initialize' [-Wimplicit-function-declaration] mx6q_arm2.c: In function 'setup_sata': mx6q_arm2.c:346:6: error: 'sata_curr_device' undeclared (first use in this function) mx6q_arm2.c: At top level: mx6q_arm2.c:81:12: warning: 'system_rev' defined but not used [-Wunused-variable] make[1]: *** [mx6q_arm2.o] Error 1 Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00230104 mx6q_sabreauto_nand: fix fec phy addressAdrian Alonso2012-10-18-1/+2
| | | | | | | * Fix FEC Phy address to 1 * Enable micrel phy support, revA compatibility Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00230334: Fix the mx53_smd_android configNitin Garg2012-10-18-23/+44
| | | | | | | | Update the u-boot config for mx53 smd android to include the correct boot env, enable boot splash, increase the cmdline buffer, tokens and 1G DDR. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00229931 Support for Solo configuration on ARD platformAlejandro Sierra2012-10-17-0/+2569
| | | | | | | | | Added support for Solo configuration on ARD platform. This support was replaced by DL configuration, however it was added again to emulate or use Solo chip on ARD platform. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00229789 AHCI Disable SATA PHY in initializationRichard Zhu2012-10-17-0/+199
| | | | | | | | * disable SATA PHY in default * add sata_initialize() func used to re-initialize SATA when sata is used. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00229711 Add weim-nor argument on uboot config Quad/DLAlejandro Sierra2012-10-16-2/+2
| | | | | | | | Missing argument "weim-nor" on uboot configuration to boot from NOR. Quad/DL Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00229709 Support 2 processors at Linux bootAlejandro Sierra2012-10-16-7/+7
| | | | | | | Remove argument "nosmp" to support dual processor configuration on Linux. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00229817: i.mx6dl/mx6solo_sabresd_config: fix the build issueJason Liu2012-10-16-1/+5
| | | | | | | | | | | This patch fixed the following build issue: mx6q_sabresd.c:1382: undefined reference to `imx_pwm_config' mx6q_sabresd.c:1383: undefined reference to `imx_pwm_enable' And also removed the extra '_' in the config name. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00229614 mx6: disable VDDPU by default, xpu will enable it if needed.Anson Huang2012-10-16-1/+13
| | | | | | | Disable VDDPU_CAP by default, xPU will enable it in driver when they need it. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00229456 Support for 64bit DDR configuration for ARDAlejandro Sierra2012-10-12-16/+125
| | | | | | | Added support for 64bit DDR configuration on DL chip. On ARD platform Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00227413 Change configuration file names on AIAlejandro Sierra2012-10-12-8/+8
| | | | | | | Change configuration file names for AI platform. From solo to DL. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00228238 i.mx6/i.mx6dl: sabresd: add solo-ddr32bit supportJason Liu2012-10-11-2/+478
| | | | | | | | This patch adds the solo-ddr32bit config support. The DDR script got from: http://compass.freescale.net/livelink/livelink/227589697/ MX6DL_init_DDR3_400MHz_32bit_For_SD_1.0.inc.txt?func=doc.Fetch&nodeid=227589697 Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00223797-3 IPUv3:Wait for sw reset finishLiu Ying2012-09-27-1/+4
| | | | | | | | | This patch checks self-clear sw_ipu_rst bit in SCR register of SRC controller to be cleared after setting it to reset IPUv3. This makes sure that IPUv3 finishes sofware resetting. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00223797-2 MX6Q/DL CPU:Do not disable IPU display channelLiu Ying2012-09-27-2/+4
| | | | | | | | | This patch changes to keep IPU display channel being running rather than disable IPU display channel when we leave uboot stage and go to kernel stage. This may support smooth tranistion from Uboot splash screen to kernel stage. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00223797-1 MX6 SabreSD:Align IPU related clocks with kernelLiu Ying2012-09-27-18/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch aligns IPU related clocks with imx_3.0.35(_android) kernel setting to support smooth transition from uboot splash screen to kernel stage. The IPU related clock trees are: 1) MX6DQ SabreSD: ipu1_clk -- osc_clk(24M)->pll2_528_bus_main_clk(528M)->periph_clk(528M) ->mmdc_ch0_axi_clk(528M)->ipu1_clk(264M) ipu1_pixel_clk_x -- osc_clk(24M)->pll2_528_bus_main_clk(528M)-> pll2_pfd_352M(452.57M)->ldb_dix_clk(64.65M)-> ipu1_di_clk_x(64.65M)->ipu1_pixel_clk_x(64.65M) 2) MX6DL SabreSD: ipu1_clk -- osc_clk(24M)->pll3_usb_otg_main_clk(480M)-> pll3_pfd_540M(540M)->ipu1_clk(270M) ipu1_pixel_clk_x -- osc_clk(24M)->pll2_528_bus_main_clk(528M)-> pll2_pfd_352M(452.57M)->ldb_dix_clk(64.65M)-> ipu1_di_clk_x(64.65M)->ipu1_pixel_clk_x(64.65M) Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00223794 MX6 SabreSD:Enable LVDS panel pwm backlightLiu Ying2012-09-27-14/+21
| | | | | | | | | | | | | This patch enables pwm backlight for LVDS panel and stops using gpio backlight to align with kernel to avoid unstable backlight when booting into kernel, as kernel usually uses pwm backlight instead of gpio backlight. Following items are done to support this: 1) Add PWM1 and PWM2 controller base addresses. 2) Change PIN SD1_DAT3 mux from GPIO to PWM1_PWMO. 3) Set default backlight density to 50%. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00226048 Fix weim nor for mfg toolAlejandro Sierra2012-09-26-3/+2
| | | | | | | | Weim interface share pins with I2C. A define was declared to enable weim pins and disable I2C when mfg tool is used. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00225691 NAND support on i.MX6Solo ARDAlejandro Sierra2012-09-24-0/+630
| | | | | | | | NAND support on i.MX6Solo ARD. Two files were added. mx6solo_sabreauto_nand.h --> bootloader's image mx6solo_sabreauto_nand_mfg.h --> mfg tool bootloader Signed-off-by: Alejandro Sierra <b18039@freescale.com>
generated by cgit v1.1 at 2024-11-23 08:20:31 +0000