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* pixis do not print long help if not configuredEd Swarthout2008-10-18-0/+4
| | | | Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* Have u-boot pass stashing parameters into device treeAndy Fleming2008-10-18-0/+11
| | | | | | | | | Some cores don't support ethernet stashing at all, and some instances have errata. Adds 3 properties to gianfar nodes which support stashing. For now, just add this support to 85xx SoCs. Signed-off-by: Andy Fleming <afleming@freescale.com>
* Add DDR options setting on MPC8641HPCN boardHaiying Wang2008-10-18-36/+110
| | | | | | | | | | * Add board specific parameter table to choose correct cpo, clk_adjust, write_data_delay based on board ddr frequency and n_ranks. * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Add ddr interleaving suppport for MPC8572DS boardHaiying Wang2008-10-18-29/+96
| | | | | | | | | | | | | | | | * Add board specific parameter table to choose correct cpo, clk_adjust, write_data_delay, 2T based on board ddr frequency and n_ranks. * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#. * Set memory controller interleaving mode to bank interleaving, and disable bank(chip select) interleaving mode by default, because the default on-board DDR DIMMs are 2x512MB single-rank. * Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Add debug information for DDR controller registersHaiying Wang2008-10-18-0/+13
| | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Check DDR interleaving modeHaiying Wang2008-10-18-5/+181
| | | | | | | | | * Check DDR interleaving mode from environment by reading memctl_intlv_ctl and ba_intlv_ctl. * Print DDR interleaving mode information * Add doc/README.fsl-ddr to describe the interleaving setting Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Pass dimm parameters to populate populate controller optionsHaiying Wang2008-10-18-24/+91
| | | | | | | | | | | | | Because some dimm parameters like n_ranks needs to be used with the board frequency to choose the board parameters like clk_adjust etc. in the board_specific_paramesters table of the board ddr file, we need to pass the dimm parameters to the board file. * move ddr dimm parameters header file from /cpu to /include directory. * add ddr dimm parameters to populate board specific options. * Fix fsl_ddr_board_options() for all the 8xxx boards which call this function. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Make DDR interleaving mode work correctlyHaiying Wang2008-10-18-12/+66
| | | | | | | | | | Fix some bugs: 1. Correctly set intlv_ctl in cs_config. 2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled. 3. Set base_address and total memory for each ddr controller in memory controller interleaving mode. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* 85xx: Enable interrupt and setexpr commands on Freescale 85xx boardsKumar Gala2008-10-18-0/+18
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Improve flash remapping on MPC8572DS & MPC8536DSKumar Gala2008-10-18-14/+10
| | | | | | | | Changing the flash from cacheable to cache-inhibited was taking a significant amount of time due to the fact that we were iterating over the full 256M of flash. Instead we can just flush the L1 d-cache and invalidate the i-cache. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Export invalidate_{i,d}cache and add flush_dcacheKumar Gala2008-10-18-0/+50
| | | | | | | | Added the ability for C code to invalidate the i/d-cache's and to flush the d-cache. This allows us to more efficient change mappings from cache-able to cache-inhibited. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mgcoge, mgsuvd: extract more common codeHeiko Schocher2008-10-18-90/+56
| | | | | | | | in ft_blob_update () for both boards was an unneccessary repetition of code, which this patch moves in a common function for this boards. Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge, mgsuvd: use in_*/out_* accesorsHeiko Schocher2008-10-18-4/+6
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* mgsuvd: fix compiler warning when using soft_i2c driverHeiko Schocher2008-10-18-10/+15
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* mgsuvd: fix coding styleHeiko Schocher2008-10-18-44/+33
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge: Second Flash on CS5 not on CS1Heiko Schocher2008-10-18-1/+1
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* Added arch_lmb_reserve to allow arch specific memory regions protectionKumar Gala2008-10-18-42/+60
| | | | | | | | | Each architecture has different ways of determine what regions of memory might not be valid to get overwritten when we boot. This provides a hook to allow them to reserve any regions they care about. Currently only ppc, m68k and sparc need/use this. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mgcoge: added CONFIG_FIT to support the new u-boot image formatHeiko Schocher2008-10-18-0/+1
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-53844/+53844
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* 74xx/7xx/86xx: Rename flush_data_cache to flush_dcache to match 85xx versionKumar Gala2008-10-18-10/+10
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Expose command table search for sub-commandsKumar Gala2008-10-18-4/+17
| | | | | | | | | Sub-command can benefit from using the same table and search functions that top level commands have. Expose this functionality by refactoring find_cmd() and introducing find_cmd_tbl() that sub-command processing can call. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mgsuvd, mgcoge: added BOOTCOUNT feature.Heiko Schocher2008-10-18-0/+4
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge, mgsuvd: added support for the IVM EEprom.Heiko Schocher2008-10-18-0/+314
| | | | | | | | The EEprom contains some Manufacturerinformation, which are read from u-boot at boot time, and saved in same hush shell variables. Signed-off-by: Heiko Schocher <hs@denx.de>
* hush: add showvar command for hush shell.Heiko Schocher2008-10-18-8/+62
| | | | | | | | | | | | | | | | | | | | This new command shows the local variables defined in the hush shell: => help showvar showvar - print values of all hushshell variables showvar name ... - print value of hushshell variable 'name' Also make the set_local_var() and unset_local_var () no longer static, so it is possible to define local hush shell variables at boot time. If CONFIG_HUSH_INIT_VAR is defined, u-boot calls hush_init_var (), where boardspecific code can define local hush shell variables at boottime. Signed-off-by: Heiko Schocher <hs@denx.de>
* I2C: adding new "i2c bus" Command to the I2C Subsystem.Heiko Schocher2008-10-18-2/+367
| | | | | | | With this Command it is possible to add new I2C Busses, which are behind 1 .. n I2C Muxes. Details see README. Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge, mgsuvd: add board specific I2C deblocking mechanism.Heiko Schocher2008-10-18-2/+213
| | | | | | | | | | | | | | | | | | | | As documented in doc/I2C_Edge_Conditions, adding a board specific deblocking mechanism via CFG_I2C_INIT_BOARD for the mgcoge and mgsuvd board. This code was originally written by Keymile in association with Anatech and Atmel in 1998. The Code toggels the SCL until the SCA line goes to HIGH (max. 16 times). And after this, a start condition is sent. This is another approach to deblock the I2C Bus. The soft I2C driver actually sends 9 clocks with SDA High, and then a stop at the end, to deblock the I2C Bus. Maybe we should use the approach from Keymile as the new standard? Signed-off-by: Heiko Schocher <hs@denx.de>
* soft_i2c: Add CFG_I2C_INIT_BOARD optionHeiko Schocher2008-10-18-0/+11
| | | | | | | This patch adds the option for a boardspecific I2C deblocking mechanism for the soft i2c driver. Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge, mgsuvd: add DTT (LM75) support.Heiko Schocher2008-10-18-0/+18
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* lm75: Make the LM75 MULTI_BUS compatible.Heiko Schocher2008-10-18-0/+6
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* lm75: fix Codingstyle issues.Heiko Schocher2008-10-18-123/+99
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge, mgsuvd: added EEprom support.Heiko Schocher2008-10-18-0/+15
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge, mgsuvd: add I2C support.Heiko Schocher2008-10-18-2/+91
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* soft_i2c: prevent compiler warnings if driver does not use CPU Pins.Heiko Schocher2008-10-18-37/+15
| | | | | | | | | | | | | | | | | | | | | This patch fixes the following warnings, when using the soft_i2c driver using no CPU pins on MPC82xx or MPC8xx systems: soft_i2c.c: In function 'send_reset': soft_i2c.c:93: warning: unused variable 'immr' soft_i2c.c: In function 'send_start': soft_i2c.c:124: warning: unused variable 'immr' soft_i2c.c: In function 'send_stop': soft_i2c.c:146: warning: unused variable 'immr' soft_i2c.c: In function 'send_ack': soft_i2c.c:171: warning: unused variable 'immr' soft_i2c.c: In function 'write_byte': soft_i2c.c:196: warning: unused variable 'immr' soft_i2c.c: In function 'read_byte': soft_i2c.c:244: warning: unused variable 'immr' Signed-off-by: Heiko Schocher <hs@denx.de>
* i2c: add CONFIG_I2C_MULTI_BUS for soft_i2c and mpc8260 i2c driver.Heiko Schocher2008-10-18-0/+72
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* mgcoge: fix Coding Style issues.Heiko Schocher2008-10-18-41/+38
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* I2C: add new command i2c reset.Heiko Schocher2008-10-18-0/+9
| | | | | | | | | | | If I2C Bus is blocked (see doc/I2C_Edge_Conditions), it is not possible to get out of this, until the complete Hardware gets a reset. This new commando calls again i2c_init (and that calls i2c_init_board if defined), which will deblock the I2C Bus. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de>
* mgsuvd, mgcoge: move this 2 boards in one dir.Heiko Schocher2008-10-18-2/+8
| | | | | | | | There are some more extensions, which are for both boards and some more boards from this manufacturer will follow soon. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de>
* hwmon: Add LM63 supportDirk Eibach2008-10-18-0/+176
| | | | | | | | | This patch adds support for the National LM63 temperature sensor with integrated fan control. It's used on the GDSys Neo board (405EP) which will be submitted later. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Acked-by: Stefan Roese <sr@denx.de>
* Add Red Black Tree supportKyungmin Park2008-10-18-0/+551
| | | | | | | Now it's used at UBI module. Of course other modules can use it. If you want to use it, please define CONFIG_RBTREE Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* CONFIG_EFI_PARTITION: Added support for EFI partition in cmd_ext2fs.crichardretanubun2008-10-18-2/+2
| | | | | Added support for CONFIG_EFI_PARTITION to ext2 commands. Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
* Add support for CONFIG_EFI_PARTITION (GUID Partition Table)richardretanubun2008-10-18-4/+603
| | | | | | | | | The GUID (Globally Unique Identifier) Partition Table (GPT) is a part of EFI. See http://en.wikipedia.org/wiki/GUID_Partition_Table Based on linux/fs/partitions/efi.[ch] Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
* FIT: output image load address for type 'firmware', fix message while thereBartlomiej Sieka2008-10-18-3/+9
| | | | | | | Now that the auto-update feature uses the 'firmware' type for updates, it is useful to inspect the load address of such images. Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
* Automatic software update from TFTP serverBartlomiej Sieka2008-10-18-0/+487
| | | | | | | | | | | The auto-update feature allows to automatically download software updates from a TFTP server and store them in Flash memory during boot. Updates are contained in a FIT file and protected with SHA-1 checksum. More detailed description can be found in doc/README.update. Signed-off-by: Rafal Czubak <rcz@semihalf.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
* flash: factor out adjusting of Flash address to the end of sectorBartlomiej Sieka2008-10-18-33/+43
| | | | | | | | | | The upcoming automatic update feature needs the ability to adjust an address within Flash to the end of its respective sector. Factor out this functionality to a new function flash_sect_roundb(). Signed-off-by: Rafal Czubak <rcz@semihalf.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
* net: Make TFTP server timeout configurableBartlomiej Sieka2008-10-18-4/+24
| | | | | | | | | | | | | | | | | | | | | | | | | There are two aspects of a TFTP transfer involving timeouts: 1. timeout waiting for initial server reply after sending RRQ 2. timeouts while transferring actual data from the server Since the upcoming auto-update feature attempts a TFTP download during each boot, it is undesirable to have a long delay when the TFTP server is not available. Thus, this commit makes the server timeout (1.) configurable by two global variables: TftpRRQTimeoutMSecs TftpRRQTimeoutCountMax TftpRRQTimeoutMSecs overrides default timeout when trying to connect to a TFTP server, TftpRRQTimeoutCountMax overrides default number of connection retries. The total delay when trying to download a file from a non-existing TFTP server is TftpRRQTimeoutMSecs x TftpRRQTimeoutCountMax milliseconds. Timeouts during file transfers (2.) are unaffected. Signed-off-by: Rafal Czubak <rcz@semihalf.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* net: express the first argument to NetSetTimeout() in millisecondsBartlomiej Sieka2008-10-18-33/+28
| | | | | | | | | | | | | | | | | | Enforce millisecond semantics of the first argument to NetSetTimeout() -- the change is transparent for well-behaving boards (CFG_HZ == 1000 and get_timer() countiing in milliseconds). Rationale for this patch is to enable millisecond granularity for network-related timeouts, which is needed for the upcoming automatic software update feature. Summary of changes: - do not scale the first argument to NetSetTimeout() by CFG_HZ - change timeout values used in the networking code to milliseconds Signed-off-by: Rafal Czubak <rcz@semihalf.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Adds two more ethernet interface to 83xxrichardretanubun2008-10-18-2/+126
| | | | | | | | | Added as a convenience for other platforms that uses MPC8360 (has 8 UCC). Six eth interface is chosen because the platform I am using combines UCC1&2 and UCC3&4 as 1000 Eth and the other four UCCs as 10/100 Eth. Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Change UEC PHY interface to RGMII on MPC8568MDSHaiying Wang2008-10-18-2/+36
| | | | | | | | | | | | | | Change UEC phy interface from GMII to RGMII on MPC8568MDS board Because on MPC8568MDS, GMII interface is only recommended for 1000Mbps speed, but RGMII interface can work at 10/100/1000Mbps, and RGMII interface works more stable. Now both UEC1 and UEC2 can work properly under u-boot. It is also in consistent with the kernel setting for 8568 UEC phy interface. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2008-10-15-3/+4
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| * mpc83xx: wait till UPM completes the write to arraySelvamuthukumar2008-10-14-3/+4
| | | | | | | | | | | | | | | | | | | | | | Reference manual states that MxMR[MAD] increment is the indication of write to UPM array is complete. Honour that. Also, make the dummy write explicit. also fix the comment. Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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