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* ppc4xx: Enable hardware-fix for PCI/DMA errata on AMCC 440SP/SPe boardsStefan Roese2007-12-06-8/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the hardware-fix for the PCI/DMA errata's 19+22 by setting the FIXD bit in the SDR0_MFR register. Here a description of the symptoms: Problem Description ------------------------------ If a DMA is performed between memory and PCI with the DMA 1 Controller using prefetch, and as a result uses a special purpose buffer selected by the PCIXn Bridge Options 1 Register (PCIXn_BRDGOPT1[RBP7] - bits 31-29), the first part of the transfer sequence is performed twice. The PPC440SPe PCI Controller requests more data than was needed such that in the case of enforce memory protection, a host CPU exception can occur. No data is corrupted, because data transfer is stopped in the PCI Controller. Prefetch enable is specified by setting DMA Configuration Register (I2O0_DMAx_CFG[DXEPD] - bit 31) to 0. Behavior that may be observed in a running system --------------------------------------------------------------------------- 1. DMA performance is decreased because of the double access on the PCI bus interface. 2. If an illegal access to some address on the PCI bus is detected at the system level, a machine check or similar system error may occur. Workarounds Available ---------------------------------- 1. Do not program prefetch. Note that a prefetch command cannot be programmed without selecting a special purpose buffer. 2. To avoid crossing a physical boundary of the PCI slave device, add 512 bytes of address to the PCI address range. This patch was originally provided by Pravin M. Bathija <pbathija@amcc.com> from AMCC and slighly changed. Signed-off-by: Pravin M. Bathija <pbathija@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Yosemite/Yellowstone: Add DTT AD7414 supportStefan Roese2007-12-04-0/+9
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Kilauea: Add PCIe reset assertion upon power-upStefan Roese2007-11-30-9/+6
| | | | | | | | This manual PCIe reset triggering solves the problem seen with the Intel EPRO/1000 card, which was not detected (link not established) upon power-up reset. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Kilauea & Makalu: Fix ext IRQ pin multiplexingStefan Roese2007-11-27-13/+13
| | | | | | | | After an error in the AMCC 405EX users manual now correctly configure IRQ2 (Kilauea)/IRQ0 (Makalu) as alternate 2 signal for external IRQ usage. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Makalu: Change EBC setup for CS0 to enable 400MHz usageStefan Roese2007-11-26-1/+1
| | | | | | | As suggested by Senao, use a different EBC_PB0AP setup for 400MHz operation. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Kilauea: Configure pin mux to use ext IRQ2 as interruptStefan Roese2007-11-26-1/+1
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Correct 405EX PCIe UTL register mappingStefan Roese2007-11-18-3/+3
| | | | | | Map 4k mem space for UTL registers for each port. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Update AMCC Kilauea config fileStefan Roese2007-11-17-23/+37
| | | | | | - Use generic GPIO configuration framework (CFG_4xx_GPIO_TABLE) Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Enable 405EX PCIe UTL register configurationStefan Roese2007-11-16-5/+45
| | | | | | | | Till now the UTL registers on 405EX were not initialized but left with their default values. This patch new initializes some of the UTL registers on 405EX. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Update AMCC Makalu for board rev 1.1Stefan Roese2007-11-16-83/+62
| | | | | | | | | | | This patch adds changes needed for Makalu rev 1.1: - Enable 2nd DDR2 bank resulting in 256MByte of SDRAM - Enable 2nd ethernet port EMAC1 - Use generic GPIO configuration framework (CFG_4xx_GPIO_TABLE) - Reset PCIe ports via GPIO upon bootup Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Small AMCC Kilauea cleanupStefan Roese2007-11-15-39/+0
| | | | | | Remove not needed pci_target_init() function. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Enable 440 GPIO init table CFG_440_GPIO_TABLE for 405 platformsStefan Roese2007-11-15-108/+101
| | | | | | | | - Rename CFG_440_GPIO_TABLE to CFG_4xx_GPIO_TABLE - Cleanup of the 4xx GPIO functions - Move some GPIO defines from the cpu headers ppc405.h/ppc440.h into gpio.h Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: AMCC Taihu board config file cleanupStefan Roese2007-11-15-39/+5
| | | | | | | This patch makes the AMCC Taihu a little more compatible to the other AMCC eval boards. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix 405EX PCIe UTLSET register setupStefan Roese2007-11-13-2/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Use generic usb-ohci driver for sequoia boardMatthias Fuchs2007-11-09-1/+8
| | | | | | | | This patch makes the sequoia board use the generic usb-ohci driver instead of cpu/ppc4xx/usb_ohci.c. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make USB working with CONFIG_4xx_DCACHE definedMatthias Fuchs2007-11-09-1/+17
| | | | | | | | | | This patch disables the 44x d-cache on 'usb start' and reenables it on 'usb stop'. This should be seen as a temporary fix until the generic usb-ohci driver can life with d-cache enabled. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove redundant code from 4xx network driverMatthias Fuchs2007-11-09-5/+3
| | | | | | | | This patch removes some redundant code and decrements the end address of cache flush and invalidate by 1. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove In:/Out:/Err: boot output for AMCC KilaueaStefan Roese2007-11-09-0/+1
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make output a little shorter on I2C bootrom detectionStefan Roese2007-11-09-34/+19
| | | | | | | | | | | Most 4xx PPC capable of using an I2C bootrom for bootstrap setting already print a line with the information which I2C bootrom is used for bootstrap configuration. So we don't need this extra line with "I2C boot EEPROM en-/dis-abled". This patch also has a little code cleanup integrated. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make output a little shorter on PCIe detectionStefan Roese2007-11-05-17/+12
| | | | | | Now not max 3 lines but 2 lines are printed per PCIe port. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add AMCC Kilauea/Haleakala NAND booting supportStefan Roese2007-11-03-10/+457
| | | | | | | This patch adds NAND booting support for the AMCC 405EX(r) eval boards. Again, only one image supports both targets. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix acadia_nand build problemStefan Roese2007-10-31-1/+5
| | | | | | | Since the cache handling functions were moved from start.S into cache.S the acadia NAND booting Makfile needs to be adapted accordingly. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add CONFIG_4xx_DCACHE compile options to enable cached SDRAMStefan Roese2007-10-31-8/+9
| | | | | | | | | | | | | | This patch adds the CONFIG_4xx_DCACHE options to some SDRAM init files and to the Sequoia TLB init code. Now the cache can be enabled on 44x boards by defining CONFIG_4xx_DCACHE in the board config file. This option will disappear, when more boards use is successfully and no more known problems exist. This is tested successfully on Sequoia and Katmai. The only problem that needs to be fixed is, that USB is not working on Sequoia right now, since it will need some cache handling code too, similar to the 4xx EMAC driver. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Enable CPU POST test for 4xx with dcache enabledStefan Roese2007-10-31-0/+11
| | | | | | | | Now with caches enabled (i- and d-cache) on 44x, we need a chance to disable the cache for the CPU POST tests, since these tests consist of self modifying code. This is done via the new change_tlb() function. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Change 4xx POST ethernet test to handle cached memory tooStefan Roese2007-10-31-1/+10
| | | | | | | This patch enables the 4xx EMAC POST driver to work too, when dcache is enabled. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove temporary TLB entry in POST cache test only for 440Stefan Roese2007-10-31-0/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Change 4xx ethernet driver to handle cached memory tooStefan Roese2007-10-31-75/+64
| | | | | | | This patch enables the 4xx EMAC driver to work too, when dcache is enabled. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add change_tlb function to modify I attribute of TLB(s)Stefan Roese2007-10-31-1/+88
| | | | | | | This function is used to either turn cache on or off in a specific memory area. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove cache definition from 4xx board config filesStefan Roese2007-10-31-595/+8
| | | | | | | All 4xx board config files don't need the cache definitions anymore. These are now defined in common headers. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Rework 4xx cache supportStefan Roese2007-10-31-145/+315
| | | | | | | New cache handling functions added and all existing functions moved from start.S into seperate cache.S. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove compiler warning from previous commitStefan Roese2007-10-31-1/+1
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove temporary TLB entry in POST cache testStefan Roese2007-10-31-0/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Change autonegotiation timeout from 4 to 5 secondsStefan Roese2007-10-31-1/+1
| | | | | | | | I lately noticed, that newer 4xx board with GBit support sometimes don't finish link autonegotiation in 4 seconds. Changing this timeout to 5 seconds seems fine here. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Change 4xx_enet & miiphy to use out_be32() and friendsStefan Roese2007-10-31-73/+74
| | | | | | | This patch changes all in32/out32 calls to use the recommended in_be32/ out_be32 macros instead. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix POST ethernet test for HaleakalaStefan Roese2007-10-31-7/+29
| | | | | | | | The POST ethernet test needed to be changed to dynamically determine the count of ethernet devices. This code is cloned from the 4xx ethernet driver. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Correct UART input clock calculation and passing to fdtStefan Roese2007-10-31-5/+10
| | | | | | | | We now use a value in the gd (global data) structure for the UART input frequency, since the PPC4xx_SYS_INFO struct is always rewritten completely in get_sys_info(). Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add initial AMCC Haleakala PPC405EXr eval board supportStefan Roese2007-10-31-5/+50
| | | | | | | | | | The Haleakala is nearly identical with the Kilauea eval board. The only difference is that the 405EXr only supports one EMAC and one PCIe interface. This patch adds support for the Haleakala board by using the identical image for Kilauea and Haleakala. The distinction is done by comparing the PVR. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fixed offset of refresh rate type for Bamboo on-board DDR SDRAMEugene O'Brien2007-10-31-2/+8
| | | | | | | | | | | | | This patch also adds a note to the fixed DDR setup for Bamboo NAND booting: Note: As found out by Eugene O'Brien <eugene.obrien@advantechamt.com>, the fixed DDR setup has problems (U-Boot crashes randomly upon TFTP), when the DIMM modules are still plugged in. So it is recommended to remove the DIMM modules while using the NAND booting code with the fixed SDRAM setup! Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add SNTP support to AMCC Katmai, Kilauea & Makalu boardsStefan Roese2007-10-31-1/+3
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Rework of 4xx serial driver (4)Stefan Roese2007-10-31-167/+146
| | | | | | | | | | | | Change 4xx_uart.c: - Use in_8/out_8 macros instead of in8/out8 - No need for UART_BASE marco anymore, now really handled via function parameter - serial_init_common() introduced - Further coding style cleanup Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Rework of 4xx serial driver (3)Stefan Roese2007-10-31-1/+1
| | | | | | Change all linker scripts to reference the changed driver name iop480_uart.o. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Rework of 4xx serial driver (2)Stefan Roese2007-10-31-316/+40
| | | | | | | | | | Change all linker scripts to reference the changed driver name 4xx_uart.o. Note: In most cased all these explicit referencing of these object files in the linker scripts is not neccessary. Only for manually embedded environment into the U-Boot image, which is not done is most cases. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Rework of 4xx serial driver (1)Stefan Roese2007-10-31-208/+243
| | | | | | | | | This patch starts the rework of the PPC4xx serial driver. First we split the file into two seperate files, one 4xx_uart.c with the 405/440 UART handling code and the other one iop480_uart.c with the UART code for the PLX-Tech IOP480 PPC (PPC403 based). Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Correct UART input clock calculation and passing to fdtStefan Roese2007-10-31-4/+15
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add initial AMCC Makalu 405EX supportStefan Roese2007-10-31-0/+1620
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add freqUART to CPU speed detectionStefan Roese2007-10-31-8/+24
| | | | | | | This value is needed later for the device tree configuration of the uart clock. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc: Small Kilauea cleanup of config fileStefan Roese2007-10-31-2/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* rtc: Add Xicor/Intersil X1205 RTC supportStefan Roese2007-10-31-1/+199
| | | | | | | | | | | | | This patch adds support for the Xicor/Intersil X1205 RTC used on the AMCC Makalu eval board. This driver is basically cloned from the Linux driver version (2.6.23). This patch also introduces the Linux bcd.h header for the BCD2BIN/ BIN2BCD conversions. In the future some of the other U-Boot RTC driver should be converted to also use this header instead of implementing their own local copy of these functions/macros. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate some of the 405 and 440 macros/structs into 4xxStefan Roese2007-10-31-202/+113
| | | | | | | | | | This patch moves some common 4xx macros and the PPC405_SYS_INFO/ PPC440_SYS_INFO structure into the common ppc4xx.h header. Lot's of other macros are good candidates to be consolidated this way in the future. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix size setup in Kilauea DDR2 init routineStefan Roese2007-10-31-26/+26
| | | | | | | | | The size was initilized wrong. Instead of 256MB, the DDR2 controller was setup to 512MB. Now the correct values is used. This patch also does a little cleanup and adds a comment here. Signed-off-by: Stefan Roese <sr@denx.de>
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