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* at91: fixed plla calc when no USB support is activeDaniel Gorsulowski2009-04-29-1/+1
| | | | | Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm925t: Fix CONFIG_SYS_HZ to 1000Ladislav Michl2009-04-29-75/+35
| | | | | | | | | | | Let CONFIG_SYS_HZ to have value of 1000 effectively fixing all users of get_timer. Changes since original version: * Set PTV=2 (divisor 8) for boards using 12MHz timer clock source to improve timer resolution. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* OMAP3: Remove legacy NAND definesDirk Behme2009-04-29-117/+0
| | | | | | Remove remaining legacy NAND defines for Beagle, EVM, Overo and Pandora. Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* OMAP3: Print correct silicon revisionSanjeev Premi2009-04-29-16/+36
| | | | | | | | | | The function display_board_info() displays incorrect silicon revision - based on the return value from function get_cpu_rev(). This patch fixes the problem. Signed-off-by: Sanjeev Premi <premi@ti.com>
* OMAP3: Remove unused board-typesSanjeev Premi2009-04-29-38/+0
| | | | | | | | | | | The board-types defined in struct omap3_sysinfo seem to be unused. The function display_board_info() is passed board type as an argument; which is ignored. This patch removes all uses of board-type, related definitions and functions. Signed-off-by: Sanjeev Premi <premi@ti.com>
* OMAP3: Use functions print_cpuinfo() and checkboard()Sanjeev Premi2009-04-29-62/+102
| | | | | | | | | | | | | | | Use the functions print_cpuinfo() and checkboard() to display the cpu and board specific information. These functions reuse content from the existing function display_board_info() - which has been removed. Also, updated the existig OMAP3 configurations to define: - CONFIG_DISPLAY_CPUINFO - CONFIG_DISPLAY_BOARDINFO Signed-off-by: Sanjeev Premi <premi@ti.com>
* OMAP3: Fix changed mmc init commandDirk Behme2009-04-26-5/+5
| | | | | | | In recent U-Boot mmcinit changed to mmc init. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* minor DaVinci clock cleanupDavid Brownell2009-04-24-8/+4
| | | | | | | | | | | | | | Minor cleanup to clock-related defines for DaVinci DM6446 boards: - CONFIG_SYS_CLK_FREQ is unused; remove it. - CONFIG_SYS_NS16550_CLK must be the same as CONFIG_SYS_HZ_CLOCK On DM6446 both of those peripheral clocks actually come from the same source, the primary oscillator. Having them use the same symbol avoids bugs in the clone'n'modify development cycle. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* s3c64xx: remove unnecessary definitionMinkyu Kang2009-04-24-4/+0
| | | | | | | CONFIG_S3C6400 is must defined at config header file That definition is unnecessary at this file Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2009-04-24-60/+5
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| * NetLoop initialization bugMichael Zaidman2009-04-19-59/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch fixes the bug of partial initialization of global network parameters. Upon u-boot's start up the first ping command causes a failure of the consequent TFTP command. It happens in the recently added mechanism of the NetLoop initialization where initialization of global network parameters is separated in the NetInitLoop routine which is called per env_id change. Thus, ping request will initialize the network parameters necessary for ping operation only, afterwards the env_changed_id will be set to the env_id that will prevent all following initialization requests from other protocols. The problem is that the initialized by ping subset of network parameters is not sufficient for other protocols and particularly for TFTP which requires the NetServerIp also. Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * net: fix ULI 526x macro usage in netdev.hTimur Tabi2009-04-19-1/+1
| | | | | | | | | | | | | | | | | | Change netdev.h to use CONFIG_ULI526X instead of CONFIG_ULI526. CONFIG_ULI526X is used everywhere else, so that's the correct macro name. Without this fix, Ethernet will not work on the Freescale MPC8610 HPCD. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-at91Wolfgang Denk2009-04-24-96/+1677
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| * at91sam9/at91cap: fix CONFIG_SYS_HZ to 1000Jean-Christophe PLAGNIOL-VILLARD2009-04-16-45/+51
| | | | | | | | | | | | | | | | The timer has been rewrote with a precision at ~0,18% Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Tested-by: Sergey Lapin <slapin@ossfans.org> Tested-by: Eric BENARD <ebenard@free.fr>
| * at91: add support for the PM9263 board of Ronetix GmbHIlko Iliev2009-04-16-4/+1342
| | | | | | | | | | | | | | | | | | | | The PM9263 board is based on the AT91SAM9263-EK board. Here is the page on Ronetix website: http://www.ronetix.at/starter_kit_9263.html Signed-off-by: Ilko Iliev <iliev@ronetix.at> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: improve clock frameworkJean-Christophe PLAGNIOL-VILLARD2009-04-16-48/+285
| | | | | | | | | | | | calculate dynamically the clock rate and pllb setting for usb Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | fix DaVinci NS16550_REG_SIZE regressionDavid Brownell2009-04-16-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Update the DaVinci DM6446 boards to use the new convention for CONFIG_SYS_NS16550_REG_SIZE ... the size hasn't changed from the original 4 bytes, but these chips are little-endian. (Resolves a regression added recently by the include/ns16550.h patch to "Unify structure declaration for registers". The code previously worked just fine because the registers were accessed as host-endian words, not as bytes.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* | cmd_nand: drop duplicate NULL ptr checkMike Frysinger2009-04-16-1/+1
| | | | | | | | | | | | | | | | The first if statement checks for NULL ptrs, so there is no need to check it again in later else cases (such as .oob). Signed-off-by: Mike Frysinger <vapier@gentoo.org> CC: Scott Wood <scottwood@freescale.com>
* | CMD_UBI != MTD_PARTITIONSDavid Brownell2009-04-16-1/+1
| | | | | | | | | | | | | | | | Fix dependency goofage: it should certainly be possible to have the partition support without bringing in UBI commands. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Disable POST memory test on NAND-booting KilaueaStefan Roese2009-04-16-1/+12
| | | | | | | | | | | | | | | | | | Don't run the memory POST on the NAND-booting version. It will overwrite part of the U-Boot image which is already loaded from NAND to SDRAM. We were just lucky that it booted at all with this SDRAM test enabled. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Disable POST memory test on NAND-booting SequoiaStefan Roese2009-04-16-2/+13
| | | | | | | | | | | | | | | | | | Don't run the memory POST on the NAND-booting version. It will overwrite part of the U-Boot image which is already loaded from NAND to SDRAM. We were just lucky that it booted at all with this SDRAM test enabled. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Remove unused code for Sequoia NAND booting versionStefan Roese2009-04-16-5/+1
| | | | | | | | | | | | | | | | The current define of get_bus_freq() in the CONFIG_NAND_SPL #ifdef is not used at all. This patch changes it's define to the currently used value of 133333333 and removes the unnecessary code. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Add "booting from NAND" to 4xx NAND-booting targetsStefan Roese2009-04-16-1/+5
| | | | | | | | | | | | | | | | This additional text in the bootup log helps to see if the board is configured for NAND-booting. Especially helpful for boards that can boot from NOR and NAND (e.g. most of the AMCC eval boards). Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Fixup chip-selects in dtb for NAND-booting SequoiaStefan Roese2009-04-16-2/+56
|/ | | | | | | | | | | | | | | | | | | | Currently the NOR & NAND support in Linux only works for the "standard" Sequoia, the version booting for NOR flash. The NAND-booting version has the chip-selects swapped. Here the chip-select mappings: "Standard" NOR-booting version: CS0 NOR CS3 NAND NAND-booting version: CS0 NAND CS3 NOR With this path the dtb gets fixed-up, so that the correct chip-select numbers are patched in the dtb enabling correct NOR & NAND support in Linux on the NAND-booting Sequoia version. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2009-04-07-73/+203
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| * Blackfin: audit UART for all known anomaliesMike Frysinger2009-04-06-2/+21
| | | | | | | | | | | | | | There is no code change here, just new comments, but this keeps me from having to do another audit from scratch in the future. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: add check for anomaly 05000362Mike Frysinger2009-04-06-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DESCRIPTION: The column address width settings for banks 2 and 3 are misconnected in the SDRAM controller. Accesses to bank 2 will result in an error if the Column Address Width for bank 3 (EB3CAW ) is not set to be the same as that of bank 2. WORKAROUND: If using bank 2, make sure that banks 2 and 3 have the same column address width settings in the EBIU_SDBCTL register. This must be the case regardless of whether or not bank 3 is enabled. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: add comment about anomaly 05000430 avoidanceMike Frysinger2009-04-06-0/+2
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: add workaround for anomaly 05000242Mike Frysinger2009-04-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | DESCRIPTION: If the DF bit is set prior to a hardware reset, the PLL will continue to divide CLKIN by 2 after the hardware reset, but the DF bit itself will be cleared in the PLL_CTL register. WORKAROUND: Reprogram the PLL with DF cleared if the desire is to not divide CLKIN by 2 after reset. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: add workaround for anomaly 05000171Mike Frysinger2009-04-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | DESCRIPTION: The Boot ROM is executed at power up/reset and changes the value of the SICA_IWR registers from their default reset value of 0xFFFF, but does not restore them. WORKAROUND: User code should not rely on the default value of these registers. Set the desired values explicitly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: update anomaly sheetsMike Frysinger2009-04-06-69/+150
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: nand: flush peripheral before polling itGraf Yang2009-04-06-0/+1
| | | | | | | | | | | | | | | | | | | | We need to make sure the data written to the nand flash controller makes it there before we start polling its status register. Otherwise, we may get stale data and return before the controller is actually ready. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Scott Wood <scottwood@freescale.com>
| * Blackfin: spi: make cs deassert function deterministicTodor I Mollov2009-04-06-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Blackfin SPI driver was not driving the SPI chip-select high before putting the chip-select signals into tri-state mode. This is probably something that slipped by unnoticed in most designs. If the signals are put directly into a tri-state mode, then the board is relying on the pull-up resistors to pull up the chip-select before the next transaction. Most of the time this is fine, except when you have two transactions that follow each other very closely, such as the flash erase and read status register commands. In this case I was seeing a 500ns separation between the transactions. In my setup, with a 10kOhm pull-up, it would meet timing spec about half the time and resulted in intermittent errors. (A stronger pull up would fix this, but our design is targeted for low power consumption and a 3.3kOhm @ 3.3v is 3.3mW of needless power consumption.) I modified the spi_cs_deactivate() function in bfin_spi.c to drive the chip-selects high before putting them into tri-state. For me, this resulted in a rise time of 5ns instead of the previous rise time of about 1us, and fully satisfied the timing spec of the chip. Signed-off-by: Todor I Mollov <tmollov@ucsd.edu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Support for PXA27X UDC.Remy Bohmer2009-04-06-54/+1018
| | | | | | | | | | | | | | | | This Patch adds Support for PXA27X UDC. (Rebased to drivers/usb reorganisation) Signed-off-by: Vivek Kutal <vivek.kutal@azingo.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* | drivers/usb: regorganisationJean-Christophe PLAGNIOL-VILLARD2009-04-06-51/+146
|/ | | | | | | | | | | | | move to linux usb driver organisation as following drivers/usb/gadget drivers/usb/host drivers/usb/musb Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-04-05-1207/+501
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| * integratorap: fix PCI supportJean-Christophe PLAGNIOL-VILLARD2009-04-05-2/+2
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * OMAP3: Update Overo pin mux for new expansion boardDirk Behme2009-04-05-4/+5
| | | | | | | | | | | | | | | | | | A new Overo expansion board uses GPIO 14, 21, 22 and 23 for LED's and switches. This patch changes the pinmux configuration for those pins. They were previously set up for unused MMC3_DAT4-7. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
| * arm: unify reset commandJean-Christophe PLAGNIOL-VILLARD2009-04-05-131/+54
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm: clean cache managementJean-Christophe PLAGNIOL-VILLARD2009-04-05-623/+300
| | | | | | | | | | | | unify arm cache management except for non standard cache as ARM7TDMI Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm: update co-processor 15 accessJean-Christophe PLAGNIOL-VILLARD2009-04-05-533/+238
| | | | | | | | | | | | import system.h from linux Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * OMAP: Fix compile issueSanjeev Premi2009-04-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes this compile error: board.c: In function 'do_switch_ecc': board.c:339: error: 'cmd_tbl_t' has no member named 'help' make[1]: *** [board.o] Error 1 make[1]: Leaving directory `/db/psp_git/users/a0756819/u-boot/cpu/arm_cortexa8/omap3' make: *** [cpu/arm_cortexa8/omap3/libomap3.a] Error 2 This is due to the fact that current command uses long help for the usage print even if the CONFIG_SYS_LONGHELP is not enabled. (Thanks Jean-Christophe for explanation). Signed-off-by: Sanjeev Premi <premi@ti.com>
| * s3c64xx: fix the wrong gpio offsetMinkyu Kang2009-04-05-3/+3
| | | | | | | | | | | | This patch fix the wrong gpio offset Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Move machine specific code to board at s3c64xx (v2)Kyungmin Park2009-04-05-7/+12
| | | | | | | | | | | | | | | | | | | | Move machine specific code to smdk6400. Some board use OneNAND instead of NAND. Some register MP0_CS_CFG[5:0] are controled by both h/w and s/w. So it's better to use macro instead of hard-coded value. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * ZOOM1 Remove legacy NAND definesTom Rix2009-04-05-17/+0
| | | | | | | | Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| * OMAP3 Fix multiline formatting in board init files.Tom Rix2009-04-05-36/+36
| | | | | | | | Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
* | ARM: add the imx31_phycore_eet target to MAINTAINERSGuennadi Liakhovetski2009-04-05-2/+3
| | | | | | | | | | | | | | | | | | | | imx31_phycore_eet is a variant of the imx31_phycore board with a few extensions, which justifies a separate entry in the MAINTAINERS list, whereas normally all entries sharing a single configuration file and a board/ directory have only one entry in MAINTAINERS. Reported-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* | ARM: fix out-of-tree build of imx31_phycore_eetGuennadi Liakhovetski2009-04-05-0/+1
| | | | | | | | | | | | | | Fix out-of-tree build of the imx31_phycore_eet target. Reported-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* | mpc5200: reduce delays in i2cJon Smirl2009-04-05-3/+3
| | | | | | | | | | | | | | | | The previous code waited 1000us before checking i2c status. Measurement shows i2c is usually ready in under 50us. Change the polling interval to 15us, loop 6,667 times to keep the polling timeout constant at 100ms.
* | Update CHANGELOG, coding style cleanup.Wolfgang Denk2009-04-05-33/+3465
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