| Commit message (Collapse) | Author | Age | Lines |
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NO_PAD_I/NO_PAD_MUX not defined correctly, which will cause build error.
And According to iomux-v3.h, the NO_PAD_I/NO_PAD_MUX should be 0 for the
pins which does not have PAD/MUX config.
Signed-off-by: Jason Liu <r64343@freescale.com>
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Before running authentication on uImage in DDR, u-boot first check if
SEC_CONFIG[1] (OTP_CFG5[1]) is burned. If so, it means the chip is in
secure configuration, the authentication continues; if not, the chip
in not in secure configuration, just bypass the authentication
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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* In RevB boards a steer logic circuit enables the
route path of I2C3_SDA signal and is controlled by
EIM_A24__GPIO_5_4 pad.
* Configure GPIO_5_4 as as output and enable steer logic
circuit.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
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Security boot need to use fuse item. Thus it should not be enabled as
default.
Signed-off-by: Terry Lv <r65388@freescale.com>
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authenticate_image is called to verify uImage when excecuting "bootm", the
uImage togehter with its CSF data should has been located in DDR.
The new uImage layout is as the following:
+------------+ 0x0 (0x10800000) \
| Header | |
+------------+ 0x40 |
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| Image Data | |
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. | > Stuff to be authenticated ------+
. | | |
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+------------+ | |
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| Fill Data | | |
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+------------+ 0x003F_DFE0 | |
| IVT | | |
+------------+ 0x003F_E000 / |
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| CSF DATA | <--------------------------------------------------------+
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+------------+
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| Fill Data |
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+------------+ 0x0040_0000
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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The first stage of High Assurance Boot (HAB) is the authentication of
U-boot. A CST tool is used to generate the CSF data, which include
public key, certificate and instruction of authentication process. Then
it is attached to the original u-boot.bin
The IVT should be modified to contain a pointer to the CSF data. The original
u-boot.bin is with size between 0x27000 to 0x28000. For convinence, we first
extend the u-boot.bin to 0x2F000 (with fill 0xFF). Then concatenate it with
the CSF data. The combined image is again extend to a fixed length (0x31000),
which is used as the IVT size parameter.
The new memory layout is as the following.
U-Boot Image
+-------------+
| Blank |
|-------------| 0x400
| IVT |-----------------------+
|-------------| |
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|Remaining UB | | CSF pointer
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|-------------| |
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| Fill Data | |
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|-------------| 0x2F000 <-------------+
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| CSF Data |
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|-------------|
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| Fill Data |
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+-------------+ 0x31000
HAB APIs are ROM implemented, the entry table is located in a fixed
location in the ROM. We export them so that during the HAB we can
have some information about the secure boot process. For convinience
some wrapper API is implemented based on the HAB APIs.
- get_hab_status : used to dump information of authentication result
- authenticate_image : used by u-boot to authenticate uImage
For security hardware to function, CAAM related clock (CG0[4~6]) must
be open. They are default closed in the original U-boot.
"hab_caam_clock_enable" and "hab_caam_clock_disable" are created to
open and close these clock gates.
The generation of CSF data is not in the scope of this patch. CST tool
will be used for this purpose. The procedure will be introduced in
another document.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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- Enable below macro define for all chip. Firstly, the marcos
will be used in later version for later i.MX. Secondly, fix
the build error in the former i.MX series chip before i.MX6.
#define PHY_MIPSCR_LINK_UP (0x1 << 10)
#define PHY_MIPSCR_SPEED_MASK (0x3 << 14)
#define PHY_MIPSCR_1000M (0x2 << 14)
#define PHY_MIPSCR_100M (0x1 << 14)
#define PHY_MIPSCR_FULL_DUPLEX (0x1 << 13)
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- Different chip will include different head file, so add macro
define to limit the use range.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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This patch is used to integrate DDR3 script V1.1 of mx6solo
sabreauto MX6DL_init_DDR3_400MHZ_32bit_sabre_1_1.inc under
http://compass.freescale.net/livelink/livelink?func=ll&objid
=225128962&objAction=browse&sort=name
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Add "nosmp arm_freq=800" options for mx6solo sabreauto board
by default
Signed-off-by: Lily Zhang <r58066@freescale.com>
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add android config file;
support booti fastboot command and etc.
Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
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As per JEDEC document JESD84-A441 (page 105) response for CMD7
(MMC_CMD_SELECT_CARD) response should be R1 instead of R1b. In uboot we
never take MMC to disconnected state and on powerup its always ideal
state which later goes to stand-by state.
from document footnote:
R1 while selecting from Stand-By State to Transfer State; R1b while
selecting from Disconnected State to Programming State.
Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
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Remove MMDC1 setting from DDR script of mx6solo sabreauto
if it's not used.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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SPI NOR flash(m25p32-vmw6tg) not probed and function as expected, this
due to the lack of iomux pad config and incorrect CS line.
This patch fix the above issue and also fix the mfg config file
(For the code readable, I intent to omit the following checkpatch warning:
in the iomux/mx6_pins.h WARNING: line over 80 characters)
Signed-off-by: Jason Liu <r64343@freescale.com>
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- i.mx6q sabresd revA ethernet phy addr is 0 (PHYADDRESS1-PHYADDRESS0:00)
, but revB ethernet phy address is 0x1 (PHYADDRESS1-PHYADDRESS0:01).
To avoid to change hardware, add auto discover phy address configuration.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Update the DDR3 script on i.mx6dl SabreSD revB board, the
script got from:
http://wiki.freescale.net/download/attachments/33954617/MX6DL_init_DDR3
_400MHz_64bit_1_2_For_SD_RevB.inc?version=1&modificationDate=1332495827000
Signed-off-by: Jason Liu <r64343@freescale.com>
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Add mfg configs for mx6dl sabresd and mx6solo sabreauto.
Signed-off-by: Terry Lv <r65388@freescale.com>
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- FEC detect phy OUID to check phy type, so remove MICREL macro
in board config file.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- Add phy id macro definitions.
- Add mxc_get_phy_ouid helper function.
- Use phy ouid to check the phy type.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- Add i2c3_SDA iomux config for the change of signal traces.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- In imx6 sabreauto board REVB Ethernet phy adopt AR8031. Add
phy init rework.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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add android config to this board.
only basic boot support.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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- Use fsl_sys_rev to check Sebreauto board reversion.
- Add macro define for expedient print the board and chip name.
mx6_chip_name()
mx6_board_rev_name()
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Use the ddr init script “MX6DL_init_DDR3_400MHz_64bit_1.2.inc”
for SD revB with Rigel mounted, and update the calibration parameters
(write leveling, DQS gating, read delay, write delay),
which is located at:
http://compass.freescale.net/livelink/livelink?func=ll&
objid=225128962&objAction=browse&sort=name
Signed-off-by: Fugang Duan <B38611@freescale.com>
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The serial of patches adds the initial support for mx6dl
sabra sd board:
- DDR3 400MHz@64bit, 1G, 256M*4
- SD/MMC basic operations
- Add PIN/IOMUX support for mmx6dl sabresd.
- Ethernet is ok for 100/1000Mbps.
- OTP fuse
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- Add fsl_system_rev to distinguish chip ID and board reversion.
- Add some api:
mx6_chip_is_dq()
mx6_chip_is_dl()
mx6_chip_is_solo()
mx6_chip_is_sololite()
mx6_board_is_reva()
mx6_board_is_revb()
mx6_board_is_revc()
Signed-off-by: Fugang Duan <B38611@freescale.com>
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fix build error invoke by this patch:
commit e3303f5b59df570c1f76b043d85e42be3dc7a63f
Author: Lily Zhang <r58066@freescale.com>
Date: Fri Mar 9 21:16:51 2012 +0800
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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- remove the excrescent code in enet_board_init function.
- KSZ9021 phy auto-negotiation in mx6solo sabreauto RevA
is used to establish link with the remote hub or switch.
In general, the negotiation time is about 3-5 senconds
But connecting to Gbps hub, the time
is range from 8s to 15s. So, changing the MAX link waiting time
to 20s.
According to repetitious tests, solo ARD ethernet is ok in 100Mbps
environment. It is not stable in 1000Mbps mode.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Remove the following build warning:
cmd_bootm.c: In function 'do_booti':
cmd_bootm.c:1524: warning: unused variable 'partno'
cmd_bootm.c:1520: warning: unused variable 'pte'
cmd_bootm.c:1654: warning: implicit declaration of function 'do_booti_linux'
cmd_bootm.c:1596: warning: 'info.start' may be used uninitialized in
this function
cmd_bootm.c:1502: warning: 'addr' may be used uninitialized in this function
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Remove the following build warning:
bootm.c: In function 'do_booti_linux':
bootm.c:147: warning: pointer targets in assignment differ in signedness
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Remove the following build warning:
mx6q_sabreauto.c: In function 'enet_board_init':
mx6q_sabreauto.c:999: warning: unused variable 'reg'
mx6q_sabreauto.c: At top level:
mx6q_sabreauto.c:921: warning: 'phy_read' defined but not used
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Add set_system_rev function. The layout of system_rev is:
bit 0-7: Chip Revision ID. Read from Anatop register
bit 8-11: Board Revision ID. Read from fuse OCOTP_GP1[15:8]
1: RevA Board
0: RevB board, Unknown board
bit 12-19: Chip Silicon ID. Read from Anatop register
0x63: i.MX 6Dual/Quad
0x61: i.MX 6Solo/DualLite
board_is_rev(system_rev,BOARD_REV_1) can be used to
distinguish RevB board.
board_is_rev(system_rev,BOARD_REV_2) is for RevA board.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Enable anatop command "regul" for mx6solo/DL
Signed-off-by: Lily Zhang <r58066@freescale.com>
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- Add PIN/IOMUX support for mx6solo sabreauto board
- Remove GPIO_9 codes because GPIO_9 is not the backlight
- change system_rev as 0x610000
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Add DDR3 script (400MHz@32 bit) in mx6solo sabre auto
board. MX6Solo_DDR3_400MHZ_32bit.inc was delivered
on Mar 7, 2012 by Fan Chongbin-B32609
Signed-off-by: Lily Zhang <r58066@freescale.com>
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The serial of patches adds the initial support for mx6solo
sabra auto board:
- DDR3 400MHz@32bit
- SD/MMC basic operations
- SPI-NOR basic operations
- OTP fuse
- clock command
- Anatop regulator command
- splash screen support by enabling "CONFIG_SPLASH_SCREEN"
Because i.mx6solo share the same ARD board with i.mx6dq,
the same board file is shared between i.mx6dq and i.mx6solo.
CONFIG_MX6DL configuration is used to distinguish the difference.
This patch is used to add mx6solo sabreauto configuration support.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Change fastboot vender id to orignal ID to
avoid install USB driver.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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This patch adds splash screen support for MX6 ARD.
Changes:
- Configure GPIO_3 as I2C3_SCL
- Change MAX7310 I2C address as 0x30
- Enable LVDS power
Usage:
1. To enable splash screen by default, define
CONFIG_SPLASH_SCREEN in mx6q_sabreauto.h
2. Config U-boot with followed command:()
setenv splashimage '0x30000000'
#Set splash position as Center
setenv splashpos 'm,m'
#Set LVDS via LVDS bridge 0
setenv lvds_num 0
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Add MFG tool support for i.MX6DQ ARD board
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Fix the following build error when building mx53_smd_android
config:
mx53_smd_android.h:175: error: expected identifier or xx
before string constant
Signed-off-by: Lily Zhang <r58066@freescale.com>
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CONFIG_CPU_1_2G is used to enable 1.2GHz@1.3V. To enable
1.2GHz by default, enable CONFIG_CPU_1_2G into config file.
For example, uncomment CONFIG_CPU_1_2G in mx53_smd.h or
mx53_smd_android.h.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Apply script "Mx6DL_init_LPDDR2_400MHz_Micron_1.1.inc" in IVT, make U-boot
work for the LPDDR2 Board. The Make target name for the new board is
"MX6DL_ARM2_LPDDR2_CONFIG"
The script is provided by Chen Wei - B26879 for a quick bring up, which don't
have a corresponding compass link. It is uploaded to CR ticket page for
reference.
Originally for MX6DL DDR3 board, "CONFIG_MX6DL" is defined. It is used by
"board/freescale/mx6q_arm2/flash_header.S" to select the correct IVT. Since
MX6DL LPDDR2 board also define this macro, for distiguish purpose, another
2 macros "CONFIG_MX6DL_DDR3", "CONFIG_MX6DL_LDPPR2" are defined
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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define a new macro to show which mmc bus was main storage
in recovery check, only check the main storage /cache
partition.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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The default console on i.MX6DL ARM2 CPU board is
ttymxc3
Signed-off-by: Lily Zhang <r58066@freescale.com>
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A "destroyenv" command is provided to erase any pre-save environment in the
boot storage. The command simply add 1 to the CRC section and write it back
to the storage. Per the logic of U-Boot, this means after a reset, the
software will recognize the stored environment settings as "damaged" and turn
to use the default one, which is defined in "default_environment"
With this command, platform bring up owner can maintain a "ready-to-use"
environment settings in software which others can use very conviniently.
U-boot users can also use it to do a environment restore if they want.
-----------------------------------
Usage Example:
> destroyenv
invalidate the CRC
write invalidate enviroment data to storage
Erasing SPI flash...Erasing SPI NOR flash 0xc0000 [0x2000 bytes]
..SUCCESS
Writing to SPI flash...Writing SPI NOR flash
0xc0000 [0x2000 bytes] <- ram 0x276009b8
SUCCESS
done
>
-----------------------------------
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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fix build error when not configure android partition.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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change boot command and recovery command to booti.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Support booti command which can boot from a boot.img
boot.img is a zImage + ramdisk.img + bootargs + boot addr
which include these info can be used to avoid mis match between
kernel and ramdisk, also can avoid commit to chagne default
bootargs.
For example:
> booti mmc1
command will read the boot.img from 1M offset,
and then parser the bootargs and ramdisk
then do the boot from that zImage.
> booti mmc1 recovery
will going to read the recovery's partition no
and offset and boot from recovery image.
this recovery image also a zImage + ramdisk
bootargs:
if uboot have define a env var 'bootargs', booti command
will use this bootargs as kernel cmdline
if you want use boot.img 's bootargs, just type:
> setenv bootargs
in uboot to clear the bootargs in uboot env.
our default uboot env will be NULL in config file.
also, android use boot.img to support OTA.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Remove build warnings for mx6q.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Fix cmd_regul build error.
Signed-off-by: Terry Lv <r65388@freescale.com>
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