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* FSL DDR: Convert MPC8555ADS to new DDR code.Jon Loeliger2008-08-27-18/+105
| | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Convert MPC8560ADS to new DDR code.Jon Loeliger2008-08-27-36/+110
| | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Convert MPC8540ADS to new DDR code.Kumar Gala2008-08-27-40/+110
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Add 85xx specific register settingKumar Gala2008-08-27-0/+318
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Add e500 TLB helper for DDR codeKumar Gala2008-08-27-0/+65
| | | | | | | Provide a helper function that board code can call to map TLBs when setting up DDR. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Remove old SPD support from cpu/mpc86xxKumar Gala2008-08-27-1352/+0
| | | | | | | All 86xx boards have been converted to the new code so we can remove the old SPD DDR setup code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Convert SBC8641D to new DDR code.Kumar Gala2008-08-27-8/+99
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Convert MPC8610HPCD to new DDR code.Jon Loeliger2008-08-27-29/+106
| | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Convert MPC8641HPCN to new DDR code.Kumar Gala2008-08-27-60/+145
| | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Add 86xx specific register settingKumar Gala2008-08-27-0/+92
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Add DDR2 DIMM paramter supportKumar Gala2008-08-27-0/+339
| | | | | | | | Compute DIMM parameters based upon the SPD information. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Add DDR1 DIMM paramter supportKumar Gala2008-08-27-0/+343
| | | | | | | | Compute DIMM parameters based upon the SPD information in spd. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.Kumar Gala2008-08-27-2/+2573
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The main purpose of this rewrite it to be able to share the same initialization code on all FSL PowerPC products that have DDR controllers. (83xx, 85xx, 86xx). The code is broken up into the following steps: GET_SPD COMPUTE_DIMM_PARMS COMPUTE_COMMON_PARMS GATHER_OPTS ASSIGN_ADDRESSES COMPUTE_REGS PROGRAM_REGS This allows us to share more code an easily allow for board specific code overrides. Additionally this code base adds support for >4G of DDR and provides a foundation for supporting interleaving on processors with more than one controller. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL DDR: Provide a generic set_ddr_laws()Kumar Gala2008-08-27-0/+40
| | | | | | | Provide a helper function that will setup the last available LAWs (upto 2) for DDR. Useful for SPD/dyanmic DDR setting code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Add proper SPD definitions for DDR1/2/3James Yang2008-08-27-0/+354
| | | | | | Also adds helper functions for DDR1/2 to verify the checksum. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Update CHANGELOGWolfgang Denk2008-08-27-0/+324
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add support for muas3001 board (MPC8270)Heiko Schocher2008-08-27-0/+852
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* common/cmd_load.c cleanup - remove unused variablesGururaja Hebbar K R2008-08-27-10/+0
| | | | | | | - Remove unused global variable os_data_count. - Remove unused variable z. Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
* remove MVS1 boardAndre Schwarz2008-08-26-1469/+0
| | | | | | MVS1 board has reached end-of-life and can be removed completely. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
* bootm: refactor do_reset and os boot function argsKumar Gala2008-08-26-117/+62
| | | | | | | | | | | | There is no need for each OS specific function to call do_reset() we can just do it once in bootm. This means its feasible on an error for the OS boot function to return. Also, remove passing in cmd_tbl_t as its not needed by the OS boot functions. flag isn't currently used but might be in the future so we left it alone. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fdt: Added resize commandKumar Gala2008-08-26-1/+7
| | | | | | Resize the fdt to size + padding to 4k boundary Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fdt: refactor initrd related codeKumar Gala2008-08-26-68/+70
| | | | | | | | | Created a new fdt_initrd() to deal with setting the initrd properties in the device tree and fixing up the mem reserve. We can use this both in the choosen node handling and lets us remove some duplicated code when we fixup the initrd info in bootm on PPC. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fdt: refactor fdt resize codeKumar Gala2008-08-26-28/+44
| | | | | | | Move the fdt resizing code out of ppc specific boot code and into common fdt support code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* bootm: refactor image detection and os load stepsKumar Gala2008-08-26-108/+136
| | | | | | | | | | | | | | Created a bootm_start() that handles the parsing and detection of all the images that will be used by the bootm command (OS, ramdisk, fdt). As part of this we now tract all the relevant image offsets in the bootm_headers_t struct. This will allow us to have all the needed state for future sub-commands and lets us reduce a bit of arch specific code on SPARC. Created a bootm_load_os() that deals with decompression and loading the OS image. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* bootm: move lmb into the bootm_headers_t structureKumar Gala2008-08-26-11/+10
| | | | | | | | To allow for persistent state between future bootm subcommands we need the lmb to exist in a global state. Moving it into the bootm_headers_t allows us to do that. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* bootm: Set working fdt address as part of the bootm flowKumar Gala2008-08-26-1/+24
| | | | | | | | Set the fdt working address so "fdt FOO" commands can be used as part of the bootm flow. Also set an the environment variable "fdtaddr" with the value. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* bootm: refactor fdt locating and relocation codeKumar Gala2008-08-26-484/+533
| | | | | | | Move the code that handles finding a device tree blob and relocating it (if needed) into common code so all arch's have access to it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* bootm: refactor ramdisk locating codeKumar Gala2008-08-26-67/+60
| | | | | | | | Move determing if we have a ramdisk and where its located into the common code. Keep track of the ramdisk start and end in the bootm_headers_t image struct. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* bootm: refactor entry point codeKumar Gala2008-08-26-182/+37
| | | | | | | Move entry point code out of each arch and into common code. Keep the entry point in the bootm_headers_t images struct. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc7448hpc2: Fix PCI I/O space mapping.Randy Vinson2008-08-26-2/+2
| | | | | | | | | | PCI I/O space is currently mapped 1:1 at 0xFA000000. Linux requires PCI I/O space to start at 0 on the PCI bus. This patch maps PCI I/O space such that 0xFA000000 in the processor's address space maps to 0 on the PCI I/O bus. Signed-off-by Randy Vinson <rvinson@mvista.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2008-08-26-354/+273
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| * change mvBL-M7 default env and move to vendor subdirAndre Schwarz2008-08-25-30/+38
| | | | | | | | | | | | | | fix mvBL-M7 config and move to matrix_vision subdir Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * MPC83XX: Add miscellaneous registers and #defines to support MPC83xx family ↵Nick Spence2008-08-25-1/+10
| | | | | | | | | | | | | | | | | | | | devices This patch adds elements to the 83xx sysconf structure and #define values that are used by mpc83xx family devices. Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * MPC8349EMDS: Add PCI Agent (PCISLAVE) supportIra W. Snyder2008-08-25-1/+79
| | | | | | | | | | | | | | | | Add the ability for the MPC8349EMDS to run in PCI Agent mode, acting as a PCI card rather than a host computer. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: add PCISLAVE support to 83XX_GENERIC_PCI setup codeIra W. Snyder2008-08-25-0/+26
| | | | | | | | | | | | | | | | | | This adds a helper function to unlock the PCI configuration bit, so that any extra PCI setup (such as outbound windows, etc.) can be done after using the 83XX_GENERIC_PCI code to set up the PCI bus. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * MPC8349EMDS: use 83XX_GENERIC_PCI setup codeIra W. Snyder2008-08-25-318/+63
| | | | | | | | | | | | | | | | Change the MPC8349EMDS board to use the generic PCI initialization code for the mpc83xx cpu. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * fix out of tree buildingKim Phillips2008-08-25-1/+1
| | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * Merge branch 'next'Kim Phillips2008-08-25-9/+62
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| | * 83xx: mpc8315erdb: fix silly thinko in fdt_tsec1_fixupAnton Vorontsov2008-07-16-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The thinko was quite silly indeed, I messed with !ptr. Normally this would trigger some fault, but in U-Boot NULL pointer is equal to phys 0, so the code was working still, just didn't actually test mpc8315erdb environment variable value. Heh. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * 83xx: mpc8315erdb: add support for switching between ULPI/UTMI USB PHYsAnton Vorontsov2008-07-16-2/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale ships MPC8315E-RDB boards either with TSEC1 and USB UTMI support, or without TSEC1 but with USB ULPI PHY support in addition. With this patch user can specify desired USB PHY. Also, it seems that we can't distinguish the two boards in software, so user have to set `mpc8315erdb' environment variable to either 'tsec1' (TSEC1 enabled) or `ulpi' (board with ULPI PHY, TSEC1 disabled), so that Linux will not probe for TSEC1. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * fdt_support: fdt_fixup_dr_usb: add support for phy_type fixupsAnton Vorontsov2008-07-16-7/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently U-Boot can only fixup the usb dr_mode, but some boards (namely MPC8315E-RDB) can use two PHY types: ULPI (stand-alone OTG port) or UTMI (connected to the four-ports hub, usb host only). This patch implements support for passing Dual-Role USB controller's device tree property phy_type through the usb_phy_type environment variable. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | i.MX31: Specify maintainers for i.MX31-based boardsGuennadi Liakhovetski2008-08-26-0/+9
| | | | | | | | | | | | | | | Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | ADS5121: adjust image addresses in RAM and flashWolfgang Denk2008-08-26-7/+9
| | | | | | | | | | | | | | | | | | Use the same mapping in flash as used by Linux Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | cmd_mem.c: Fix help message alignmentWolfgang Denk2008-08-26-15/+15
|/ / | | | | | | | | | | Bug was introced by "Big white-space cleanup" (53677ef1) Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Minor coding style cleanup, updte CHANGELOGWolfgang Denk2008-08-25-14/+927
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2008-08-25-10/+162
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| * | MX31: fix bit masks in function mx31_decode_pll()Jens Gehrlein2008-08-25-2/+2
| | | | | | | | | | | | | | | | | | Bits MPCTL[MFN] and MPCTL[MFD] were not fully covered. Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
| * | Correct ARM Versatile Timer InitializationGururaja Hebbar K R2008-08-25-4/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271), -- Timer Value Register @ TIMER Base + 4 is Read-only. -- Prescale Value (Bits 3-2 of TIMER Control register) can only be one of 00,01,10. 11 is undefined. -- CFG_HZ for Versatile board is set to #define CFG_HZ (1000000 / 256) So Prescale bits is set to indicate - 8 Stages of Prescale, Clock divided by 256 - The Timer Control Register has one Undefined/Shouldn't Use Bit So we should do read/modify/write Operation Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
| * | Add ARM AMBA PL031 RTC SupportGururaja Hebbar K R2008-08-25-0/+124
| | | | | | | | | | | | Signed-off-by: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
| * | ARM DaVinci: Removed redundant NAND initialization code.Hugo Villeneuve2008-08-25-2/+1
| | | | | | | | | | | | | | | | | | ARM DaVinci: Removed redundant NAND initialization code. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
generated by cgit v1.1 at 2024-11-20 11:03:19 +0000