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* OMAP3: fix panel timing on the mt_ventoux boardStefano Babic2012-12-10-4/+4
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* davinci: fixed cpu resetDavide Bonfanti2012-12-10-1/+1
| | | | | | | | The reset procedure works on watchdog timer while before it was modifying TIMER_1 registers. Tested on DM365. Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it>
* OMAP3 SPI : Fixed bugs related to SPI transferajoy2012-12-10-32/+45
| | | | | | | | | | | | | | | | | | | | | | Added posted writes (read after writes) to effect the change immediately for channel confiuration and channel enable register Disable the channel to purge receieve data in TX_ONLY mode transfer otherwise rx data will get affected by the next immediate RX_ONLY mode transfer Wait for the EOT bit to be set after last byte has been loaded to TX shift register in the the TX_ONLY mode.This ensures TX data has been completely shifted out Disable the channel in RX_ONLY mode before reading the last data from RXX register to prevent the SPI slave to transmit next word Signed-off-by: Ajoy Kumar Das <akdas75@yahoo.in> Cc: Tom Rini <trini@ti.com> Cc: jacopo mondi <j.mondi@voltaelectronics.com>
* omap: emif: configure emif only when requiredLokesh Vutla2012-12-10-5/+36
| | | | | | | | DMM_LISA_MAP registers program whether memory is mapped on particular EMIF or not. Irrespective of these registers EMIF is getting configured. Correcting the same. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* OMAP: Tweak omap-common/Makefile since reset.S -> reset.cRobert P. J. Day2012-12-10-3/+2
| | | | | | | | Git commit d417d1db5f9092d125ddea882ced77eaa5f3d236 replaced the omap-common file reset.S with reset.c, but the Makefile was not adjusted for that. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* omap4: Add comments on some "#endif"s for readability.Robert P. J. Day2012-12-10-3/+3
| | | | | | No functional changes, simply for readability. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* omap3: Add a few comments to "#endif"s for readability.Robert P. J. Day2012-12-10-4/+4
| | | | | | | No functional changes, just more comments for readability when a preprocessor check spans more than a few lines, and for consistency. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* Pass sdrc timing values through board_sdrc_timings structurePeter Barada2012-12-10-122/+120
| | | | | | | | | Instead of passing individual registers by value to board_get_mem_timings, pass a board_mem_timings structure pointer for the board files to fill in. Pass same structure pointer to write_sdrc_timings. This saves about 90 bytes of space in SPL. Signed-off-by: Peter Barada <peter.barada@logicpd.com>
* omap3_beagle.h: Fix comment for true/false return value.Robert P. J. Day2012-12-10-1/+1
| | | | Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* am335x_evm: enable SPL NAND supportIlya Yanok2012-12-10-2/+36
| | | | | | | Enable booting from NAND support from AM335x boards as well as environment in NAND. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* am33xx_spl_bch: simple SPL nand loader for AM33XXIlya Yanok2012-12-10-0/+239
| | | | | | | | | | | AM33XX with BCH8 can't work with nand_spl_simple correctly because custom read_page implementation is required for proper syndrome generation. This simple driver mostly duplicates nand_spl_simple but has nand_read_page changed to suit our needs. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* omap_gpmc: BCH8 support (ELM based)Mansoor Ahamed2012-12-10-1/+402
| | | | | | | | | | This patch adds support for BCH8 error correction code to omap_gpmc driver. We use GPMC to generate codes/syndromes but we need ELM to find error locations from given syndrome. Signed-off-by: Mansoor Ahamed <mansoor.ahamed@ti.com> [ilya: merge it with omap_gpmc driver, some fixes and cleanup] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* am33xx: add ELM supportMansoor Ahamed2012-12-10-0/+311
| | | | | | | | | AM33XX has Error Location Module (ELM) that can be used in conjuction with GPMC controller to implement BCH codes fully in hardware. This code is mostly taken from arago tree. Signed-off-by: Mansoor Ahamed <mansoor.ahamed@ti.com> Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* am335x_evm: enable NAND supportIlya Yanok2012-12-10-0/+14
| | | | | | Enable NAND support for AM335X boards. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* am33xx: NAND supportIlya Yanok2012-12-10-0/+370
| | | | | | | | TI AM33XX has the same GPMC controller as OMAP3 so we could just use the existing omap_gpmc driver. This patch adds adds required definitions/intialization. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* am335x_evm: add nand pinmux definitionIlya Yanok2012-12-10-0/+22
| | | | | | | Add NAND pins mux settings for AM335X devices. Enable NAND pins for AM335X EVM board. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* OMAP: include sys_proto.h from boot-commonIlya Yanok2012-12-10-0/+1
| | | | | | | Include asm/arch/sys_proto.h for gpmc_init prototype. Without this we get a warning while building for AM335x. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* omap3/mem.c: remove unused definesAndreas Bießmann2012-12-10-14/+0
| | | | | | | | These GPMC_CS defines are a leftover from prior gpmc_init(). Commit 187af954 removed the need for these definitions but missed to remove them. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com>
* Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2012-11-25-129/+401
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| * mx28: Fix typo in POWER_DCLIMITS_NEGLIMIT_OFFSETMarek Vasut2012-11-24-1/+1
| | | | | | | | | | | | | | | | | | The POWER_DCLIMITS_NEGLIMIT_OFFSET bit in mx28 power supply block is not called POWER_DCLIMITS_NETLIMIT_OFFSET, but POWER_DCLIMITS_NEGLIMIT_OFFSET. Correct the name in the header file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * mx28: Fix typo in POWER_MINPWR_VBG_OFFMarek Vasut2012-11-24-1/+1
| | | | | | | | | | | | | | | | | | The POWER_MINPWR_VBG_OFF bit in mx28 power supply block is not called POWER_MINPWR_FBG_OFF, but POWER_MINPWR_VBG_OFF. Correct the name in the header file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * mx5: Mark lowlevel_init board-specific codeBenoît Thébaudeau2012-11-19-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | The mx5 lowlevel_init.S contains board-specific code based on the reference design. Let's keep it since it avoids creating new lowlevel_init files and it may be used by many boards. But add a config to make it optional in order not to cause issues on boards not following this part of the reference design. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * ehci-mxc: Fix host power mask bit for i.MX25Benoît Thébaudeau2012-11-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance selection bit. This issue has been reported by Eric Bénard <eric@eukrea.com> and fixed by Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s had been copied. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de>
| * mx35pdk: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | | | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx31pdk: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | | | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx25pdk: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | | | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx51evk: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | | | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6qsabre_common: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | | | | | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
| * mx6qsabrelite: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | | | | | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
| * mx53loco: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | | | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx28evk: Configure CONFIG_BOOTDELAY to one secondFabio Estevam2012-11-19-1/+1
| | | | | | | | | | | | | | One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * ehci-mxc: Fix host power mask bit for i.MX35Benoît Thébaudeau2012-11-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance selection bit. This issue has been reported by Michael Burkey <mdburkey@gmail.com> and fixed by Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s had been copied. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * mx6: clock: Only show CSPI clock if CSPI is enabledFabio Estevam2012-11-19-0/+2
| | | | | | | | | | | | | | | | | | If a board does not enable CSPI, there is no need to show the CSPI clock frequency as part of the 'clock' command. Reported-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com>
| * spi: mxc_spi: Fix spi clock glitch durant resetFabio Estevam2012-11-19-2/+2
| | | | | | | | | | | | | | | | | | | | | | Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * spi: mxc_spi: Fix handling of chip selectFabio Estevam2012-11-19-2/+3
| | | | | | | | | | | | | | | | | | In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx5: Print CSPI clock in 'clock' commandFabio Estevam2012-11-19-1/+3
| | | | | | | | | | | | Print CSPI clock in 'clock' command. Signed-off-by: Fabio Estevam <festevam@gmail.com>
| * mx5: Align SPI CS naming with i.MX53 reference manualFabio Estevam2012-11-19-3/+3
| | | | | | | | | | | | Align SPI chip select naming with i.MX53 reference manual. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * ehci-mx5/6: Make board_ehci_hcd_init() optionalBenoît Thébaudeau2012-11-16-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | A custom board_ehci_hcd_init() may be unneeded, so add a weak default implementation doing nothing. By the way, use simple __weak from linux/compiler.h for board_ehci_hcd_postinit() instead of weak alias with full attribute. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * mx35pdk: Add support for OTGBenoît Thébaudeau2012-11-16-0/+39
| | | | | | | | | | | | | | | | | | Add support for the OTG port on the mx35pdk Personality board. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Stefano Babic <sbabic@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de>
| * ehci-mxc: Add support for i.MX35Benoît Thébaudeau2012-11-16-0/+71
| | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * ehci-mxc: Define host offsetsBenoît Thébaudeau2012-11-16-1/+3
| | | | | | | | | | | | | | | | | | | | Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * ehci-mxc: Make i.MX25 EHCI configurableBenoît Thébaudeau2012-11-16-11/+67
| | | | | | | | | | | | | | | | | | Use EHCI MXC configuration options for i.MX25. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Matthias Weisser <weisserm@arcor.de>
| * ehci-mxc: Make EHCI power/oc polarities configurableBenoît Thébaudeau2012-11-16-4/+62
| | | | | | | | | | | | | | | | | | | | Make EHCI power and overcurrent polarities configurable. If not set, these new configurartions keep the default register values so that existing board files do not have to be changed. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * ehci-mx5: Add missing OC_DIS for i.MX53Benoît Thébaudeau2012-11-16-0/+24
| | | | | | | | | | | | | | | | The i.MX53 has MXC_H*_UCTRL_H*_OC_DIS_BIT bits to disable the oc pin. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * ehci-mx5: Fix *PM usage for i.MX53Benoît Thébaudeau2012-11-16-1/+6
| | | | | | | | | | | | | | | | The MXC_*_UCTRL_*PM_BIT bits are available only on i.MX51. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * ehci-mx5: Fix OPM usageBenoît Thébaudeau2012-11-16-2/+2
| | | | | | | | | | | | | | | | | | MXC_OTG_UCTRL_OPM_BIT disables (masks) the power/oc pins if set, like MXC_H1_UCTRL_H1PM_BIT and MXC_H2_UCTRL_H2PM_BIT, not the opposite. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * ehci-mx5: Fix OC_DIS usageBenoît Thébaudeau2012-11-16-3/+3
| | | | | | | | | | | | | | | | | | MXC_OTG_PHYCTRL_OC_DIS_BIT disables the oc pin if set, like MXC_H1_OC_DIS_BIT, not the opposite. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * ehci-mx5: Clean upBenoît Thébaudeau2012-11-16-19/+26
| | | | | | | | | | | | | | | | | | | | Clean up ehci-mx5: - Fix column alignments. - Fix comments. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * ehci-mxc: Clean upBenoît Thébaudeau2012-11-16-46/+40
| | | | | | | | | | | | | | | | | | | | | | Clean up ehci-mxc: - Remove useless #if's. - Fix identation. - Issue a #error if used with an unsupported platform. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * mx31: Move EHCI definitions to ehci-fsl.hBenoît Thébaudeau2012-11-16-26/+22
| | | | | | | | | | | | | | | | | | The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to ehci-fsl.h so that all MXC SoCs can use them. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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