summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* ppc/85xx: Use CONFIG_NS16550_MIN_FUNCTIONS to reduce NAND_SPL sizeKumar Gala2010-04-07-0/+9
| | | | | | | | | | | | | | | | The MPC8536DS_NAND SPL build was failing due to code size increase introduced by commit: commit 33f57bd553edf29dffef5a6c7d76e169c79a6049 Author: Kumar Gala <galak@kernel.crashing.org> Date: Fri Mar 26 15:14:43 2010 -0500 85xx: Fix enabling of L1 cache parity on secondary cores We built in some NS16550 functions that we dont need and can get rid of them via CONFIG_NS16550_MIN_FUNCTIONS. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* p2020ds: add alternate boot bank support using the ngPIXIS FPGATimur Tabi2010-04-07-89/+222
| | | | | | | | | | | | | | | The Freescale P2020DS board uses a new type of PIXIS FPGA, called the ngPIXIS. The ngPIXIS has one distinct new feature: the values of the on-board switches can be selectively overridden with shadow registers. This feature is used to boot from a different NOR flash bank, instead of having a register dedicated for this purpose. Because the ngPIXIS is so different from the previous PIXIS, a new file is introduced: ngpixis.c. Also update the P2020DS checkboard() function to use the new macros defined in the header file. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: improve the PIXIS code and fix a few bugsTimur Tabi2010-04-07-170/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor and document the Freescale PIXIS code, used on most 85xx and 86xx boards. This makes the code easier to read and more flexible. Delete pixis.h, because none of the exported functions were actually being used by any other file. Make all of the functions in pixis.c 'static'. Remove "#include pixis.h" from every file that has it. Remove some unnecessary #includes. Make 'pixis_base' into a macro, so that we don't need to define it in every function. Add "while(1);" loops at the end of functions that reset the board, so that execution doesn't continue while the reset is in progress. Replace in_8/out_8 calls with clrbits_8, setbits_8, or clrsetbits_8, where appropriate. Replace ulong/uint with their spelled-out equivalents. Remove unnecessary typecasts, changing the types of some variables if necessary. Add CONFIG_SYS_PIXIS_VCFGEN0_ENABLE and CONFIG_SYS_PIXIS_VBOOT_ENABLE to make it easier for specific boards to support variations in the PIXIS registers sets. No current boards appears to need this feature. Fix the definition of CONFIG_SYS_PIXIS_VBOOT_MASK for the MPC8610 HPCD. Apparently, "pixis_reset altbank" has never worked on this board. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Set HID1[mbdd] on e500v2 rev5.0 or greaterSandeep Gopalpet2010-04-07-0/+15
| | | | | | | The HID1[MBDD] bit is new on rev5.0 or greater cores and will optimize the performance of mbar/eieio instructions. Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
* 85xx: Added various P1012/P1013/P1021/P1022 definesKumar Gala2010-04-07-6/+53
| | | | | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added P1012/P1013/P1021/P1022 to cpu_type_list and SVR list * Added number of LAWs for P1012/P1013/P1021/P1022 * Set CONFIG_MAX_CPUS to 2 for P1021/P1022 * PCI port config Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/8xxx: Delete PCI nodes from device tree if not configuredKumar Gala2010-04-07-6/+12
| | | | | | | | | | | | | If the PCI controller wasn't configured or enabled delete from the device tree (include its alias). For the case that we didn't even configure u-boot with knowledge of the controller we can use the fact that the pci_controller pointer is NULL to delete the node in the device tree. We determine that a controller was not setup (because of HW config) based on the fact that cfg_addr wasn't setup. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fdt: Add fdt_del_node_and_alias helperKumar Gala2010-04-07-0/+14
| | | | | | | | Add a helper function that given an alias will delete both the node the alias points to and the alias itself Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
* 85xx: Add defines for BUCSR bits to make code more readableKumar Gala2010-04-07-5/+10
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl-ddr: change the default burst mode for DDR3Dave Liu2010-04-07-4/+10
| | | | | | | For 64B cacheline SoC, set the fixed 8-beat burst len, for 32B cacheline SoC, set the On-The-Fly as default. Signed-off-by: Dave Liu <daveliu@freescale.com>
* fsl-ddr: Fix the turnaround timing for TIMING_CFG_4Dave Liu2010-04-07-9/+17
| | | | | | | | | | Read-to-read/Write-to-write turnaround for same chip select of DDR3 memory, BL/2+2 cycles is enough for them at BC4 and OTF case, BL/2 cycles is enough for fixed BL8. Cutting down the turnaround from BL/2+4 to BL/2+2 or BL/2 will improve the memory performance. Signed-off-by: Dave Liu <daveliu@freescale.com>
* fsl_esdhc: Only modify the field we are changing in WMLRoy Zang2010-04-07-5/+6
| | | | | | | | | When we set the read or write watermark in WML we should maintain the rest of the register as is, rather than using some hard coded value. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Add function to reset the eSDHC controllerJerry Huang2010-04-07-0/+18
| | | | | | | | | | | | To support multiple block read command we must set abort or use auto CMD12. If we booted from eSDHC controller neither of these are used and thus we need to reset the controller to allow multiple block read to function. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Always stop clock before changing frequencyKumar Gala2010-04-07-10/+4
| | | | | | | | We need to stop the clocks on 83xx/85xx as well as imx. No need to make this code conditional to just imx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Stefano Babic <sbabic@denx.de>
* Merge branch 'next'Wolfgang Denk2010-04-01-2309/+3338
|\
| * i2c: made unused function i2c_mux_add_device staticFrans Meulenbroeks2010-03-29-3/+1
| | | | | | | | | | | | and removed it from the .h file Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
| * cmd_i2c: introduced get_alen helper functionFrans Meulenbroeks2010-03-29-72/+47
| | | | | | | | | | | | | | The code to parse alen appeared 6 times in the function. Factored this out in a small helper function Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
| * cmd_i2c: moved a define to before the functionsFrans Meulenbroeks2010-03-29-2/+2
| | | | | | | | Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
| * cmd_i2c: moved mispositioned comment for i2c mdFrans Meulenbroeks2010-03-29-4/+4
| | | | | | | | Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
| * cmd_i2c.c: declared local functions as staticFrans Meulenbroeks2010-03-29-14/+14
| | | | | | | | | | | | Declared all functions that were not called outside the file as static Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
| * Merge remote branch 'origin/master' into nextWolfgang Denk2010-03-29-1760/+195
| |\
| * \ Merge branch 'next' of git://www.denx.de/git/u-boot-cfi-flash into nextWolfgang Denk2010-03-29-7/+86
| |\ \
| | * | cfi flash: add status polling method for amd flashThomas Chou2010-03-26-7/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds status polling method to offer an alternative to data toggle method for amd flash chips. This patch is needed for nios2 cfi flash interface, where the bus controller performs 4 bytes read cycles for a single byte read instruction. The data toggle method can not detect chip busy status correctly. So we have to poll DQ7, which will be inverted when the chip is busy. This feature is enabled with the config def, CONFIG_SYS_CFI_FLASH_STATUS_POLL Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | Merge branch 'next' of git://git.denx.de/u-boot-coldfire into nextWolfgang Denk2010-03-28-906/+2371
| |\ \ \
| | * | | ColdFire: Fix m54455EVB save environment bugTsiChung Liew2010-03-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ATMEL flash does not have buffer write feature. Assgined buffer_size = 1, so that when there is a write to the flash will not use buffer write function. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| | * | | ColdFire: Fix incorrect M5253DEMO default environmentTsiChung Liew2010-03-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The flash location is at 0xff800000, not 0 Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| | * | | ColdFire: Cache update for all platformsTsiChung Liew2010-03-24-599/+658
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CF will call cache functions in lib_m68/cache.c and the cache settings are defined in platform configuration file. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| | * | | ColdFire: Fix SDRAM size on M5208evb rev ETsiChung Liew2010-03-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The proper SDRAM size is 32MB not 64MB Signed-off-by: Jingchang Lu <b22599@freescale.com>
| | * | | ColdFire: Misc update for M53017TsiChung Liew2010-03-24-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reside Ethernet buffer descriptors in SRAM instead of DRAM. Add CONFIG_SYS_TX_ETH_BUFFER in platform configuration file. Update DRAM control and SRAM control register setting. Update cache setting where size does not write to proper region. Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com>
| | * | | ColdFire: Add CPU compile flag for mcf5301x and mcf532xTsiChung Liew2010-03-24-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add CPU compile flag -mcpu=53015 in cpu/config.mk Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| | * | | ColdFire: Update Extra environment Data for M5275EVBTsiChung Liew2010-03-24-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide extra environment Data. Remove default network address and MAC address. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| | * | | ColdFire: M5271EVB DRAM Bring up issueTsiChung Liew2010-03-24-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix proper portsize: The register for portsize is either 00b, 01b, or 1xb. The value that previous assigned is 32d. Fix DRAM bring up: insert asm("nop") for every DRAM register setup Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| | * | | ColdFire: Update M5253DEMO configuration fileTsiChung Liew2010-03-24-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix incorrect default environment for flash erase or protect range. Change offset from 0 to 0xff80nnnn. Remove default ethernet setup and MAC address. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| | * | | ColdFire: Relocate vector table - mcf5445xTsiChung Liew2010-03-24-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer ColdFire processors family boot from address 0 instead of 0xFFnn_nnnn. When the boot flash base chip select is set at new location instead of 0, an un-predictable error will occur if there is an vector being trigger and refer it to an invalid address or the vector table handler is not existed at address 0. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| | * | | ColdFire: Update uart_port_conf in serial driverTsiChung Liew2010-03-24-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide proper port passing from serial_init to uart_part_conf. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| | * | | ColdFire: Update processors' serial port configurationTsiChung Liew2010-03-24-51/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide parameter passing to uart_port_config(). Update port configuration - un-mask it before enable the bits. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| | * | | ColdFire: Correct bit definitionTsiChung Liew2010-03-24-209/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use correct definition for _MASK and _UNMASK. It was combined in the previous used and causes confusion. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| | * | | fix cmd_bdinfo.c:354: warning: 'print_eth' defined but not usedPhilippe De Muyter2010-03-24-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the following warnings when running MAKEALL for coldfire : cmd_bdinfo.c:354: warning: 'print_eth' defined but not used Signed-off-by: Philippe De Muyter <phdm at macqel.be>
| | * | | Adding EP2500 MCF5282 board [PATCH]Michael Durrant2010-03-24-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mercury-EP2500.patch - added Mercury's EP2500 board uses the mcf5282 processor CREDITS.patch Signed-off-by: David Wu <davidwu@arcturusnetworks.com> Signed-off-by: Michael Durrant <mdurrant@arcturusnetworks.com>
| | * | | add block write function to spartan3 slave serial loadWolfgang Wegner2010-03-24-25/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using seperate function calls for each bit-bang of slave serial load can be painfully slow. This patch adds the possibility to supply a block write function that loads the complete block of data in one call (like it can already be done with Altera FPGAs). On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load time from around 15 seconds to around 3 seconds Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
| | * | | add ASTRO MCF5373L boardWolfgang Wegner2010-03-24-0/+1291
| | |/ / | | | | | | | | | | | | | | | | | | | | This patch adds support for ASTRO board(s) based on MCF5373L. Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
| * | | cmd_nand: show nand scrub confirmation characterFlorian Fainelli2010-03-23-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When issuing a nand scrub command, the entered character is not displayed this may be confusing. This patch makes the input character being displayed if it is a 'y' so that an user knows he is about to scrub his nand. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * | | at91: add hwecc method for nandNikolay Petukhov2010-03-23-0/+301
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a patch to use the hardware ECC controller of the AT91SAM9260 for the AT91 nand. Taken from the kernel 2.6.33. Signed-off-by: Nikolay Petukhov <Nikolay.Petukhov@gmail.com>
| * | | TI: Davinci: NAND Driver CleanupCyril Chemparathy2010-03-23-101/+106
| |/ / | | | | | | | | | | | | | | | | | | Modified to use IO accessor routines consistently. Eliminated volatile usage to keep checkpatch.pl happy. Signed-off-by: Cyril Chemparathy <cyril@ti.com>
| * | Merge remote branch 'origin/master' into nextWolfgang Denk2010-03-22-19/+219
| |\ \
| * \ \ Merge remote branch 'origin/master' into nextWolfgang Denk2010-03-21-35/+65
| |\ \ \
| * | | | fdt_support: add partitions fixup in mtd nodeAnatolij Gustschin2010-03-21-1/+234
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow overwriting defined partitions in the device tree blob using partition info defined in the 'mtdparts' environment variable. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Gerald Van Baren <vanbaren@cideas.com>
| * | | | cmd history: Match history buffer size to console bufferJohn Schmoller2010-03-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Match history buffer size to console buffer size. History buffer size was hard coded to 256, artificially limiting the command buffer size. The history buffer now tracks CONFIG_SYS_CBSIZE. Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
| * | | | console: Fix console buffer overrunJohn Schmoller2010-03-21-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_SYS_CBSIZE equals MAX_CMDBUF_SIZE, a command string of maximum length will overwrite part of the history buffer, causing the board to die. Expand the console_buffer and hist_lines buffer by one character each to hold the missing NULL char. Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
| * | | | POST: add progress APIMichael Zaidman2010-03-21-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add POST progress API implemented as weak calls before and after each call to the POST test callback in the post_run_single routine of the post.c file. Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com> Acked-by: Detlev Zundel <dzu@denx.de>
| * | | | cmd_setexpr: allow memory addresses in expressionsFrans Meulenbroeks2010-03-21-4/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add functionality to use memory addresses in expressions. This increases the power of expressions substantially It adheres to the standard convemtions: memory addresses can be given in the format *address (e.g. *1000) Rationale for this change is that it allows masking off bits from a byte that is obtained by reading data from e.g. i2c. Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com> Fix warning: control reaches end of non-void function Signed-off-by: Wolfgang Denk <wd@denx.de>