summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* buildman: Fix some typos in READMEDirk Behme2014-12-29-7/+7
| | | | | Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* Fix hash verificationNikolay Dimitrov2014-12-29-19/+15
| | | | | | | | | | Fix issue in parse_verify_sum() which swaps handling of env-var and *address. Move hash_command() argc check earlier. Cosmetic change on do_hash() variable declaration. Improved help message for "hash" command. Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg> Reviewed-by: Simon Glass <sjg@chromium.org>
* common/board_f.c: fix compile error when tracing disabledKevin Hilman2014-12-29-0/+2
| | | | | | | | | | | | When CONFIG_TRACE is disabled, linking fails with: common/built-in.o:(.data.init_sequence_f+0x8): undefined reference to `trace_early_init' To fix, wrap the call to trace_early_init() with #ifdef CONFIG_TRACE. Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
* bcm281xx: add support for "USB OTG clock"Steve Rae2014-12-29-0/+52
| | | | | | | | enable this clock with the following: clk_usb_otg_enable((void *)HSOTG_BASE_ADDR) Signed-off-by: Steve Rae <srae@broadcom.com> Reviewed-by: Felipe Balbi <balbi@ti.com>
* initcall: add explicit hint if initcall was relocatedAlexey Brodkin2014-12-29-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit "initcall: Improve debugging support" makes sense and indeed simplifies process of matching initcalls executed with static disassembly. Until you are debugging relocation functionality. Existign output may make you think that at some point execution somehow returned back to non-relocated area. And there're many reasons/problems that may provoke this behavior. In order to make things clear let's add explicit mention in case initall was actually relocated like this: --->--- initcall: 810015f8 Relocation Offset is: 0efcf000 Relocating to 8ffcf000, new gd at 8fdced3c, sp at 8fdced20 initcall: 810015b8 initcall: 8ffd093c initcall: 8ffd0a14 initcall: 81001940 (relocated to 8ffd0940) initcall: 81001958 (relocated to 8ffd0958) --->--- Note "unexpected" jump from 0x8f... area to 0x81... area. Without explanation this raises many questions: execution jumped in relocated area right as expected and then for some reason returned back? But I hope comment in brackets will save some time for those curious developers who are careful enough to catch "unexpected jump to pre-reloc area" or those unlucky ones who'll have to deal with relocation debugging. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com>
* scripts: fix binutils-version.shMasahiro Yamada2014-12-29-2/+4
| | | | | | | | | | | | | The current binutils-version.sh expects the version string at the end of the first line. It turned out to not work with Linaro toolchain: It has "Linaro 2014.09" at the back. To fix this issue, let's parse the word right after the close parenthesis. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reported-by: York Sun <yorksun@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com>
* ARM: rpi: consolidate board rev error checkingStephen Warren2014-12-29-7/+9
| | | | | | | | | Create a fake model table entry with default values, so we can error check the board rev value once when querying it from the firmware, rather than error-checking for invalid board rev values every time the model table is used. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: rpi: support model A+Stephen Warren2014-12-29-2/+13
| | | | | | | Add a board rev entry for the new model A+, and augment the board rev error handling code to be a bit more verbose. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: rpi: only set usbethaddr on relevant systemsStephen Warren2014-12-29-0/+17
| | | | | | | | | Model A and CM RPis don't have an on-board USB Ethernet device. Hence, there's no point setting $usbethaddr based on the device fuses. Use the model detection code to gate this. Note that the fuses are actually programmed even on those devices though. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* vexpress64: switch to generic boardLinus Walleij2014-12-29-2/+3
| | | | | | | | | | | The few Versatile Express ARMv8 platforms we have may just as well be switched to generic board from the beginning. Tested on the ARM foundation model and the in progress support for the ARMv8 Juno board. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Steve Rae <srae@broadcom.com>
* vexpress64: take over maintenance of the semi vexpress64Linus Walleij2014-12-29-1/+1
| | | | | | | | | As agreed with Steve Rae I'm taking over maintenance of the semihosted, emulated FVP/foundation model Versatile Express 64 bit board variant. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Steve Rae <srae@broadcom.com>
* arm: semihosting: get rid of forward declarationsLinus Walleij2014-12-29-89/+84
| | | | | | | | | | | | | | By rearranging the functions in the semihosting code we can avoid forward-declaration of the internal static functions. This puts the stuff in a logical order: read/open/close/len and then higher-order functions follow at the end. Cc: Darwin Rambo <drambo@broadcom.com> Cc: AKASHI Takahiro <takahiro.akashi@linaro.org> Cc: Mark Hambleton <mark.hambleton@arm.com> Cc: Tom Rini <trini@ti.com> Acked-by: Steve Rae <srae@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* arm: semihosting: fix up compile bugsLinus Walleij2014-12-29-50/+53
| | | | | | | | | | | | | | | | | | | | There is currently a regression when using newer ARM64 compilers for semihosting: the way long types are inferred from context is no longer the same. The semihosting runtime uses long and size_t, so use this explicitly in the semihosting code and interface, and voila: the code now works again. Tested with aarch64-linux-gnu-gcc: Linaro GCC 4.9-2014.09. Cc: Darwin Rambo <drambo@broadcom.com> Cc: AKASHI Takahiro <takahiro.akashi@linaro.org> Cc: Mark Hambleton <mark.hambleton@arm.com> Cc: Tom Rini <trini@ti.com> Acked-by: Steve Rae <srae@broadcom.com> Suggested-by: Mark Hambleton <mark.hambleton@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* arm: semihosting: staticize internal functionsLinus Walleij2014-12-29-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | The semihosting code exposes internal file handle handling functions to read(), open(), close() and get the length of a certain file handle. However the code using it is only interested in either reading and entire named file into memory or getting the file length of a file referred by name. No file handles are used. Thus make the file handle code internal to this file by removing these functions from the semihosting header file and staticize them. This gives us some freedom to rearrange the semihosting code without affecting the external interface. Cc: Darwin Rambo <drambo@broadcom.com> Cc: AKASHI Takahiro <takahiro.akashi@linaro.org> Cc: Mark Hambleton <mark.hambleton@arm.com> Cc: Tom Rini <trini@ti.com> Acked-by: Steve Rae <srae@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2014-12-28-2/+2
|\
| * arm: rmobile: kconfig: Remove '+S:' prefix from defconfig filesNobuhiro Iwamatsu2014-12-26-2/+2
| | | | | | | | | | | | | | | | '+S' is unnecessary because boards of rmobile do not use SPL. This removes from armadillo-800eva and kzm9g. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge git://git.denx.de/u-boot-x86Tom Rini2014-12-19-1718/+3381
|\ \
| * | x86: Add a script to process Intel microcode filesSimon Glass2014-12-18-0/+254
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel delivers microcode updates in a microcode.dat file which must be split up into individual files for each CPU. Add a tool which performs this task. It can list available microcode updates for each model and produce a new microcode update in U-Boot's .dtsi format. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Clean up the FSP support codesBin Meng2014-12-18-290/+279
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the follow-on patch to clean up the FSP support codes: - Remove the _t suffix on the structures defines - Use __packed for structure defines - Use U-Boot's assert() - Use standard bool true/false - Remove read_unaligned64() - Use memcmp() in the compare_guid() - Remove the cast in the memset() call - Replace some magic numbers with macros - Use panic() when no valid FSP image header is found - Change some FSP utility routines to use an fsp_ prefix - Add comment blocks for asm_continuation and fsp_init_done - Remove some casts in find_fsp_header() - Change HOB access macros to static inline routines - Add comments to mention find_fsp_header() may be called in a stackless environment - Add comments to mention init(&params) in fsp_init() cannot be removed Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: Add a README.x86 for U-Boot on x86 supportBin Meng2014-12-18-0/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Use 'Link' as the name for the Chromebook Pixel consistently) Change-Id: I158c88653978ff212334f6d4ffeaf49fa81baefe
| * | x86: Rename coreboot-serial to x86-serialBin Meng2014-12-18-11/+11
| | | | | | | | | | | | | | | Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: crownbay: Add SDHCI supportBin Meng2014-12-18-1/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are two standard SD card slots on the Crown Bay board, which are connected to the Topcliff PCH SDIO controllers. Enable the SDHC support so that we can use them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: crownbay: Enable Intel E1000 NIC supportBin Meng2014-12-18-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | We don't have driver for the Intel Topcliff PCH Gigabit Ethernet controller for now, so enable the Intle E1000 NIC support, which can be plugged into any PCIe slot on the Crown Bay board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: crownbay: Add SPI flash supportBin Meng2014-12-18-1/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | The Crown Bay board has an SST25VF016B flash connected to the Tunnel Creek processor SPI controller used as the BIOS media where U-Boot is stored. Enable this flash support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: Include FSP and CMC binary in the u-boot.rom build rulesBin Meng2014-12-18-2/+10
| | | | | | | | | | | | | | | Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: Use consistent name XXX_ADDR for binary blob flash addressBin Meng2014-12-18-7/+7
| | | | | | | | | | | | | | | Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: Add crownbay defconfig and config.hBin Meng2014-12-18-0/+58
| | | | | | | | | | | | | | | Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: Add queensbay and crownbay Kconfig filesBin Meng2014-12-18-0/+112
| | | | | | | | | | | | | | | Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: Enable the queensbay cpu directory buildBin Meng2014-12-18-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: ich6-gpio: Add Intel Tunnel Creek GPIO supportBin Meng2014-12-18-12/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Tunnel Creek GPIO register block is compatible with current ich6-gpio driver, except the offset and content of GPIO block base address register in the LPC PCI configuration space are different. Use u16 instead of u32 to store the 16-bit I/O address of the GPIO registers so that it could support both Ivybridge and Tunnel Creek. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: Convert microcode format to device-tree-onlySimon Glass2014-12-18-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To avoid having two microcode formats, adjust the build system to support obtaining the microcode from the device tree, even in the case where it must be made available before the device tree can be accessed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Add basic support to queensbay platform and crownbay boardBin Meng2014-12-18-0/+369
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement minimum required functions for the basic support to queensbay platform and crownbay board. Currently the implementation is to call fsp_init() in the car_init(). We may move that call to cpu_init_f() in the future. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: Integrate Tunnel Creek processor microcodeBin Meng2014-12-18-0/+368
| | | | | | | | | | | | | | | | | | | | | | | | Integrate the processor microcode version 1.05 for Tunnel Creek, CPUID device 20661h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | x86: Correct problems in the microcode loadingSimon Glass2014-12-18-10/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are several problems in the code. The device tree decode is incorrect in ways that are masked due to a matching bug. Both are fixed. Also microcode_read_rev() should be inline and called before the microcode is written. Note: microcode writing does not work correctly on ivybridge for me. Further work is needed to resolve this. But this patch tidies up the existing code so that will be easier. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: ivybridge: Update the microcodeSimon Glass2014-12-18-1374/+1504
| | | | | | | | | | | | | | | | | | | | | | | | There are new microcode revisions available. Update them. Also change the format so that the first 48 bytes are not omitted from the device tree data. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Move microcode updates into a separate directorySimon Glass2014-12-18-2/+2
| | | | | | | | | | | | | | | | | | | | | We might end up with a few of these, so put them in their own directory. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: ifdtool: Add support for early microcode accessSimon Glass2014-12-18-8/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Intel CPUs use an 'FSP' binary blob which provides an inflexible means of starting up the CPU. One result is that microcode updates can only be done before RAM is available and therefore parsing of the device tree is impracticle. Worse, the addess of the microcode update must be stored in ROM since a pointer to its start address and size is passed to the 'FSP' blob. It is not possible to perform any calculations to obtain the address and size. To work around this, ifdtool is enhanced to work out the address and size of the first microcode update it finds in the supplied device tree. It then writes these into the correct place in the ROM. U-Boot can then start up the FSP correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: ifdtool: Use a structure for the file/address listSimon Glass2014-12-18-6/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than two independent arrays, use a single array of a suitable structure. Also add a 'type' member since we will shortly add additional types. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: ifdtool: Display filename when file errors are reportedSimon Glass2014-12-18-12/+18
| | | | | | | | | | | | | | | | | | | | | | | | When a file is missing it helps to know which file. Update the error message to print this information. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: ifdtool: Correct a debug() missing parameterSimon Glass2014-12-18-1/+2
| |/ | | | | | | | | | | | | | | This is missing a parameter. Fix it to avoid a warning when debug is enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2014-12-18-105/+317
|\ \ | |/ |/|
| * fastboot: handle flash write to GPT partitionsSteve Rae2014-12-18-3/+145
| | | | | | | | | | | | | | | | | | | | | | Implement a feature to allow fastboot to write the downloaded image to the space reserved for the Protective MBR and the Primary GUID Partition Table. Additionally, prepare and write the Backup GUID Partition Table. Signed-off-by: Steve Rae <srae@broadcom.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [Test HW: Exynos4412 - Trats2]
| * disk: part_efi: move code to static functionsSteve Rae2014-12-18-73/+102
| | | | | | | | | | | | Signed-off-by: Steve Rae <srae@broadcom.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [Test HW: Exynos4412 - Trats2]
| * dfu: dfu_get_buf: check the value of env dfu_bufsiz before usePrzemyslaw Marczak2014-12-18-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In function dfu_get_buf(), the size of allocated buffer could be defined by the env variable. The size from this variable was passed for memalign() without checking its value. And the the memalign will return non null pointer for size 0. This could possibly cause data abort, so now the value of var is checked before use. And if this variable is set to 0 then the default size will be used. This commit also changes the base passed to simple_strtoul() to 0. Now decimal and hex values can be used for the variable dfu_bufsiz. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [TestHW: Exynos4412-Trats2]
| * gadget: f_thor: check pointers before use in download_tail()Przemyslaw Marczak2014-12-18-2/+14
| | | | | | | | | | | | | | | | | | | | Some pointers in function download_tail() were not checked before the use. This could possibly cause the data abort. To avoid this, check if the pointers are not null is added. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [TestHW: Exynos4412-Trats2]
| * dfu: mmc: check if mmc device exists in mmc_block_op()Przemyslaw Marczak2014-12-18-1/+7
| | | | | | | | | | | | | | | | | | | | | | The function mmc_block_op() is the last function before the physicall data write, but the mmc device pointer is not checked. If mmc device not exists, then data abort will occur. To avoid this, first the mmc device pointer is checked. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [TestHW: Exynos4412-Trats2]
| * fastboot: add support for continue commandRob Herring2014-12-18-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | The fastboot continue command is defined to exit fastboot and continue autoboot. This commit implements the continue command and the exiting of fastboot only. Subsequent u-boot commands can be processed after exiting fastboot. Autoboot should implement a boot script such as "fastboot; mmc read <...>; bootm" to fully implement the fastboot continue function. Signed-off-by: Rob Herring <robh@kernel.org> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [TestHW: Exynos4412-Trats2]
| * usb, g_dnl: generalize DFU detach functionsRob Herring2014-12-18-23/+25
| | | | | | | | | | | | | | | | | | In order to add detach functions for fastboot, make the DFU detach related functions common so they can be shared. Signed-off-by: Rob Herring <robh@kernel.org> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [TestHW: Exynos4412-Trats2]
| * USB: gadget: atmel_usba_udc: fix transfer hang issueBo Shen2014-12-16-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | When receive data, the RXRDY in status register set by hardware after a new packet has been stored in the endpoint FIFO. After, we copy from FIFO, we clear it, make the FIFO can be accessed again. In the receive_data() function, this bit RXRDY has been cleared. So, after the receive_data() function return, this bit should not be cleared again, or else it will cause the accessing FIFO corrupt, which will make the data loss. Signed-off-by: Bo Shen <voice.shen@atmel.com>
* | ARM: UniPhier: enable CONFIG_CMD_DMMasahiro Yamada2014-12-18-0/+2
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
generated by cgit v1.1 at 2024-11-14 20:54:14 +0000