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* x86: Add a simple header file for ACPISimon Glass2014-11-25-0/+24
| | | | | | | We don't use many features yet, so this only has a few declarations. It will be expanded as needed. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: ivybridge: Add support for BD82x6x PCHSimon Glass2014-11-25-0/+167
| | | | | | Add basic setup for the PCH. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Set up edge triggering on interrupt 9Simon Glass2014-11-25-0/+49
| | | | | | | Add this additional init in case it is needed by the OS. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: Add functions to read and write a BAR addressSimon Glass2014-11-25-3/+44
| | | | | | | | | Some PCI functions cannot be auto-configured. Add a function to set up a fixed BAR which can be used in these situations. Also add a function to read the current address of a BAR. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: config: Enable plug-and-play for link PCISimon Glass2014-11-25-0/+3
| | | | | | | | Enable this option so that we can configure the available PCI devices. Also make sure that PCI is available early after relocation as we use it for several other subsystems. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: pci: Add handlers before and after a PCI hose scanSimon Glass2014-11-25-0/+15
| | | | | | | | Some boards will want to do some setup before and after a PCI hose is scanned. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add ioapic.h headerSimon Glass2014-11-25-0/+38
| | | | | | Add definitions for the I/O Advanced Peripheral Interrupt Controller. Signed-off-by: Simon Glass <sjg@chromium.org>
* rtc: mc146818: Set up RTC at start of daySimon Glass2014-11-25-5/+45
| | | | | | | Provide a function to set up the RTC ready for use. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Factor out common values in the link scriptSimon Glass2014-11-25-7/+12
| | | | | | | | | Define the reset base in config.mk so that it does not need to be calculated twice in the link script. Also tidy up the START_16 and RESET_VEC_LOC values to fit with this new approach. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Ensure that all relocation data is included in the imageSimon Glass2014-11-25-1/+3
| | | | | | | | | Some toolchains put the relocation data into separate sections. Adjust the linker script to catch this case. Without relocation data, U-Boot will not boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Panic if there is no relocation dataSimon Glass2014-11-25-0/+3
| | | | | | | | | This normally indicates a problem which will prevent relocation from functioning, resulting in a hang. Panic in this case to make it easier to debug. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Remove board_early_init_r()Simon Glass2014-11-25-20/+0
| | | | | | | | This function is not needed. Remove it to improve the generic init sequence slightly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: Update pci_ids.h to include some missing IDsSimon Glass2014-11-25-6/+181
| | | | | | | This was taken from Linux 3.18 with some additional IDs from Chrome OS Coreboot commit 688ef385. Signed-off-by: Simon Glass <sjg@chromium.org>
* Align embedded device tree correctlySimon Glass2014-11-25-0/+2
| | | | | | | | Device trees must be aligned to a 4-byte boundary. This was dropped in the Kbuild conversion. Bring it back, and use 16-byte alignment for good measure. Signed-off-by: Simon Glass <sjg@chromium.org>
* Fix SIZE_MAX compiler warning when using stdint.hSimon Glass2014-11-25-0/+2
| | | | | | | This new symbol may be defined by the compiler. If it is, avoid a compiler warning when USE_STDINT is defined. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add ivybridge directory to MakefileSimon Glass2014-11-25-0/+2
| | | | | | | It is now required to add subdirectories in the x86 cpu Makefile. Add this to fix a build breakage for chromebook_link. Signed-off-by: Simon Glass <sjg@chromium.org>
* Prepare v2015.01-rc2Tom Rini2014-11-24-1/+1
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-11-24-11/+76
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| * ARM: bootm: Allow booting in secure mode on hyp capable systemsHans de Goede2014-11-24-5/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Older Linux kernels will not properly boot in hyp mode, add support for a bootm_boot_mode environment variable, which can be set to "sec" or "nonsec" to force booting in secure or non-secure mode when build with non-sec support. The default behavior can be selected through CONFIG_ARMV7_BOOT_SEC_DEFAULT, when this is set booting in secure mode is the default. The default setting for this Kconfig option is N, preserving the current behavior of booting in non-secure mode by default when non-secure mode is supported. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
| * ARM: Add arch/arm/cpu/armv7/Kconfig with non-secure and virt optionsHans de Goede2014-11-24-6/+31
| | | | | | | | | | | | | | | | | | Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options, this is a preparation patch for adding an env variable to choose between secure / non-secure boot on non-secure boot capable systems, specifically this prepares for adding CONFIG_ARMV7_BOOT_SEC_DEFAULT as a proper Kconfig option. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * Kconfig: Add EXPERT optionTom Rini2014-11-24-0/+8
| | | | | | | | | | | | | | | | | | | | | | For similar reasons to why the Linux Kernel has an EXPERT option, we too want an option to allow for tweaking of some options that while normally should remain hidden, may need to be changed in some cases. Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Revert "hush: fix segfault on syntax error"Rabin Vincent2014-11-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | 128059b92 ("hush: fix segfault on syntax error") attempted to fix a segfault on syntax errors, but it broke Ctrl-C handling, and the assumption that it made, that rcode could not be -1, is incorrect. Revert this change. Reported-by: Stephen Warren <swarren@wwwdotorg.org> Reported-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Rabin Vincent <rabin@rab.in>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-24-451/+1242
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| * | mx6boards: Fix error handling in board_mmc_init()Fabio Estevam2014-11-24-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Cc: Eric Benard <eric@eukrea.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | nitrogen6x: Fix error handling in board_mmc_init()Fabio Estevam2014-11-24-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | ot1200: Fix error handling in board_mmc_init()Fabio Estevam2014-11-24-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | arm: imx: stop sata on bootNikita Kiryanov2014-11-24-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ideally, the Linux kernel should get the hardware in its most untouched state. For the most part, U-Boot does not reset the various subsystems it touches before boot, and usually Linux deals with it, but on some boards (cm_fx6) the Linux kernel fails to detect the ssd correctly if sata is used by U-Boot. Power off sata on OS boot so that Linux will have a clean state to work with. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de>
| * | arm: mx6: cm_fx6: implement board specific sata stopNikita Kiryanov2014-11-24-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | Provide board specific implementation for sata stop command for cm_fx6. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de>
| * | cmd_sata: implement sata stop commandNikita Kiryanov2014-11-24-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement sata stop command. This introduces the __sata_stop() weak function, which mirrors the weak __sata_initialize() function, giving users the option of undoing the custom steps performed in overrides of sata_initialize(). Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
| * | sata: implement reset_sata for dwc_ahsataNikita Kiryanov2014-11-24-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add reset_sata() to the sata driver interface and implement it for dwc_ahsata. This function cleans up after sata_init(), and therefore accepts a device number like sata_init() does. A dummy implementation is provided for the rest of the drivers. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de>
| * | arm: mx6: introduce disable_sata_clockNikita Kiryanov2014-11-24-0/+9
| | | | | | | | | | | | | | | | | | | | | Implement disable_sata_clock for mx6 SoCs. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de>
| * | gw_ventana: Use the generic spl_sd.cfgFabio Estevam2014-11-24-24/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gw_ventana can boot from SPI or NAND and both of these interfaces boot from the same 0x400 offset. This means that we could simplify the code and replace the custom gw_ventana.cfg with the generic spl_sd.cfg, as it provides the same boot offset of 0x400. Cc: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx53ard: Fix error handling in board_mmc_init()Fabio Estevam2014-11-21-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx53evk: Fix error handling in board_mmc_init()Fabio Estevam2014-11-21-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx53smd: Fix error handling in board_mmc_init()Fabio Estevam2014-11-21-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx6qarm2: Fix error handling in board_mmc_init()Fabio Estevam2014-11-21-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx51evk: Fix error handling in board_mmc_init()Fabio Estevam2014-11-21-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx6: mx6sabre common: Enable i.MX thermal DM driverYe.Li2014-11-21-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable i.MX thermal DM driver to mx6sabre_common.h file. Since the thermal is used in init_sequence_f, so define the CONFIG_SYS_MALLOC_F_LEN to support DM driver using in pre relocation phase. Additional, thermal driver depends on ocotp, make sure to enable CONFIG_MXC_OCOTP when CONFIG_IMX6_THERMAL is selected. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
| * | mx6: thermal: Check cpu temperature via thermal sensorYe.Li2014-11-21-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | Add imx6 thermal device to mx6 soc file. Read the cpu temperature using this device to access onchip thermal sensor. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
| * | DM: thermal: Add imx thermal DM driverYe.Li2014-11-21-0/+277
| | | | | | | | | | | | | | | | | | | | | | | | Add a new thermal uclass for thermal sensor and implement the imx thermal driver basing on this uclass. Signed-off-by: Ye.Li <B37916@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | mx6: clock: Add thermal clock enable functionNitin Garg2014-11-21-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | Add api to check and enable pll3 as required for thermal sensor driver. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
| * | tbs2910: Fix error handling in board_mmc_init()Soeren Moch2014-11-21-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Based on similar patches by Fabio Estevam for mx6sabresd, mx53loco, wandboard Signed-off-by: Soeren Moch <smoch@web.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * | imx: imx6q/dlsabreauto: Add PMIC Pfuze100 supportYe.Li2014-11-20-0/+21
| | | | | | | | | | | | | | | | | | | | | Add the pfuze100 initialization in power_init_board for imx6q/dl sabreauto board. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | imx: mx6sxsabresd: Use the pfuze common init functionYe.Li2014-11-20-41/+7
| | | | | | | | | | | | | | | | | | | | | | | | Modify the pfuze init for mx6sxsabresd to use the shared "pfuze_common_init" function. And move this initialization to power_init_board. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | imx: mx6sabresd: Use the pfuze common init functionYe.Li2014-11-20-43/+9
| | | | | | | | | | | | | | | | | | | | | | | | Modify the pfuze init for mx6sabresd to use the shared "pfuze_common_init" function. And move this initialization to power_init_board. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | imx: mx6sabre common: Factorize the Pfuze init functionYe.Li2014-11-20-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since the Pfuze initializations are similar on various mx6 SABRE boards. Factorize the initialization to a common function in file board/freescale/common/pfuze.c. So that all SABRE boards BSP can share the function. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | power: pfuze100: Update definitions for buck regulatorsYe.Li2014-11-20-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | Add definitions for buck regulators (SW1A/B/C) registers and voltage values. Signed-off-by: Ye.Li <B37916@freescale.com> Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * | imx: mx6sxsabresd: Add board support for USDHC2 and USDHC3Ye.Li2014-11-20-7/+100
| | | | | | | | | | | | | | | | | | | | | | | | Add full support for USDHC2, USDHC3, USDHC4 on mx6sx sabresd board. The default boot socket is USDHC4, so the MMC environment device and mmcdev variable are set to this device. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | mmc: fsl_esdhc: Update esdhc driver for iMX6SXYe.Li2014-11-20-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0 on iMX6SX. So the fsl_esdhc driver must update to set the register, otherwise no state can be detected. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | mx6sabresd: Access SRC_SBMR1 register via structureFabio Estevam2014-11-20-3/+2
| | | | | | | | | | | | | | | | | | | | | In U-boot it is preferred to access the register via structure pointer, so convert it such style. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
generated by cgit v1.1 at 2024-11-14 20:17:24 +0000