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* Blackfin: bf526-ezbrd: enable BootROM-OOB layout when booting from NANDMike Frysinger2010-10-02-2/+3
| | | | | | | | | | We need to use the Blackfin BootROM-specific OOB layout when we boot out of NAND as that is what the on-chip ROM expects. Also need to increase the monitor size a little to accommodate the extra NAND code overhead. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: adi config: enable nand lock/unlock supportMike Frysinger2010-10-02-0/+1
| | | | | | | | We use the lock/unlock options in our default nand code, so enabl support for the options. Reported-by: Vivi Li <vivi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bct-brettl2: new board portPeter Meerwald2010-10-02-0/+590
| | | | | Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: adi config: allow boards to tweak a little moreMike Frysinger2010-10-02-8/+14
| | | | | | Let people easily override bootdelay and network settings. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cmd_gpio: return gpio value to callerMike Frysinger2010-10-02-1/+1
| | | | | | | Make the GPIO command usable in a scripting environment by returning the GPIO value rather than always 0. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf527-sdp: new board portMike Frysinger2010-10-02-0/+245
| | | | | | Support for the Blackfin System Development Platform (SDP) base module. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: adi config: add a hook for boards to append the envMike Frysinger2010-10-02-1/+5
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: adi config: add an "all spi flashes" option to unify board listsMike Frysinger2010-10-02-12/+15
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: support a 3rd gpio cfi pinPeter Meerwald2010-10-02-1/+14
| | | | | Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cmd_gpio: document/extend input sub-optionMike Frysinger2010-10-02-14/+13
| | | | | | | | The input sub command was missing from the help text, and it didn't show the actual value currently read on the GPIO. This allows people to read the value of input pins. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: move CONFIG_BFIN_CPU to board config.mkMike Frysinger2010-10-02-34/+52
| | | | | | | | | The CONFIG_BFIN_CPU option is largely used in the build system, so move it out of the board config.h and into the board config.mk. It'd be nice to keep everything in the config.h, but the patch to extract that value early was rejected. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf561: merge headersMike Frysinger2010-10-02-1930/+1906
| | | | | | | Only the BF561 port was using the common dual core headers, so merge them into the BF561 specific headers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf533: merge headersMike Frysinger2010-10-02-1342/+1293
| | | | | | | Only the BF533 port was using the common extended headers, so merge them into the BF533 specific headers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: unify core MMRsMike Frysinger2010-10-02-3456/+350
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf52x: unify arch header duplicationMike Frysinger2010-10-02-2316/+6
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537: unify arch header duplicationMike Frysinger2010-10-02-295/+6
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: punt old *p style volatile MMR definesMike Frysinger2010-10-02-13223/+0
| | | | | | These are unused now, so punt them to clean things up. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf527-ad7160-eval: convert from old style MMR macrosMike Frysinger2010-10-02-1/+1
| | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf548: video: convert from old style MMR macrosMike Frysinger2010-10-02-11/+12
| | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf548-ezkit: video: convert from old style MMR macrosMike Frysinger2010-10-02-10/+11
| | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf527-ezkit: video: convert from old style MMR macrosMike Frysinger2010-10-02-36/+40
| | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: post: update old MMR style macrosMike Frysinger2010-10-02-131/+75
| | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. For the GPIO MMR usage, convert to the new GPIO framework. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_mac: convert from old style MMR macrosMike Frysinger2010-10-02-32/+36
| | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: punt headers for non-existent BF541Mike Frysinger2010-10-02-448/+0
| | | | | | There is no BF541 processor variant, so punt headers for it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: unify gpio cfi implementationsMike Frysinger2010-10-02-216/+26
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_sdh: clean up send_cmdMike Frysinger2010-10-02-10/+15
| | | | | | | Simplify the command setup and status checking steps, and add a proper timeout to the status polling code to avoid possible infinite hangs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_spi: add optional DMA supportMike Frysinger2010-10-02-27/+203
| | | | | | | | This moves the last piece from the old spi_flash driver to the new SPI framework -- optional DMA RX support. This typically cuts speeds by ~40% at the cost of additional ~300 bytes. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add support for BF51x partsMike Frysinger2010-10-02-0/+2498
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add support for BF538/BF539 processorsMike Frysinger2010-10-02-0/+3464
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'next' of /home/wd/git/u-boot/nextWolfgang Denk2010-09-28-8339/+15828
|\ | | | | | | | | | | | | Conflicts: include/ppc4xx.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| * Add support for operating system OSETorkel Lundgren2010-09-28-0/+42
| | | | | | | | | | | | Add OSE as operating system for mkimage and bootm. Signed-off-by: Torkel Lundgren <torkel.lundgren@enea.com>
| * 83xx: Remove warmboot parameter from PCI init functionsPeter Tyser2010-09-23-54/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | This change lays the groundwork for the BOOTFLAG_* flags being removed. This change has the small affect of delaying 100ms on PCI initialization after a warm boot as opposed to the optimal 1ms on some boards. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> included the mpc8308_p1m board. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: extend CONFIG_SYS_BOOTMAPSZ increase to mpc8308_p1mKim Phillips2010-09-23-1/+1
| | | | | | | | | | | | | | continuation of commit 39da1ba923d55f316f9f1bb3a960e4ed91dc17ac: "e300: increase CONFIG_SYS_BOOTMAPSZ to allow booting large kernels" Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: fix pcie build warningKim Phillips2010-09-23-1/+1
| | | | | | | | | | | | | | | | Configuring for MPC8308RDB board... pcie.c: In function 'mpc83xx_pcie_register_hose': pcie.c:143: warning: assignment makes pointer from integer without a cast Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc8308_p1m: support for MPC8308 P1M boardIlya Yanok2010-09-23-0/+811
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support for MPC8308 P1M board with the following set of features: Dual UART is supported NOR flash is supported Both TSEC Ethernet controllers are supported PCI Express initialization is supported Both I2C controllers are supported Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * MPC8308RDB: various clean upsIlya Yanok2010-09-23-66/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cleans up the Freescale MPC8308RDB Development board support. Things fixed: - Removed unused PCIE2 definitions from configuration - SICR{L,H} defines used for System I/O Configuration Registers values instead of hardcoding - CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of writing to SCCR from the board code - sleep mode stuff removed as MPC8308 has no support for deep sleep and PMCCR1 register. board_early_init_f() removed. - MPC8308 has no ERRATA for DDR controller so workaround removed - 'assignment in if statement' issues solved - use LBLAWAR_* defines instead of hardcoding Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc8308: add SICR{L,H} fields definitionsIlya Yanok2010-09-23-0/+48
| | | | | | | | | | | | | | | | This patch adds defines to set supported fields in System I/O Configuration Registers High and Low on Freescale MPC8308 CPU. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: add support for setting PCIE clocksIlya Yanok2010-09-23-0/+12
| | | | | | | | | | | | | | | | This patch adds support for setting PCIE clocks in cpu_init.c by providing CONFIG_SYS_SCCR_PCIEXP{1,2} in configuration. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx/pcie: make it compile with PCIE2 unconfiguredIlya Yanok2010-09-23-13/+25
| | | | | | | | | | | | | | | | MPC8308 has only one PCIE host controller so we want it to compile without CONFIG_SYS_PCIE2_CFG_{BASE,SIZE} defined. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * e300: increase CONFIG_SYS_BOOTMAPSZ to allow booting large kernelsIra W. Snyder2010-09-23-44/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer Linux kernels can overrun the initial memory window used for booting with their BSS area. When this happens, they overwrite the FDT and silently fail to boot. On e300 CPUs, the Linux kernel uses an initial BAT covering the first 256MB of RAM. See arch/powerpc/kernel/head_32.S for details. Increase the value of CONFIG_SYS_BOOTMAPSZ to accommodate the maximum value allowed by Linux. This will allow very large kernels to boot. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc831xerdb: enable mtdparts for NANDScott Wood2010-09-23-2/+16
| | | | | | | | | | | | | | | | | | The default partition table matches the .dts files for these boards in Linux. This allows these partitions to be used by name with U-Boot's "nand" command. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * ppc4xx: Disable trace broadcast for 44x non debug modeVictor Gallardo2010-09-23-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default the trace broadcast is enabled on 44x systems. To reduce power consumption when instruction tracing is not needed, disable trace broadcast. Check External Debug Mode (EDM) bit to detect if it should be disabled or not. Resetting system via a debugger will set the DBCR0[EDM] bit. Resetting via u-boot or OS will not. Signed-off-by: Victor Gallardo <vgallardo@apm.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Cleanup of PVR detection code in cpu.cStefan Roese2010-09-23-71/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cleans the PVR detection code in check_cpu() up a bit. Basically the strings are better seperated, resulting in an easier to understand and maintain code version. The #ifdef's couldn't be removed easily because of two reasons: - Some SoC revisions have the same PVR, so need a way to differentiate between those two SoC's. - In some case statements registers only available in this SoC variant are referenced. Instead I moved the CONFIG_440 #ifdef a bit, so that 405 platforms don't add this 440 detection code and vice versa. Resulting in this U-Boot image size change: 405EX (Kilauea): 408 bytes less 440EPx (Sequoia): 604 bytes less 460EX (Canyonlands): 564 bytes less Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
| * ppx4xx: remove unused functionality for DU405 boardsMatthias Fuchs2010-09-23-26/+5
| | | | | | | | | | | | | | | | Remove some unused functionality to make U-Boot build again. Especially PCI is not used on the board. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
| * Remove unused CONFIG_SERIAL_SOFTWARE_FIFO featureStefan Roese2010-09-23-146/+0
| | | | | | | | | | | | | | | | | | This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO feature from U-Boot. It has only been implemented for PPC4xx and was not used at all. So let's remove it and make the code smaller and cleaner. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
| * ppc4xx: Remove now unused CONFIG_UART1_CONSOLEStefan Roese2010-09-23-16/+1
| | | | | | | | | | | | | | | | CONFIG_UART1_CONSOLE was a PPC4xx specific implementation and is now removed since the move from the 4xx UART driver to the common NS16550 UART driver. Let's remove all references to this define now. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Use common NS16550 driver for PPC4xx UARTStefan Roese2010-09-23-824/+600
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the PPC4xx UART driver. Instead the common NS16550 driver is used, since all PPC4xx SoC's use this peripheral device. The file 4xx_uart.c now only implements the UART clock calculation function which also sets the SoC internal UART divisors. All PPC4xx board config headers are changed to use this common NS16550 driver now. Tested on these boards: acadia, canyonlands, katmai, kilauea, sequoia, zeus Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Big header cleanup part 2, mostly PPC405 relatedStefan Roese2010-09-23-948/+712
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. As a part from this cleanup, the GPIO definitions for PPC405EP are corrected. The high and low parts of the registers (for example CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in the wrong order. This patch now fixes this issue by switching these xxxH and xxxL values. This brings the GPIO 405EP port in sync with all other PPC4xx ports. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Big header cleanup, mostly PPC440 relatedStefan Roese2010-09-23-1986/+1750
| | | | | | | | | | | | | | | | | | | | | | This patch starts a bit PPC4xx header cleanup. First patch mostly touches PPC440 files. A later patch will touch the PPC405 files as well. This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Move gpio.h to ppc4xx-gpio.h since its ppc4xx specificStefan Roese2010-09-23-22/+22
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
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