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* x86: Make cpu init functions weakGraeme Russ2011-02-12-32/+17
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* x86: Call early_board_init when warm bootingGraeme Russ2011-02-12-5/+5
| | | | | | | | | | early_board_init has been skipped to avoid SDRAM corruption in the case that a fully relocatable image has been loaded into SDRAM and is being executed from SDRAM. x86 is being aligned with other architectures (ARM and PPC in particlar) and will be using Cache-As-RAM to run a C environment from Flash (or SRAM if you have some). early_board_init may be needed to assist in the setup of Cache-As-RAM and the early C environment
* x86: Add processor flags header from linuxGraeme Russ2011-02-12-10/+121
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* x86: Move Global Descriptor Table defines to processor.hGraeme Russ2011-02-12-10/+7
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* x86: Add stack dump to register dumpGraeme Russ2011-02-12-0/+16
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* x86: Fix mangled umlautsGraeme Russ2011-02-12-2/+2
| | | | | git mergetool has a nasty habit of mangling umlats - fix ones that have been missed in previous submissions
* sc520: Sort MakefileGraeme Russ2011-02-12-1/+1
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* x86: Parametize values used in linker scriptGraeme Russ2011-02-12-20/+20
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* eNET: Create distinct board configurationsGraeme Russ2011-02-12-2/+2
| | | | | | Position independant functionality is due for removal from the x86 architecture, so create two distinct configurations - One for Flash and one for SRAM
* x86: Align config.mk and linker scripts with other archesGraeme Russ2011-02-12-12/+10
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* x86: Fix definition of global_data struct for asm-offsets.cGraeme Russ2011-02-12-1/+1
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* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-02-11-16/+19
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| * powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3York Sun2011-02-10-1/+4
| | | | | | | | | | | | | | | | | | When DDR data rate is higher than 1200MT/s or controller interleaving is enabled, additional cycle for write-to-read turnaround is needed to satisfy dynamic ODT timing. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: corrected p1_p2_rdb EEPROM addressPriyanka Jain2011-02-09-2/+1
| | | | | | | | | | | | | | Board EEPROM is used to read/save Ethernet MAC addresses. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Fix p1_p2_rdb boards.cfgKumar Gala2011-02-09-13/+13
| | | | | | | | | | | | | | We should have been defining the actual board name in the options, not the processor. Fix this for P1011RDB, P1020RDB, P2010RDB, and P2020RDB. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fsl: update CRC after setting EEPROM identifierTimur Tabi2011-02-09-0/+1
| | | | | | | | | | | | | | | | | | | | The "mac id" command is used to initialize the EEPROM data to a specific format, but it was not updating the CRC. This didn't cause any real problems, because writing the data to the EEPROM will always update the CRC anyway, but it did result in a bogus CRC warning. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | cmd_bmp.c: message about compressed formats is debug info only.Wolfgang Denk2011-02-09-1/+1
|/ | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Anatolij Gustschin <agust@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2011-02-09-1/+5
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| * NAND: env: remember the flags used in the previous environmentScott Wood2011-02-08-1/+5
| | | | | | | | | | | | Previously, uninitialized stack space was being referenced. Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge branch 'next' of git://git.denx.de/u-boot-niosWolfgang Denk2011-02-09-1/+30
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| * | nios2: add gpio_is_validThomas Chou2011-02-08-0/+13
| | | | | | | | | | | | | | | Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | nios2: use long for ssize_tThomas Chou2011-02-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is consistent with nios2-linux. And resolved the warning, cmd_nvedit.c: In function `do_env_export': cmd_nvedit.c:660: warning: size_t format, ssize_t arg (arg 3) Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | altera_spi: add spi_set_speedThomas Chou2011-02-08-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Added this for mmc_spi driver. Though altera spi core does not support programmable speed. It is fixed when configured in sopc-builder. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | nios2: add gpio_freeThomas Chou2011-02-08-0/+11
| |/ | | | | | | | | Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2011-02-09-166/+994
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| * ppc4xx: Add DLVision-10G board supportDirk Eibach2011-02-07-166/+994
| | | | | | | | | | | | | | | | | | | | Board support for the Guntermann & Drunck DLVision-10G. Adds support for multiple FPGAs per board for gdsys 405ep architecture. Adds support for dual link osd hardware for gdsys 405ep. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-02-06-8/+35
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| * | mpc83xx: Use correct register to calculate clocks.Joakim Tjernlund2011-02-05-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use SPMR instead of HRCWL when calculating clocks as HCRWL may be changed and the CPU will not pick up all changes until there is a POR. u-boot will think SPMF has changed and get the clocks wrong. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: fix pcie configuration space read/writeLeo Liu2011-02-05-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is connected with switch or we use both of the two pcie controller. Signed-off-by: Leo Liu <liucai.lfn@gmail.com> fix codingstyle and compiler warning: 'pcie_priv' defined but not used Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2011-02-06-4/+5
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| * | | USB: Change the necessary defines to get debug outputAlexander Holler2011-02-05-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While debugging some USB stuff, I've first missed that there are actually two defines necessary to get usefull output. The one needed to get debug output for the communication with HUBs was burried somewhere deep inside the code. Change that so that a #define DEBUG is enough while still leaving the possibility to reduce unwanted debug output. Signed-off-by: Alexander Holler <holler@ahsoftware.de>
| * | | USB: Fix device stati for removable and powerctrl (typo)Alexander Holler2011-02-05-1/+1
| |/ / | | | | | | | | | | | | | | | | | | I currently don't know if the error could have other consequences than a wrong output when turning debug on. Signed-off-by: Alexander Holler <holler@ahsoftware.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-02-06-7/+136
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| * | powerpc/8xxx: Fix possible compile issue related to P1013Kumar Gala2011-02-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The P1013 is a single core version of P1022 and thus should use the p1022_serdes.c code. It was acciently pointing to p1013_serdes.c which doesn't exist. Reported-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Enable ECC on MPC8572DSYork Sun2011-02-03-0/+1
| | | | | | | | | | | | | | | | | | | | | Using hwconfig to turn on/off ECC, without re-compiling. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134York Sun2011-02-03-1/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Workaround for the following errata: DDR111 - MCKE signal may not function correctly at assertion of HRESET DDR134 - The automatic CAS-to-Preamble feature of the DDR controller can calibrate to incorrect values These two workarounds must be implemented together because they touch common registers. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Rename MPC8572 DDR erratum to DDR115York Sun2011-02-03-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | Use unique erratum number instead of platform number. Enable command that reports errata on MPC8572DS. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Enable Errata command on MPC8572DSYork Sun2011-02-03-1/+1
| | | | | | | | | | | | | | | | | | | | | Also removed duplicate CONFIG_CMD_IRQ define. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Remove unnecessary polling loop from DDR initYork Sun2011-02-03-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | This polling loop is not required normally, unless specifically stated in workaround. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | fsl_esdhc: Add the workaround for erratum ESDHC-A001 (enable on P2020)Kumar Gala2011-02-03-0/+10
| | | | | | | | | | | | | | | | | | | | | Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 4, 8, and 12. Program one more than the desired value: 4 -> 5, 8 -> 9, 12 -> 13. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Enable ESDHC111 Erratum on P2010/P2020 SoCsKumar Gala2011-02-03-0/+2
| |/ | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2011-02-04-1/+1
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| * | NAND: Fix saving of redundand environmentAlexander Holler2011-02-02-1/+1
| |/ | | | | | | | | | | | | When redundand environments are used the serial needs to get increased, otherwise the old one will still be used. Signed-off-by: Alexander Holler <holler@ahsoftware.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2011-02-04-322/+2074
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| * sh: sh7785lcr: Fix out of tree buildingNobuhiro Iwamatsu2011-02-03-2/+6
| | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * change email address in MAINTAINERSYoshihiro Shimoda2011-02-02-1/+1
| | | | | | | | | | Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: add support for sh7757lcr boardYoshihiro Shimoda2011-02-02-0/+1697
| | | | | | | | | | | | | | | | | | | | | | | | | | The R0P7757LC0030RL board has SH7757, 256MB DDR3-SDRAM, SPI ROM, Ethernet, and more. This patch supports the following functions: - 256MB DDR3-SDRAM - SPI ROM - Ethernet Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * spi: add support SuperH SPI moduleYoshihiro Shimoda2011-02-02-0/+346
| | | | | | | | | | | | | | SH7757 has SPI module. This patch supports it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * net: sh_eth: add cache handlingYoshihiro Shimoda2011-02-02-0/+12
| | | | | | | | | | | | | | | | Some CPU needs cache handling. So this patch add the config of CONFIG_SH_ETHER_CACHE_WRITEBACK, and it calls wback function. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * README: add description of sh_eth driverYoshihiro Shimoda2011-02-02-0/+9
| | | | | | | | | | Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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