| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Restore logic reverted by commit
commit 80767a6cead9990d9e77e62be947843c2c72f469
Author: Peter Pearse <peter.pearse@arm.com>
Date: Wed Sep 5 16:04:41 2007 +0100
Changed API name to coloured_led.h
Removed code using deprecated ifdef CONFIG_BOOTBINFUNC
Tidied other cpu/arm920t/start.S code
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
|
|
|
|
|
|
|
|
|
|
|
| |
There are two NAND entries with ID 0xDC and this obviously causes problems.
In the kernel, they punted the first entry, so we should do the same.
See this upstream e-mail for more info:
http://lists.infradead.org/pipermail/linux-mtd/2007-July/018795.html
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
| |
Cache operations have to take line address (addr), not start_addr.
I noticed this bug when debugging ping failure.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Before the first call of ide_reset(), the level of the IDE reset
signal on the TQM5200 is low (reset asserted). This patch sets the
default value to high (reset not asserted).
Currently this patch fixes no real problem, but it is cleaner to
assert the reset signal only on demand, and not permanently.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
|
|
|
|
| |
Signed-off-by: Detlev Zundel <dzu@denx.de>
|
|
|
|
|
|
|
| |
The latter name with 13 users is already established, so we will use
that.
Signed-off-by: Detlev Zundel <dzu@denx.de>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
According to the ata (ata5) specification the RESET- signal
shall be asserted for at least 25 us. Without this patch,
the RESET- signal is asserted on some boards for only < 1 us
(e. g. on the TQM5200). This patch adds a general delay of
25 us to the RESET- signal.
Without this patch a Platinum 4 GiB CF card is not recognised
properly on boards with a TQM5200 (STK52xx, TB5200).
Signed-off-by: Martin Krause <martin.krause@tqs.de>
|
|
|
|
| |
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
|
|
|
|
| |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|
|
|
|
|
|
| |
In function 'logbuff_init_ptrs':
cmd_log.c:79: warning: pointer targets in assignment differ in signedness
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|
|
|
| |
Signed-off-by: gururaja hebbar <gururajakr@sanyo.co.in>
|
|
|
|
| |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|
|
|
|
|
| |
These PCI IDs are required by the Linkstation platforms.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
|
|
|
|
|
|
| |
This avoids an early global data reference.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
|
|
|
|
|
|
|
| |
If the hardware watchdog detects a voltage error, the watchdog sets
GPIO62 to low. The watchdog POST has to detect this low level.
Signed-off-by: Sascha Laue <leglas0@legpc180.leg.liebherr.i>
|
|
|
|
|
|
|
|
| |
Current libata.h of u-boot is out of sync from linux kernel,
this patch make it be consistent with linux kernel.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Tor Krill <tor@excito.com>
|
|
|
|
|
|
|
| |
The linux kernel is now mostly ARCH=powerpc, so to make life easier
allow use to use ARCH=powerpc and convert it to ARCH=ppc.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
|
|
| |
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
|
|
|
|
|
|
|
|
| |
It should access with 16-bit instead of 8-bit
Now it uses the generic memcpy with 8-bit access. It means it reads wrong data from OneNAND.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
|
|
|
|
|
|
|
| |
It mis-calculates the block address.
Also fix DECLARE_GLOBAL_DATA_PTR in env_onenand.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch is based on the port by Mihai Georgian (see linkstation.c for
Copyright information) and implements support for LinkStation / KuroBox HD
and HG PPC models from Buffalo Technology, whereby HD is deactivated at
the moment, pending network driver fixing.
Notice to users: this is pretty much a barebone port. Support for network
on HG models is already in the U-Boot mainline, but you might also want
patches to switch fan / phy modes depending on the negotiated ethernet
parameters. This patch also doesn't support console switching, booting EM
mode, Buffalo specific ext2 magic number. So, if you want to use any of
those, you need additional patches. Otherwise this patche provides a fully
functional u-boot with a network console on your system.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
|
|
|
|
|
|
|
|
|
| |
Replace CONFIG_8xx and CONFIG_MCF532x to CONFIG_MII_INIT in
cmd_init.c. Add CONFIG_MII_INIT to board configuration files
that use mii_init() in cmd_init.c.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
|
|
|
|
|
|
|
| |
Remove test for CONFIG_MPC5200 in drivers/pci/pci_auto.c and define
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE in related board configuration files.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
|
|
|
|
|
|
|
| |
Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's
that have larger physical addresses like 44x, 85xx, and 86xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Some systems have md5.h installed in /usr/include/. This isn't the
desired file (we want the one in include/md5.h). This will avoid the
conflict. This fixes the host tools building problem by creating a new
directory for U-Boot specific header files.
[Patch by Andy Fleming, modified to use separate directory by Wolfgang
Denk]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
|
|
|
|
| |
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
|
|
|
| |
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
|
|
|
|
|
|
| |
according to gvb's suggestion, polishing for the doc.
Signed-off-by: Jerry Van Baren <gerald.vanbaren@ge.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
|
|
|
| |
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Adds Support for Altera's Stratix II.
Within your board specific init file you will have to call
1. fpga_init (/* relocated code offset. usually => */ gd->reloc_off);
2. fpga_add (fpga_altera, (Altera_desc*)&altera_desc);
Altera_desc* contines (for example):
{
Altera_StratixII, /* part type */
passive_serial, /* interface type */
1, /* bytes of data part can accept */
(void *)(&funcs), /* interface function table */
0L, /* base interface address */
0 /* implementation specific cookie */
}
funcs is the interface. It is of type altera_board_specific_func.
It looks like this:
altera_board_specific_func func = {
pre_fn,
config_fn,
status_fn,
done_fn,
clk_fn,
data_fn,
abort_fn,
post_fn,
};
you will have to implement these functions, which is usually bit
banging some gpio.
Signed-off-by: Eran Liberty <liberty@extricom.com>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
|
|
|
| |
This patch adds support for the Phytec Phycore-i.MX31 board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
|
|
|
|
|
|
|
| |
This patch adds support for the mx31 litekit board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
|
|
|
|
|
|
|
| |
This patch adds an i2c driver for Freescale i.MX processors
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
|
|
|
|
|
|
|
| |
This patch adds the core support for Freescale mx31
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
|
|
|
|
|
|
| |
...as suggested by Peter Pearse
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
|
|
|
|
| |
Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136
to cpu/arm1136/omap24xx.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
|
|
|
|
|
|
|
|
|
|
|
|
| |
It isn't generally save to execute applications outside of U-Boot with caches
enabled due to the way the Blackfin processor handles caches (requires
software assistance). This patch disables caches before booting an ELF or
just booting raw code. The previous discussion on the patch was that we
wanted to use weaks instead, but that proved to not be feasible when multiple
symbols are involved, which puts us back at the ifdef solution. I've
minimized the ugliness by moving the setup step outside of the main function.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|\ |
|
| |\ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Some NOR flash chip from Spansion, for example, the s29ws-n MirrorBit
series require different addresses for buffered write commands. Define a
configuration option to support buffered writes on those chips. A more
elegant solution would be to automatically detect those chips by parsing
their CFI records, but that would require introduction of a fixup table
into the cfi_flash driver.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
|
| |\ \ |
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
32-bit wide ECC memory modules report 40-bit width.
Changed the DIMM data bus width test to 'less than 64' instead of 'equal 32'.
Signed-off-by: Lee Nipper <lee.nipper@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Currently the serdes will not be initializated due to the
partid's error.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Currently the SATA controller clock is configured as CSB clock,
usually the CSB clock is 400/333/266MHz.
However, The SATA IP block is only guaranteed to operate up to
200 MHz as stated in the HW spec.
The bug is reported by Joe D'Abbraccio <ljd015@freescale.com>
This patch makes the SATA clock as half of CSB clock.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | |/
| | |
| | |
| | |
| | | |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| |\ \ |
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
We were looking at the wrong memory offset to determine of a secondary
cpu had been spun up or not. Also added a warning message if the
all the secondary cpus we expect don't spin up.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|